Changeset 340

Timestamp:

Jan 31, 2011, 3:39:10 PM (13 years ago)

Author:

coach

Message:

language corrections

File:

• anr/section-objectif.tex (modified) (4 diffs)

anr/section-objectif.tex

@@ -43 +43 @@
 Furthermore in the HPC case, an executable containing the host application is
 also generated and the user will be able to launch the application by loading
-the bitstream on an FPGA and running the executable on PC.
+the bitstream on an FPGA and running the executable on a PC.
 \end{description}
  
@@ -64 +64 @@
 \item[\textit{Design Space Exploration by Virtual Prototyping}]:
     The COACH environment will allow to easily map a parallel application (formally described as
-    an abstract network of process and communication channels)  
+    an abstract network of process and communication channels).  
     COACH will permit the system designer to explore the design space, and to define the best 
     hardware/software partitioning of the application.
@@ -74 +74 @@
     and the HLS tools of COACH will support a common language and coding style 
     to avoid re-engineering by the designer.
-    COACH will provide a tool which will automatically explore the%paul
-     coprocessor micro-architectural design space.
+    COACH will provide a tool which will automatically explore the coprocessor micro-architectural design space.
 \item[\textit{High-level code transformation}]:
     COACH will allow to optimize the memory usage, to enhance the parallelism through 
@@ -87 +86 @@
     COACH will support code transformation by providing a source to source C2C tool.
 \item[\textit{Unified Hardware/Software communication middleware}]:
-    COACH will rely on he SoCLib experience to implement an unified hardware/software communication 
+    COACH will rely on the SoCLib experience to implement an unified hardware/software communication 
     infrastructure and communication APIs (Application Programming Interface), to support  
     communications between software tasks running on embedded processors and dedicated