Changeset 383 for anr/section-dissemination.tex

Timestamp:

Feb 22, 2011, 11:02:52 AM (13 years ago)

Author:

coach

Message:

ia: qq maj et mise en page finale.

File:

• anr/section-dissemination.tex (modified) (6 diffs)

anr/section-dissemination.tex

@@ -18 +18 @@
 Pour les projets academiques, l'accord de consortium n'est pas obligatoire
 mais fortement conseille.}
-
+%
 \subsection{Dissemination}
 
@@ -25 +25 @@
 automatic parallelization, etc. These results will be published in relevant International
 Conferences, for instance DATE, DAC, or ICCAD. 
-\\
 More generally, the COACH infrastructure and the design flow supported by the COACH
 tools and libraries will be promoted by proposing tutorials on FPGA oriented system level synthesis
@@ -36 +35 @@
 The COACH project will be an open infrastructure, and the COACH tools and libraries will be available via
 a WEB server. This server will be maintained by the UPMC/LIP6 laboratory.
-\\
 On the standardization side, some effort will be made for analysing how the work around IP-XACT 
 could be donated for the evolution of the IEEE 1685 standard. \mds is board member of
@@ -62 +60 @@
 \item
 The synthesizable VHDL models supporting the neutral architectural template
-(corresponding to the SocLib IP cores library), will have two modes of dissemination.
-A typical MPSoC contains not only dedicated, synthesized coprocessors. It contains
-also general purpose, reusable components, such as processor cores, memory controllers
-optimised cache controllers, peripheral controllers, or bus controllers.
+(corresponding to the SocLib IP cores library: processor core, memory
+controllers, ...), will have two modes of dissemination.
+%A typical MPSoC contains not only dedicated, synthesized coprocessors. It contains
+%also general purpose, reusable components, such as processor cores, memory controllers
+%optimised cache controllers, peripheral controllers, or bus controllers.
 For non commercial use (i.e. research or education in an academic context,  
-or feasibility study in an industrial context), the synthesizable VHDL models will be freely available.
+or feasibility study in an industrial context), the synthesizable VHDL models
+will be freely available.
 For commercial use, commercial licenses will be negotiated between the owners and the customers.
 \item
@@ -80 +80 @@
 customer framework and will generate service business.
 \end{itemize}
-
-This general approach is supported by a large number (\letterOfInterestNb) of SMEs, as
-demonstrated by the "letters of interest" that have been collected during the preparation
+%
+A large number (\letterOfInterestNb) of SMEs support this general approach
+as demonstrated by the "letters of interest" that have been collected during the preparation
 of the project and presented in annexe~\ref{lettre-soutien}.
 
@@ -172 +172 @@
 \letterOfInterest{EADS-ASTRIUM}{lettres-2011/Astrium.pdf}.
 \letterOfInterest{CONTINENTAL}{lettres-2011/Continental.pdf}.
+\letterOfInterest{CONTINENTAL}{lettres-2011/Continental.pdf}.
+\letterOfInterest{CONTINENTAL}{lettres-2011/Continental.pdf}.
+\letterOfInterest{CONTINENTAL}{lettres-2011/Continental.pdf}.
+\letterOfInterest{CONTINENTAL}{lettres-2011/Continental.pdf}.
 %\letterOfInterest{ADACSYS}{lettres-2011/Coach_ADACSYS_lettre_interet},
 %\letterOfInterest{ATEME}{lettres-2011/ATEME.pdf},