| 1 | ////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : boot_init.c |
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| 3 | // Date : 01/04/2012 |
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| 4 | // Author : alain greiner |
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| 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | /////////////////////////////////////////////////////////////////////////////////// |
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| 7 | // The boot_init.c file is part of the GIET-VM nano-kernel. |
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| 8 | // This code is executed in the boot phase by proc[0] to initialize the |
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| 9 | // peripherals and the kernel data structures: |
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| 10 | // - pages tables for the various vspaces |
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| 11 | // - shedulers for processors (including the tasks contexts and interrupt vectors) |
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| 12 | // |
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| 13 | // This nano-kernel has been written for the MIPS32 processor. |
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| 14 | // The virtual adresses are on 32 bits and use the (unsigned int) type, but the |
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| 15 | // physicals addresses can have up to 40 bits, and use the (unsigned long long) type. |
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| 16 | // |
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| 17 | // The GIET-VM uses the paged virtual memory and the MAPPING_INFO binary file |
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| 18 | // to provides two services: |
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| 19 | // 1) classical memory protection, when several independant applications compiled |
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| 20 | // in different virtual spaces are executing on the same hardware platform. |
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| 21 | // 2) data placement in NUMA architectures, when we want to control the placement |
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| 22 | // of the software objects (virtual segments) on the physical memory banks. |
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| 23 | // |
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| 24 | // The MAPPING_INFO binary data structure must be loaded in the the seg_boot_mapping |
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| 25 | // segment (at address seg_mapping_base). |
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| 26 | // This MAPPING_INFO data structure defines |
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| 27 | // - the hardware architecture: number of clusters, number or processors, |
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| 28 | // size of the memory segments, and peripherals in each cluster. |
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| 29 | // - The structure of the various multi-threaded software applications: |
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| 30 | // number of tasks, communication channels. |
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| 31 | // - The mapping: placement of virtual objects (vobj) in the virtual segments (vseg), |
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| 32 | // placement of virtual segments (vseg) in the physical segments (pseg), placement |
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| 33 | // of software tasks on the processors, |
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| 34 | // |
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| 35 | // The page table are statically build in the boot phase, and they do not |
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| 36 | // change during execution. The GIET uses only 4 Kbytes pages. |
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| 37 | // As most applications use only a limited number of segments, the number of PT2s |
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| 38 | // actually used by a given virtual space is generally smaller than 2048, and is |
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| 39 | // computed during the boot phase. |
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| 40 | // The max number of virtual spaces (GIET_NB_VSPACE_MAX) is a configuration parameter. |
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| 41 | // |
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| 42 | // Each page table (one page table per virtual space) is monolithic, and contains |
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| 43 | // one PT1 and up to (GIET_NB_PT2_MAX) PT2s. The PT1 is addressed using the ix1 field |
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| 44 | // (11 bits) of the VPN, and the selected PT2 is addressed using the ix2 field (9 bits). |
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| 45 | // - PT1[2048] : a first 8K aligned array of unsigned int, indexed by (ix1) field of VPN. |
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| 46 | // Each entry in the PT1 contains a 32 bits PTD. The MSB bit PTD[31] is |
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| 47 | // the PTD valid bit, and LSB bits PTD[19:0] are the 20 MSB bits of the physical base |
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| 48 | // address of the selected PT2. |
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| 49 | // The PT1 contains 2048 PTD of 4 bytes => 8K bytes. |
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| 50 | // - PT2[1024][GIET_NB_PT2_MAX] : an array of array of unsigned int. |
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| 51 | // Each PT2[1024] must be 4K aligned, each entry in a PT2 contains two unsigned int: |
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| 52 | // the first word contains the protection flags, and the second word contains the PPN. |
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| 53 | // Each PT2 contains 512 PTE2 of 8bytes => 4K bytes. |
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| 54 | // The total size of a page table is finally = 8K + (GIET_NB_PT2_MAX)*4K bytes. |
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| 55 | //////////////////////////////////////////////////////////////////////////////////// |
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| 56 | |
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| 57 | #include <common.h> |
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| 58 | #include <mips32_registers.h> |
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| 59 | #include <giet_config.h> |
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| 60 | #include <mapping_info.h> |
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| 61 | #include <mwmr_channel.h> |
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| 62 | #include <barrier.h> |
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| 63 | #include <memspace.h> |
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| 64 | #include <irq_handler.h> |
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| 65 | #include <ctx_handler.h> |
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| 66 | #include <vm_handler.h> |
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| 67 | #include <hwr_mapping.h> |
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| 68 | |
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| 69 | #include <stdarg.h> |
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| 70 | |
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| 71 | #if !defined(NB_CLUSTERS) |
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| 72 | # error The NB_CLUSTERS value must be defined in the 'giet_config.h' file ! |
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| 73 | #endif |
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| 74 | |
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| 75 | #if !defined(NB_PROCS_MAX) |
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| 76 | # error The NB_PROCS_MAX value must be defined in the 'giet_config.h' file ! |
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| 77 | #endif |
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| 78 | |
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| 79 | #if !defined(GIET_NB_VSPACE_MAX) |
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| 80 | # error The GIET_NB_VSPACE_MAX value must be defined in the 'giet_config.h' file ! |
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| 81 | #endif |
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| 82 | |
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| 83 | //////////////////////////////////////////////////////////////////////////// |
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| 84 | // Global variables for boot code |
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| 85 | // Both the page tables for the various virtual spaces, and the schedulers |
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| 86 | // for the processors are physically distributed on the clusters. |
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| 87 | // These global variables are just arrays of pointers. |
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| 88 | //////////////////////////////////////////////////////////////////////////// |
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| 89 | |
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| 90 | // Page table addresses arrays |
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| 91 | __attribute__((section (".wdata"))) |
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| 92 | paddr_t boot_ptabs_paddr[GIET_NB_VSPACE_MAX]; |
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| 93 | |
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| 94 | __attribute__((section (".wdata"))) |
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| 95 | unsigned int boot_ptabs_vaddr[GIET_NB_VSPACE_MAX]; |
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| 96 | |
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| 97 | // Scheduler pointers array (virtual addresses) |
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| 98 | __attribute__((section (".wdata"))) |
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| 99 | static_scheduler_t* boot_schedulers[NB_CLUSTERS * NB_PROCS_MAX]; |
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| 100 | |
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| 101 | // Next free PT2 index array |
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| 102 | __attribute__((section (".wdata"))) |
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| 103 | unsigned int boot_next_free_pt2[GIET_NB_VSPACE_MAX] = |
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| 104 | { [0 ... GIET_NB_VSPACE_MAX - 1] = 0 }; |
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| 105 | |
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| 106 | // Max PT2 index |
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| 107 | __attribute__((section (".wdata"))) |
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| 108 | unsigned int boot_max_pt2[GIET_NB_VSPACE_MAX] = |
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| 109 | { [0 ... GIET_NB_VSPACE_MAX - 1] = 0 }; |
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| 110 | |
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| 111 | |
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| 112 | ////////////////////////////////////////////////////////////////////////////// |
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| 113 | // boot_procid() |
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| 114 | ////////////////////////////////////////////////////////////////////////////// |
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| 115 | inline unsigned int boot_procid() |
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| 116 | { |
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| 117 | unsigned int ret; |
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| 118 | asm volatile ("mfc0 %0, $15, 1":"=r" (ret)); |
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| 119 | return (ret & 0x3FF); |
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| 120 | } |
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| 121 | |
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| 122 | ////////////////////////////////////////////////////////////////////////////// |
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| 123 | // boot_proctime() |
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| 124 | ////////////////////////////////////////////////////////////////////////////// |
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| 125 | inline unsigned int boot_proctime() |
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| 126 | { |
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| 127 | unsigned int ret; |
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| 128 | asm volatile ("mfc0 %0, $9":"=r" (ret)); |
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| 129 | return ret; |
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| 130 | } |
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| 131 | |
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| 132 | ////////////////////////////////////////////////////////////////////////////// |
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| 133 | // boot_exit() |
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| 134 | ////////////////////////////////////////////////////////////////////////////// |
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| 135 | void boot_exit() |
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| 136 | { |
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| 137 | while (1) { asm volatile ("nop"); } |
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| 138 | } |
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| 139 | |
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| 140 | ////////////////////////////////////////////////////////////////////////////// |
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| 141 | // boot_eret() |
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| 142 | // The address of this function is used to initialise the return address (RA) |
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| 143 | // in all task contexts (when the task has never been executed. |
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| 144 | /////////////////////////////////"///////////////////////////////////////////// |
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| 145 | void boot_eret() |
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| 146 | { |
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| 147 | asm volatile ("eret"); |
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| 148 | } |
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| 149 | |
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| 150 | //////////////////////////////////////////////////////////////////////////// |
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| 151 | // boot_physical_read() |
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| 152 | // This function makes a physical read access to a 32 bits word in memory, |
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| 153 | // after a temporary DTLB de-activation and paddr extension. |
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| 154 | //////////////////////////////////////////////////////////////////////////// |
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| 155 | unsigned int boot_physical_read(paddr_t paddr) |
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| 156 | { |
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| 157 | unsigned int value; |
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| 158 | unsigned int lsb = (unsigned int) paddr; |
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| 159 | unsigned int msb = (unsigned int) (paddr >> 32); |
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| 160 | |
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| 161 | asm volatile( |
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| 162 | "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ |
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| 163 | "andi $3, $2, 0xb \n" |
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| 164 | "mtc2 $3, $1 \n" /* DTLB off */ |
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| 165 | |
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| 166 | "mtc2 %2, $24 \n" /* PADDR_EXT <= msb */ |
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| 167 | "lw %0, 0(%1) \n" /* value <= *paddr */ |
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| 168 | "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ |
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| 169 | |
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| 170 | "mtc2 $2, $1 \n" /* restore MMU_MODE */ |
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| 171 | : "=r" (value) |
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| 172 | : "r" (lsb), "r" (msb) |
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| 173 | : "$2", "$3"); |
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| 174 | return value; |
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| 175 | } |
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| 176 | |
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| 177 | //////////////////////////////////////////////////////////////////////////// |
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| 178 | // boot_physical_write() |
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| 179 | // This function makes a physical write access to a 32 bits word in memory, |
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| 180 | // after a temporary DTLB de-activation and paddr extension. |
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| 181 | //////////////////////////////////////////////////////////////////////////// |
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| 182 | void boot_physical_write(paddr_t paddr, |
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| 183 | unsigned int value) |
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| 184 | { |
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| 185 | unsigned int lsb = (unsigned int)paddr; |
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| 186 | unsigned int msb = (unsigned int)(paddr >> 32); |
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| 187 | |
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| 188 | asm volatile( |
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| 189 | "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ |
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| 190 | "andi $3, $2, 0xb \n" |
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| 191 | "mtc2 $3, $1 \n" /* DTLB off */ |
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| 192 | |
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| 193 | "mtc2 %2, $24 \n" /* PADDR_EXT <= msb */ |
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| 194 | "sw %0, 0(%1) \n" /* *paddr <= value */ |
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| 195 | "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ |
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| 196 | |
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| 197 | "mtc2 $2, $1 \n" /* restore MMU_MODE */ |
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| 198 | : |
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| 199 | : "r" (value), "r" (lsb), "r" (msb) |
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| 200 | : "$2", "$3"); |
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| 201 | } |
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| 202 | |
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| 203 | ////////////////////////////////////////////////////////////////////////////// |
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| 204 | // boot_set_mmu_ptpr() |
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| 205 | // This function set a new value for the MMU PTPR register. |
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| 206 | ////////////////////////////////////////////////////////////////////////////// |
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| 207 | inline void boot_set_mmu_ptpr(unsigned int val) |
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| 208 | { |
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| 209 | asm volatile ("mtc2 %0, $0"::"r" (val)); |
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| 210 | } |
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| 211 | |
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| 212 | ////////////////////////////////////////////////////////////////////////////// |
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| 213 | // boot_set_mmu_mode() |
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| 214 | // This function set a new value for the MMU MODE register. |
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| 215 | ////////////////////////////////////////////////////////////////////////////// |
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| 216 | inline void boot_set_mmu_mode(unsigned int val) |
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| 217 | { |
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| 218 | asm volatile ("mtc2 %0, $1"::"r" (val)); |
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| 219 | } |
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| 220 | |
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| 221 | //////////////////////////////////////////////////////////////////////////// |
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| 222 | // boot_puts() |
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| 223 | // display a string on TTY0 |
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| 224 | //////////////////////////////////////////////////////////////////////////// |
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| 225 | void boot_puts(const char * buffer) |
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| 226 | { |
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| 227 | unsigned int *tty_address = (unsigned int *) &seg_tty_base; |
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| 228 | unsigned int n; |
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| 229 | |
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| 230 | for (n = 0; n < 100; n++) |
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| 231 | { |
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| 232 | if (buffer[n] == 0) break; |
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| 233 | tty_address[TTY_WRITE] = (unsigned int) buffer[n]; |
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| 234 | } |
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| 235 | } |
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| 236 | |
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| 237 | //////////////////////////////////////////////////////////////////////////// |
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| 238 | // boot_putx() |
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| 239 | // display a 32 bits unsigned int as an hexadecimal string on TTY0 |
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| 240 | //////////////////////////////////////////////////////////////////////////// |
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| 241 | void boot_putx(unsigned int val) |
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| 242 | { |
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| 243 | static const char HexaTab[] = "0123456789ABCDEF"; |
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| 244 | char buf[11]; |
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| 245 | unsigned int c; |
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| 246 | |
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| 247 | buf[0] = '0'; |
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| 248 | buf[1] = 'x'; |
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| 249 | buf[10] = 0; |
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| 250 | |
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| 251 | for (c = 0; c < 8; c++) |
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| 252 | { |
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| 253 | buf[9 - c] = HexaTab[val & 0xF]; |
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| 254 | val = val >> 4; |
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| 255 | } |
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| 256 | boot_puts(buf); |
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| 257 | } |
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| 258 | |
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| 259 | //////////////////////////////////////////////////////////////////////////// |
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| 260 | // boot_putl() |
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| 261 | // display a 64 bits unsigned long as an hexadecimal string on TTY0 |
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| 262 | //////////////////////////////////////////////////////////////////////////// |
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| 263 | void boot_putl(paddr_t val) |
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| 264 | { |
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| 265 | static const char HexaTab[] = "0123456789ABCDEF"; |
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| 266 | char buf[19]; |
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| 267 | unsigned int c; |
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| 268 | |
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| 269 | buf[0] = '0'; |
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| 270 | buf[1] = 'x'; |
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| 271 | buf[18] = 0; |
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| 272 | |
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| 273 | for (c = 0; c < 16; c++) |
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| 274 | { |
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| 275 | buf[17 - c] = HexaTab[(unsigned int)val & 0xF]; |
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| 276 | val = val >> 4; |
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| 277 | } |
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| 278 | boot_puts(buf); |
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| 279 | } |
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| 280 | |
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| 281 | //////////////////////////////////////////////////////////////////////////// |
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| 282 | // boot_putd() |
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| 283 | // display a 32 bits unsigned int as a decimal string on TTY0 |
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| 284 | //////////////////////////////////////////////////////////////////////////// |
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| 285 | void boot_putd(unsigned int val) |
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| 286 | { |
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| 287 | static const char DecTab[] = "0123456789"; |
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| 288 | char buf[11]; |
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| 289 | unsigned int i; |
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| 290 | unsigned int first; |
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| 291 | |
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| 292 | buf[10] = 0; |
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| 293 | |
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| 294 | for (i = 0; i < 10; i++) |
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| 295 | { |
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| 296 | if ((val != 0) || (i == 0)) |
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| 297 | { |
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| 298 | buf[9 - i] = DecTab[val % 10]; |
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| 299 | first = 9 - i; |
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| 300 | } |
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| 301 | else |
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| 302 | { |
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| 303 | break; |
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| 304 | } |
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| 305 | val /= 10; |
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| 306 | } |
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| 307 | boot_puts(&buf[first]); |
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| 308 | } |
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| 309 | |
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| 310 | ///////////////////////////////////////////////////////////////////////////// |
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| 311 | // mapping_info data structure access functions |
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| 312 | ///////////////////////////////////////////////////////////////////////////// |
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| 313 | inline mapping_cluster_t *boot_get_cluster_base(mapping_header_t * header) |
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| 314 | { |
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| 315 | return (mapping_cluster_t *) ((char *) header + MAPPING_HEADER_SIZE); |
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| 316 | } |
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| 317 | ///////////////////////////////////////////////////////////////////////////// |
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| 318 | inline mapping_pseg_t *boot_get_pseg_base(mapping_header_t * header) |
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| 319 | { |
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| 320 | return (mapping_pseg_t *) ((char *) header + |
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| 321 | MAPPING_HEADER_SIZE + |
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| 322 | MAPPING_CLUSTER_SIZE * header->clusters); |
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| 323 | } |
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| 324 | ///////////////////////////////////////////////////////////////////////////// |
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| 325 | inline mapping_vspace_t *boot_get_vspace_base(mapping_header_t * header) |
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| 326 | { |
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| 327 | return (mapping_vspace_t *) ((char *) header + |
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| 328 | MAPPING_HEADER_SIZE + |
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| 329 | MAPPING_CLUSTER_SIZE * header->clusters + |
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| 330 | MAPPING_PSEG_SIZE * header->psegs); |
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| 331 | } |
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| 332 | ///////////////////////////////////////////////////////////////////////////// |
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| 333 | inline mapping_vseg_t *boot_get_vseg_base(mapping_header_t * header) |
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| 334 | { |
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| 335 | return (mapping_vseg_t *) ((char *) header + |
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| 336 | MAPPING_HEADER_SIZE + |
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| 337 | MAPPING_CLUSTER_SIZE * header->clusters + |
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| 338 | MAPPING_PSEG_SIZE * header->psegs + |
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| 339 | MAPPING_VSPACE_SIZE * header->vspaces); |
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| 340 | } |
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| 341 | ///////////////////////////////////////////////////////////////////////////// |
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| 342 | inline mapping_vobj_t *boot_get_vobj_base(mapping_header_t * header) |
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| 343 | { |
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| 344 | return (mapping_vobj_t *) ((char *) header + |
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| 345 | MAPPING_HEADER_SIZE + |
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| 346 | MAPPING_CLUSTER_SIZE * header->clusters + |
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| 347 | MAPPING_PSEG_SIZE * header->psegs + |
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| 348 | MAPPING_VSPACE_SIZE * header->vspaces + |
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| 349 | MAPPING_VSEG_SIZE * header->vsegs); |
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| 350 | } |
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| 351 | ///////////////////////////////////////////////////////////////////////////// |
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| 352 | inline mapping_task_t *boot_get_task_base(mapping_header_t * header) |
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| 353 | { |
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| 354 | return (mapping_task_t *) ((char *) header + |
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| 355 | MAPPING_HEADER_SIZE + |
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| 356 | MAPPING_CLUSTER_SIZE * header->clusters + |
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| 357 | MAPPING_PSEG_SIZE * header->psegs + |
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| 358 | MAPPING_VSPACE_SIZE * header->vspaces + |
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| 359 | MAPPING_VSEG_SIZE * header->vsegs + |
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| 360 | MAPPING_VOBJ_SIZE * header->vobjs); |
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| 361 | } |
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| 362 | ///////////////////////////////////////////////////////////////////////////// |
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| 363 | inline mapping_proc_t *boot_get_proc_base(mapping_header_t * header) |
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| 364 | { |
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| 365 | return (mapping_proc_t *) ((char *) header + |
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| 366 | MAPPING_HEADER_SIZE + |
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| 367 | MAPPING_CLUSTER_SIZE * header->clusters + |
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| 368 | MAPPING_PSEG_SIZE * header->psegs + |
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| 369 | MAPPING_VSPACE_SIZE * header->vspaces + |
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| 370 | MAPPING_VSEG_SIZE * header->vsegs + |
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| 371 | MAPPING_VOBJ_SIZE * header->vobjs + |
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| 372 | MAPPING_TASK_SIZE * header->tasks); |
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| 373 | } |
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| 374 | ///////////////////////////////////////////////////////////////////////////// |
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| 375 | inline mapping_irq_t *boot_get_irq_base(mapping_header_t * header) |
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| 376 | { |
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| 377 | return (mapping_irq_t *) ((char *) header + |
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| 378 | MAPPING_HEADER_SIZE + |
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| 379 | MAPPING_CLUSTER_SIZE * header->clusters + |
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| 380 | MAPPING_PSEG_SIZE * header->psegs + |
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| 381 | MAPPING_VSPACE_SIZE * header->vspaces + |
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| 382 | MAPPING_VSEG_SIZE * header->vsegs + |
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| 383 | MAPPING_VOBJ_SIZE * header->vobjs + |
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| 384 | MAPPING_TASK_SIZE * header->tasks + |
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| 385 | MAPPING_PROC_SIZE * header->procs); |
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| 386 | } |
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| 387 | ///////////////////////////////////////////////////////////////////////////// |
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| 388 | inline mapping_coproc_t *boot_get_coproc_base(mapping_header_t * header) |
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| 389 | { |
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| 390 | return (mapping_coproc_t *) ((char *) header + |
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| 391 | MAPPING_HEADER_SIZE + |
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| 392 | MAPPING_CLUSTER_SIZE * header->clusters + |
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| 393 | MAPPING_PSEG_SIZE * header->psegs + |
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| 394 | MAPPING_VSPACE_SIZE * header->vspaces + |
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| 395 | MAPPING_VOBJ_SIZE * header->vobjs + |
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| 396 | MAPPING_VSEG_SIZE * header->vsegs + |
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| 397 | MAPPING_TASK_SIZE * header->tasks + |
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| 398 | MAPPING_PROC_SIZE * header->procs + |
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| 399 | MAPPING_IRQ_SIZE * header->irqs); |
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| 400 | } |
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| 401 | /////////////////////////////////////////////////////////////////////////////////// |
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| 402 | inline mapping_cp_port_t *boot_get_cp_port_base(mapping_header_t * header) |
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| 403 | { |
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| 404 | return (mapping_cp_port_t *) ((char *) header + |
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| 405 | MAPPING_HEADER_SIZE + |
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| 406 | MAPPING_CLUSTER_SIZE * header->clusters + |
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| 407 | MAPPING_PSEG_SIZE * header->psegs + |
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| 408 | MAPPING_VSPACE_SIZE * header->vspaces + |
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| 409 | MAPPING_VOBJ_SIZE * header->vobjs + |
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| 410 | MAPPING_VSEG_SIZE * header->vsegs + |
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| 411 | MAPPING_TASK_SIZE * header->tasks + |
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| 412 | MAPPING_PROC_SIZE * header->procs + |
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| 413 | MAPPING_IRQ_SIZE * header->irqs + |
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| 414 | MAPPING_COPROC_SIZE * header->coprocs); |
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| 415 | } |
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| 416 | /////////////////////////////////////////////////////////////////////////////////// |
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| 417 | inline mapping_periph_t *boot_get_periph_base(mapping_header_t * header) |
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| 418 | { |
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| 419 | return (mapping_periph_t *) ((char *) header + |
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| 420 | MAPPING_HEADER_SIZE + |
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| 421 | MAPPING_CLUSTER_SIZE * header->clusters + |
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| 422 | MAPPING_PSEG_SIZE * header->psegs + |
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| 423 | MAPPING_VSPACE_SIZE * header->vspaces + |
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| 424 | MAPPING_VOBJ_SIZE * header->vobjs + |
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| 425 | MAPPING_VSEG_SIZE * header->vsegs + |
|---|
| 426 | MAPPING_TASK_SIZE * header->tasks + |
|---|
| 427 | MAPPING_PROC_SIZE * header->procs + |
|---|
| 428 | MAPPING_IRQ_SIZE * header->irqs + |
|---|
| 429 | MAPPING_COPROC_SIZE * header->coprocs + |
|---|
| 430 | MAPPING_CP_PORT_SIZE * header->cp_ports); |
|---|
| 431 | } |
|---|
| 432 | |
|---|
| 433 | ////////////////////////////////////////////////////////////////////////////// |
|---|
| 434 | // boot_pseg_get() |
|---|
| 435 | // This function returns the pointer on a physical segment |
|---|
| 436 | // identified by the pseg index. |
|---|
| 437 | ////////////////////////////////////////////////////////////////////////////// |
|---|
| 438 | mapping_pseg_t *boot_pseg_get(unsigned int seg_id) |
|---|
| 439 | { |
|---|
| 440 | mapping_header_t * header = (mapping_header_t *) & seg_mapping_base; |
|---|
| 441 | mapping_pseg_t * pseg = boot_get_pseg_base(header); |
|---|
| 442 | |
|---|
| 443 | // checking argument |
|---|
| 444 | if (seg_id >= header->psegs) |
|---|
| 445 | { |
|---|
| 446 | boot_puts("\n[BOOT ERROR] : seg_id argument too large\n"); |
|---|
| 447 | boot_puts(" in function boot_pseg_get()\n"); |
|---|
| 448 | boot_exit(); |
|---|
| 449 | } |
|---|
| 450 | |
|---|
| 451 | return &pseg[seg_id]; |
|---|
| 452 | } |
|---|
| 453 | |
|---|
| 454 | ////////////////////////////////////////////////////////////////////////////// |
|---|
| 455 | // boot_add_pte() |
|---|
| 456 | // This function registers a new PTE in the page table defined |
|---|
| 457 | // by the vspace_id argument, and updates both PT1 and PT2. |
|---|
| 458 | // A new PT2 is used when required. |
|---|
| 459 | // As the set of PT2s is implemented as a fixed size array (no dynamic |
|---|
| 460 | // allocation), this function checks a possible overflow of the PT2 array. |
|---|
| 461 | ////////////////////////////////////////////////////////////////////////////// |
|---|
| 462 | void boot_add_pte(unsigned int vspace_id, |
|---|
| 463 | unsigned int vpn, |
|---|
| 464 | unsigned int flags, |
|---|
| 465 | unsigned int ppn, |
|---|
| 466 | unsigned int verbose) |
|---|
| 467 | { |
|---|
| 468 | unsigned int ix1; |
|---|
| 469 | unsigned int ix2; |
|---|
| 470 | paddr_t pt1_pbase; // PT1 physical base address |
|---|
| 471 | paddr_t pt2_pbase; // PT2 physical base address |
|---|
| 472 | paddr_t pte_paddr; // PTE physucal address |
|---|
| 473 | unsigned int pt2_id; // PT2 index |
|---|
| 474 | unsigned int ptd; // PTD : entry in PT1 |
|---|
| 475 | unsigned int max_pt2; // max number of PT2s for a given vspace |
|---|
| 476 | |
|---|
| 477 | ix1 = vpn >> 9; // 11 bits |
|---|
| 478 | ix2 = vpn & 0x1FF; // 9 bits |
|---|
| 479 | |
|---|
| 480 | // check that the boot_max_pt2[vspace_id] has been set |
|---|
| 481 | max_pt2 = boot_max_pt2[vspace_id]; |
|---|
| 482 | |
|---|
| 483 | if (max_pt2 == 0) |
|---|
| 484 | { |
|---|
| 485 | boot_puts("Undefined page table for vspace "); |
|---|
| 486 | boot_putd(vspace_id); |
|---|
| 487 | boot_puts("\n"); |
|---|
| 488 | boot_exit(); |
|---|
| 489 | } |
|---|
| 490 | |
|---|
| 491 | |
|---|
| 492 | // get page table physical base address |
|---|
| 493 | pt1_pbase = boot_ptabs_paddr[vspace_id]; |
|---|
| 494 | |
|---|
| 495 | // get ptd in PT1 |
|---|
| 496 | ptd = boot_physical_read(pt1_pbase + 4 * ix1); |
|---|
| 497 | |
|---|
| 498 | if ((ptd & PTE_V) == 0) // invalid PTD: compute PT2 base address, |
|---|
| 499 | // and set a new PTD in PT1 |
|---|
| 500 | { |
|---|
| 501 | pt2_id = boot_next_free_pt2[vspace_id]; |
|---|
| 502 | if (pt2_id == max_pt2) |
|---|
| 503 | { |
|---|
| 504 | boot_puts("\n[BOOT ERROR] in boot_add_pte() function\n"); |
|---|
| 505 | boot_puts("the length of the ptab vobj is too small\n"); |
|---|
| 506 | boot_exit(); |
|---|
| 507 | } |
|---|
| 508 | else |
|---|
| 509 | { |
|---|
| 510 | pt2_pbase = pt1_pbase + PT1_SIZE + PT2_SIZE * pt2_id; |
|---|
| 511 | ptd = PTE_V | PTE_T | (unsigned int) (pt2_pbase >> 12); |
|---|
| 512 | boot_physical_write( pt1_pbase + 4 * ix1, ptd); |
|---|
| 513 | boot_next_free_pt2[vspace_id] = pt2_id + 1; |
|---|
| 514 | } |
|---|
| 515 | } |
|---|
| 516 | else // valid PTD: compute PT2 base address |
|---|
| 517 | { |
|---|
| 518 | pt2_pbase = ((paddr_t)(ptd & 0x0FFFFFFF)) << 12; |
|---|
| 519 | } |
|---|
| 520 | |
|---|
| 521 | // set PTE in PT2 : flags & PPN in two 32 bits words |
|---|
| 522 | pte_paddr = pt2_pbase + 8 * ix2; |
|---|
| 523 | boot_physical_write(pte_paddr , flags); |
|---|
| 524 | boot_physical_write(pte_paddr + 4, ppn); |
|---|
| 525 | |
|---|
| 526 | if (verbose) |
|---|
| 527 | { |
|---|
| 528 | boot_puts(" / pt1_pbase = "); |
|---|
| 529 | boot_putl( pt1_pbase ); |
|---|
| 530 | boot_puts(" / ptd = "); |
|---|
| 531 | boot_putl( ptd ); |
|---|
| 532 | boot_puts(" / pt2_pbase = "); |
|---|
| 533 | boot_putl( pt2_pbase ); |
|---|
| 534 | boot_puts(" / pte_paddr = "); |
|---|
| 535 | boot_putl( pte_paddr ); |
|---|
| 536 | boot_puts(" / ppn = "); |
|---|
| 537 | boot_putx( ppn ); |
|---|
| 538 | boot_puts("/\n"); |
|---|
| 539 | } |
|---|
| 540 | |
|---|
| 541 | } // end boot_add_pte() |
|---|
| 542 | |
|---|
| 543 | |
|---|
| 544 | ///////////////////////////////////////////////////////////////////// |
|---|
| 545 | // This function build the page table for a given vspace. |
|---|
| 546 | // The physical base addresses for all vsegs (global and private) |
|---|
| 547 | // must have been previously computed and stored in the mapping. |
|---|
| 548 | // It initializes the MWMR channels. |
|---|
| 549 | ///////////////////////////////////////////////////////////////////// |
|---|
| 550 | void boot_vspace_pt_build(unsigned int vspace_id) |
|---|
| 551 | { |
|---|
| 552 | unsigned int vseg_id; |
|---|
| 553 | unsigned int npages; |
|---|
| 554 | unsigned int ppn; |
|---|
| 555 | unsigned int vpn; |
|---|
| 556 | unsigned int flags; |
|---|
| 557 | unsigned int page_id; |
|---|
| 558 | unsigned int verbose = 0; // can be used to activate trace in add_pte() |
|---|
| 559 | |
|---|
| 560 | mapping_header_t * header = (mapping_header_t *) & seg_mapping_base; |
|---|
| 561 | mapping_vspace_t * vspace = boot_get_vspace_base(header); |
|---|
| 562 | mapping_vseg_t * vseg = boot_get_vseg_base(header); |
|---|
| 563 | |
|---|
| 564 | // private segments |
|---|
| 565 | for (vseg_id = vspace[vspace_id].vseg_offset; |
|---|
| 566 | vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs); |
|---|
| 567 | vseg_id++) |
|---|
| 568 | { |
|---|
| 569 | vpn = vseg[vseg_id].vbase >> 12; |
|---|
| 570 | ppn = (unsigned int) (vseg[vseg_id].pbase >> 12); |
|---|
| 571 | |
|---|
| 572 | npages = vseg[vseg_id].length >> 12; |
|---|
| 573 | if ((vseg[vseg_id].length & 0xFFF) != 0) npages++; |
|---|
| 574 | |
|---|
| 575 | flags = PTE_V; |
|---|
| 576 | if (vseg[vseg_id].mode & C_MODE_MASK) flags = flags | PTE_C; |
|---|
| 577 | if (vseg[vseg_id].mode & X_MODE_MASK) flags = flags | PTE_X; |
|---|
| 578 | if (vseg[vseg_id].mode & W_MODE_MASK) flags = flags | PTE_W; |
|---|
| 579 | if (vseg[vseg_id].mode & U_MODE_MASK) flags = flags | PTE_U; |
|---|
| 580 | |
|---|
| 581 | #if BOOT_DEBUG_PT |
|---|
| 582 | boot_puts(vseg[vseg_id].name); |
|---|
| 583 | boot_puts(" : flags = "); |
|---|
| 584 | boot_putx(flags); |
|---|
| 585 | boot_puts(" / npages = "); |
|---|
| 586 | boot_putd(npages); |
|---|
| 587 | boot_puts(" / pbase = "); |
|---|
| 588 | boot_putl(vseg[vseg_id].pbase); |
|---|
| 589 | boot_puts("\n"); |
|---|
| 590 | #endif |
|---|
| 591 | // loop on 4K pages |
|---|
| 592 | for (page_id = 0; page_id < npages; page_id++) |
|---|
| 593 | { |
|---|
| 594 | boot_add_pte(vspace_id, vpn, flags, ppn, verbose); |
|---|
| 595 | vpn++; |
|---|
| 596 | ppn++; |
|---|
| 597 | } |
|---|
| 598 | } |
|---|
| 599 | |
|---|
| 600 | // global segments |
|---|
| 601 | for (vseg_id = 0; vseg_id < header->globals; vseg_id++) |
|---|
| 602 | { |
|---|
| 603 | vpn = vseg[vseg_id].vbase >> 12; |
|---|
| 604 | ppn = (unsigned int)(vseg[vseg_id].pbase >> 12); |
|---|
| 605 | npages = vseg[vseg_id].length >> 12; |
|---|
| 606 | if ((vseg[vseg_id].length & 0xFFF) != 0) npages++; |
|---|
| 607 | |
|---|
| 608 | flags = PTE_V; |
|---|
| 609 | if (vseg[vseg_id].mode & C_MODE_MASK) flags = flags | PTE_C; |
|---|
| 610 | if (vseg[vseg_id].mode & X_MODE_MASK) flags = flags | PTE_X; |
|---|
| 611 | if (vseg[vseg_id].mode & W_MODE_MASK) flags = flags | PTE_W; |
|---|
| 612 | if (vseg[vseg_id].mode & U_MODE_MASK) flags = flags | PTE_U; |
|---|
| 613 | |
|---|
| 614 | #if BOOT_DEBUG_PT |
|---|
| 615 | boot_puts(vseg[vseg_id].name); |
|---|
| 616 | boot_puts(" : flags = "); |
|---|
| 617 | boot_putx(flags); |
|---|
| 618 | boot_puts(" / npages = "); |
|---|
| 619 | boot_putd(npages); |
|---|
| 620 | boot_puts(" / pbase = "); |
|---|
| 621 | boot_putl(vseg[vseg_id].pbase); |
|---|
| 622 | boot_puts("\n"); |
|---|
| 623 | #endif |
|---|
| 624 | // loop on 4K pages |
|---|
| 625 | for (page_id = 0; page_id < npages; page_id++) |
|---|
| 626 | { |
|---|
| 627 | boot_add_pte(vspace_id, vpn, flags, ppn, verbose); |
|---|
| 628 | vpn++; |
|---|
| 629 | ppn++; |
|---|
| 630 | } |
|---|
| 631 | } |
|---|
| 632 | } // end boot_vspace_pt_build() |
|---|
| 633 | |
|---|
| 634 | |
|---|
| 635 | /////////////////////////////////////////////////////////////////////////// |
|---|
| 636 | // Align the value of paddr or vaddr to the required alignement, |
|---|
| 637 | // defined by alignPow2 == L2(alignement). |
|---|
| 638 | /////////////////////////////////////////////////////////////////////////// |
|---|
| 639 | paddr_t paddr_align_to(paddr_t paddr, unsigned int alignPow2) |
|---|
| 640 | { |
|---|
| 641 | paddr_t mask = (1 << alignPow2) - 1; |
|---|
| 642 | return ((paddr + mask) & ~mask); |
|---|
| 643 | } |
|---|
| 644 | |
|---|
| 645 | unsigned int vaddr_align_to(unsigned int vaddr, unsigned int alignPow2) |
|---|
| 646 | { |
|---|
| 647 | unsigned int mask = (1 << alignPow2) - 1; |
|---|
| 648 | return ((vaddr + mask) & ~mask); |
|---|
| 649 | } |
|---|
| 650 | |
|---|
| 651 | /////////////////////////////////////////////////////////////////////////// |
|---|
| 652 | // This function computes the physical base address for a vseg |
|---|
| 653 | // as specified in the mapping info data structure. |
|---|
| 654 | // It updates the pbase and the length fields of the vseg. |
|---|
| 655 | // It updates the pbase and vbase fields of all vobjs in the vseg. |
|---|
| 656 | // It updates the next_base field of the pseg, and checks overflow. |
|---|
| 657 | // It updates the boot_ptabs_paddr[] and boot_ptabs_vaddr[] arrays. |
|---|
| 658 | // It is a global vseg if vspace_id = (-1). |
|---|
| 659 | /////////////////////////////////////////////////////////////////////////// |
|---|
| 660 | void boot_vseg_map(mapping_vseg_t * vseg, unsigned int vspace_id) |
|---|
| 661 | { |
|---|
| 662 | unsigned int vobj_id; |
|---|
| 663 | unsigned int cur_vaddr; |
|---|
| 664 | paddr_t cur_paddr; |
|---|
| 665 | unsigned int offset; |
|---|
| 666 | |
|---|
| 667 | mapping_header_t * header = (mapping_header_t *) & seg_mapping_base; |
|---|
| 668 | mapping_vobj_t * vobj = boot_get_vobj_base(header); |
|---|
| 669 | |
|---|
| 670 | // get physical segment pointer |
|---|
| 671 | mapping_pseg_t* pseg = boot_pseg_get(vseg->psegid); |
|---|
| 672 | |
|---|
| 673 | // compute vseg physical base address |
|---|
| 674 | if (vseg->ident != 0) // identity mapping required |
|---|
| 675 | { |
|---|
| 676 | vseg->pbase = vseg->vbase; |
|---|
| 677 | } |
|---|
| 678 | else // unconstrained mapping |
|---|
| 679 | { |
|---|
| 680 | vseg->pbase = pseg->next_base; |
|---|
| 681 | |
|---|
| 682 | // test alignment constraint |
|---|
| 683 | if (vobj[vseg->vobj_offset].align) |
|---|
| 684 | { |
|---|
| 685 | vseg->pbase = paddr_align_to(vseg->pbase, vobj[vseg->vobj_offset].align); |
|---|
| 686 | } |
|---|
| 687 | } |
|---|
| 688 | |
|---|
| 689 | // loop on vobjs contained in vseg to : |
|---|
| 690 | // (1) computes the length of the vseg, |
|---|
| 691 | // (2) initialize the vaddr and paddr fields of all vobjs, |
|---|
| 692 | // (3) initialize the page table pointers arrays |
|---|
| 693 | |
|---|
| 694 | cur_vaddr = vseg->vbase; |
|---|
| 695 | cur_paddr = vseg->pbase; |
|---|
| 696 | |
|---|
| 697 | for (vobj_id = vseg->vobj_offset; |
|---|
| 698 | vobj_id < (vseg->vobj_offset + vseg->vobjs); vobj_id++) |
|---|
| 699 | { |
|---|
| 700 | if (vobj[vobj_id].align) |
|---|
| 701 | { |
|---|
| 702 | cur_paddr = paddr_align_to(cur_paddr, vobj[vobj_id].align); |
|---|
| 703 | cur_vaddr = vaddr_align_to(cur_vaddr, vobj[vobj_id].align); |
|---|
| 704 | } |
|---|
| 705 | // set vaddr/paddr for current vobj |
|---|
| 706 | vobj[vobj_id].vaddr = cur_vaddr; |
|---|
| 707 | vobj[vobj_id].paddr = cur_paddr; |
|---|
| 708 | |
|---|
| 709 | // initialize boot_ptabs_vaddr[] & boot_ptabs-paddr[] if PTAB |
|---|
| 710 | if (vobj[vobj_id].type == VOBJ_TYPE_PTAB) |
|---|
| 711 | { |
|---|
| 712 | if (vspace_id == ((unsigned int) -1)) // global vseg |
|---|
| 713 | { |
|---|
| 714 | boot_puts("\n[BOOT ERROR] in boot_vseg_map() function: "); |
|---|
| 715 | boot_puts("a PTAB vobj cannot be global"); |
|---|
| 716 | boot_exit(); |
|---|
| 717 | } |
|---|
| 718 | // we need at least one PT2 |
|---|
| 719 | if (vobj[vobj_id].length < (PT1_SIZE + PT2_SIZE)) |
|---|
| 720 | { |
|---|
| 721 | boot_puts("\n[BOOT ERROR] in boot_vseg_map() function, "); |
|---|
| 722 | boot_puts("PTAB too small, minumum size is: "); |
|---|
| 723 | boot_putx(PT1_SIZE + PT2_SIZE); |
|---|
| 724 | boot_exit(); |
|---|
| 725 | } |
|---|
| 726 | // register both physical and virtual page table address |
|---|
| 727 | boot_ptabs_vaddr[vspace_id] = vobj[vobj_id].vaddr; |
|---|
| 728 | boot_ptabs_paddr[vspace_id] = vobj[vobj_id].paddr; |
|---|
| 729 | |
|---|
| 730 | // reset all valid bits in PT1 |
|---|
| 731 | for ( offset = 0 ; offset < 8192 ; offset = offset + 4) |
|---|
| 732 | { |
|---|
| 733 | boot_physical_write(cur_paddr + offset, 0); |
|---|
| 734 | } |
|---|
| 735 | |
|---|
| 736 | // computing the number of second level pages |
|---|
| 737 | boot_max_pt2[vspace_id] = (vobj[vobj_id].length - PT1_SIZE) / PT2_SIZE; |
|---|
| 738 | } |
|---|
| 739 | |
|---|
| 740 | // set next vaddr/paddr |
|---|
| 741 | cur_vaddr = cur_vaddr + vobj[vobj_id].length; |
|---|
| 742 | cur_paddr = cur_paddr + vobj[vobj_id].length; |
|---|
| 743 | } // end for vobjs |
|---|
| 744 | |
|---|
| 745 | //set the vseg length |
|---|
| 746 | vseg->length = vaddr_align_to((unsigned int)(cur_paddr - vseg->pbase), 12); |
|---|
| 747 | |
|---|
| 748 | // checking pseg overflow |
|---|
| 749 | if ((vseg->pbase < pseg->base) || |
|---|
| 750 | ((vseg->pbase + vseg->length) > (pseg->base + pseg->length))) |
|---|
| 751 | { |
|---|
| 752 | boot_puts("\n[BOOT ERROR] in boot_vseg_map() function\n"); |
|---|
| 753 | boot_puts("impossible mapping for virtual segment: "); |
|---|
| 754 | boot_puts(vseg->name); |
|---|
| 755 | boot_puts("\n"); |
|---|
| 756 | boot_puts("vseg pbase = "); |
|---|
| 757 | boot_putl(vseg->pbase); |
|---|
| 758 | boot_puts("\n"); |
|---|
| 759 | boot_puts("vseg length = "); |
|---|
| 760 | boot_putx(vseg->length); |
|---|
| 761 | boot_puts("\n"); |
|---|
| 762 | boot_puts("pseg pbase = "); |
|---|
| 763 | boot_putl(pseg->base); |
|---|
| 764 | boot_puts("\n"); |
|---|
| 765 | boot_puts("pseg length = "); |
|---|
| 766 | boot_putl(pseg->length); |
|---|
| 767 | boot_puts("\n"); |
|---|
| 768 | boot_exit(); |
|---|
| 769 | } |
|---|
| 770 | |
|---|
| 771 | #if BOOT_DEBUG_PT |
|---|
| 772 | boot_puts(vseg->name); |
|---|
| 773 | boot_puts(" : len = "); |
|---|
| 774 | boot_putx(vseg->length); |
|---|
| 775 | boot_puts(" / vbase = "); |
|---|
| 776 | boot_putx(vseg->vbase); |
|---|
| 777 | boot_puts(" / pbase = "); |
|---|
| 778 | boot_putl(vseg->pbase); |
|---|
| 779 | boot_puts("\n"); |
|---|
| 780 | #endif |
|---|
| 781 | |
|---|
| 782 | // set the next_base field in pseg when it's a RAM |
|---|
| 783 | if ( pseg->type == PSEG_TYPE_RAM ) |
|---|
| 784 | { |
|---|
| 785 | pseg->next_base = vseg->pbase + vseg->length; |
|---|
| 786 | } |
|---|
| 787 | } // end boot_vseg_map() |
|---|
| 788 | |
|---|
| 789 | ///////////////////////////////////////////////////////////////////// |
|---|
| 790 | // This function checks consistence beween the mapping_info data |
|---|
| 791 | // structure (soft), and the giet_config file (hard). |
|---|
| 792 | ///////////////////////////////////////////////////////////////////// |
|---|
| 793 | void boot_check_mapping() |
|---|
| 794 | { |
|---|
| 795 | mapping_header_t * header = (mapping_header_t *) & seg_mapping_base; |
|---|
| 796 | mapping_cluster_t * cluster = boot_get_cluster_base(header); |
|---|
| 797 | mapping_periph_t * periph = boot_get_periph_base(header); |
|---|
| 798 | |
|---|
| 799 | // checking mapping availability |
|---|
| 800 | if (header->signature != IN_MAPPING_SIGNATURE) |
|---|
| 801 | { |
|---|
| 802 | boot_puts("\n[BOOT ERROR] Illegal mapping signature: "); |
|---|
| 803 | boot_putx(header->signature); |
|---|
| 804 | boot_puts("\n"); |
|---|
| 805 | boot_exit(); |
|---|
| 806 | } |
|---|
| 807 | // checking number of clusters |
|---|
| 808 | if (header->clusters != NB_CLUSTERS) |
|---|
| 809 | { |
|---|
| 810 | boot_puts("\n[BOOT ERROR] Incoherent NB_CLUSTERS"); |
|---|
| 811 | boot_puts("\n - In giet_config, value = "); |
|---|
| 812 | boot_putd(NB_CLUSTERS); |
|---|
| 813 | boot_puts("\n - In mapping_info, value = "); |
|---|
| 814 | boot_putd(header->clusters); |
|---|
| 815 | boot_puts("\n"); |
|---|
| 816 | boot_exit(); |
|---|
| 817 | } |
|---|
| 818 | // checking number of virtual spaces |
|---|
| 819 | if (header->vspaces > GIET_NB_VSPACE_MAX) |
|---|
| 820 | { |
|---|
| 821 | boot_puts("\n[BOOT ERROR] : number of vspaces > GIET_NB_VSPACE_MAX\n"); |
|---|
| 822 | boot_puts("\n"); |
|---|
| 823 | boot_exit(); |
|---|
| 824 | } |
|---|
| 825 | // checking hardware |
|---|
| 826 | unsigned int periph_id; |
|---|
| 827 | unsigned int cluster_id; |
|---|
| 828 | unsigned int tty_found = 0; |
|---|
| 829 | unsigned int nic_found = 0; |
|---|
| 830 | for (cluster_id = 0; cluster_id < NB_CLUSTERS; cluster_id++) |
|---|
| 831 | { |
|---|
| 832 | // NB_PROCS_MAX |
|---|
| 833 | if (cluster[cluster_id].procs > NB_PROCS_MAX) |
|---|
| 834 | { |
|---|
| 835 | boot_puts("\n[BOOT ERROR] too many processors in cluster "); |
|---|
| 836 | boot_putd(cluster_id); |
|---|
| 837 | boot_puts(" : procs = "); |
|---|
| 838 | boot_putd(cluster[cluster_id].procs); |
|---|
| 839 | boot_puts("\n"); |
|---|
| 840 | boot_exit(); |
|---|
| 841 | } |
|---|
| 842 | |
|---|
| 843 | for (periph_id = cluster[cluster_id].periph_offset; |
|---|
| 844 | periph_id < cluster[cluster_id].periph_offset + cluster[cluster_id].periphs; |
|---|
| 845 | periph_id++) |
|---|
| 846 | { |
|---|
| 847 | // NB_TTY_CHANNELS |
|---|
| 848 | if (periph[periph_id].type == PERIPH_TYPE_TTY) |
|---|
| 849 | { |
|---|
| 850 | if (tty_found) |
|---|
| 851 | { |
|---|
| 852 | boot_puts("\n[BOOT ERROR] TTY component should not be replicated\n"); |
|---|
| 853 | boot_exit(); |
|---|
| 854 | } |
|---|
| 855 | if (periph[periph_id].channels > NB_TTY_CHANNELS) |
|---|
| 856 | { |
|---|
| 857 | boot_puts("\n[BOOT ERROR] Wrong NB_TTY_CHANNELS in cluster "); |
|---|
| 858 | boot_putd(cluster_id); |
|---|
| 859 | boot_puts(" : ttys = "); |
|---|
| 860 | boot_putd(periph[periph_id].channels); |
|---|
| 861 | boot_puts("\n"); |
|---|
| 862 | boot_exit(); |
|---|
| 863 | } |
|---|
| 864 | tty_found = 1; |
|---|
| 865 | } |
|---|
| 866 | // NB_NIC_CHANNELS |
|---|
| 867 | if (periph[periph_id].type == PERIPH_TYPE_NIC) |
|---|
| 868 | { |
|---|
| 869 | if (nic_found) |
|---|
| 870 | { |
|---|
| 871 | boot_puts("\n[BOOT ERROR] NIC component should not be replicated\n"); |
|---|
| 872 | boot_exit(); |
|---|
| 873 | } |
|---|
| 874 | if (periph[periph_id].channels != NB_NIC_CHANNELS) |
|---|
| 875 | { |
|---|
| 876 | boot_puts("\n[BOOT ERROR] Wrong NB_NIC_CHANNELS in cluster "); |
|---|
| 877 | boot_putd(cluster_id); |
|---|
| 878 | boot_puts(" : nics = "); |
|---|
| 879 | boot_putd(periph[periph_id].channels); |
|---|
| 880 | boot_puts("\n"); |
|---|
| 881 | boot_exit(); |
|---|
| 882 | } |
|---|
| 883 | nic_found = 1; |
|---|
| 884 | } |
|---|
| 885 | // NB_TIMERS |
|---|
| 886 | if (periph[periph_id].type == PERIPH_TYPE_TIM) |
|---|
| 887 | { |
|---|
| 888 | if (periph[periph_id].channels > NB_TIM_CHANNELS) |
|---|
| 889 | { |
|---|
| 890 | boot_puts("\n[BOOT ERROR] Too much user timers in cluster "); |
|---|
| 891 | boot_putd(cluster_id); |
|---|
| 892 | boot_puts(" : timers = "); |
|---|
| 893 | boot_putd(periph[periph_id].channels); |
|---|
| 894 | boot_puts("\n"); |
|---|
| 895 | boot_exit(); |
|---|
| 896 | } |
|---|
| 897 | } |
|---|
| 898 | // NB_DMAS |
|---|
| 899 | if (periph[periph_id].type == PERIPH_TYPE_DMA) |
|---|
| 900 | { |
|---|
| 901 | if (periph[periph_id].channels != NB_DMA_CHANNELS) |
|---|
| 902 | { |
|---|
| 903 | boot_puts("\n[BOOT ERROR] Too much DMA channels in cluster "); |
|---|
| 904 | boot_putd(cluster_id); |
|---|
| 905 | boot_puts(" : channels = "); |
|---|
| 906 | boot_putd(periph[periph_id].channels); |
|---|
| 907 | boot_puts(" - NB_DMA_CHANNELS : "); |
|---|
| 908 | boot_putd(NB_DMA_CHANNELS); |
|---|
| 909 | boot_puts("\n"); |
|---|
| 910 | boot_exit(); |
|---|
| 911 | } |
|---|
| 912 | } |
|---|
| 913 | } // end for periphs |
|---|
| 914 | } // end for clusters |
|---|
| 915 | } // end boot_check_mapping() |
|---|
| 916 | |
|---|
| 917 | ///////////////////////////////////////////////////////////////////// |
|---|
| 918 | // This function initialises the physical pages table allocators |
|---|
| 919 | // for all psegs (i.e. next_base field of the pseg). |
|---|
| 920 | ///////////////////////////////////////////////////////////////////// |
|---|
| 921 | void boot_psegs_init() |
|---|
| 922 | { |
|---|
| 923 | mapping_header_t* header = (mapping_header_t *) &seg_mapping_base; |
|---|
| 924 | mapping_cluster_t* cluster = boot_get_cluster_base(header); |
|---|
| 925 | mapping_pseg_t* pseg = boot_get_pseg_base(header); |
|---|
| 926 | |
|---|
| 927 | unsigned int cluster_id; |
|---|
| 928 | unsigned int pseg_id; |
|---|
| 929 | |
|---|
| 930 | #if BOOT_DEBUG_PT |
|---|
| 931 | boot_puts ("\n[BOOT DEBUG] ****** psegs allocators initialisation ******\n"); |
|---|
| 932 | #endif |
|---|
| 933 | |
|---|
| 934 | for (cluster_id = 0; cluster_id < header->clusters; cluster_id++) |
|---|
| 935 | { |
|---|
| 936 | if (cluster[cluster_id].procs > NB_PROCS_MAX) |
|---|
| 937 | { |
|---|
| 938 | boot_puts("\n[BOOT ERROR] The number of processors in cluster "); |
|---|
| 939 | boot_putd(cluster_id); |
|---|
| 940 | boot_puts(" is larger than NB_PROCS_MAX \n"); |
|---|
| 941 | boot_exit(); |
|---|
| 942 | } |
|---|
| 943 | |
|---|
| 944 | for (pseg_id = cluster[cluster_id].pseg_offset; |
|---|
| 945 | pseg_id < cluster[cluster_id].pseg_offset + cluster[cluster_id].psegs; |
|---|
| 946 | pseg_id++) |
|---|
| 947 | { |
|---|
| 948 | pseg[pseg_id].next_base = pseg[pseg_id].base; |
|---|
| 949 | |
|---|
| 950 | #if BOOT_DEBUG_PT |
|---|
| 951 | boot_puts("cluster "); |
|---|
| 952 | boot_putd(cluster_id); |
|---|
| 953 | boot_puts(" / pseg "); |
|---|
| 954 | boot_puts(pseg[pseg_id].name); |
|---|
| 955 | boot_puts(" : next_base = "); |
|---|
| 956 | boot_putl(pseg[pseg_id].next_base); |
|---|
| 957 | boot_puts("\n"); |
|---|
| 958 | #endif |
|---|
| 959 | } |
|---|
| 960 | } |
|---|
| 961 | } // end boot_psegs_init() |
|---|
| 962 | |
|---|
| 963 | ///////////////////////////////////////////////////////////////////// |
|---|
| 964 | // This function builds the page tables for all virtual spaces |
|---|
| 965 | // defined in the mapping_info data structure, in three steps: |
|---|
| 966 | // - step 1 : It computes the physical base address for global vsegs |
|---|
| 967 | // and for all associated vobjs. |
|---|
| 968 | // - step 2 : It computes the physical base address for all private |
|---|
| 969 | // vsegs and all vobjs in each virtual space. |
|---|
| 970 | // - step 3 : It actually fill the page table for each vspace. |
|---|
| 971 | ///////////////////////////////////////////////////////////////////// |
|---|
| 972 | void boot_pt_init() |
|---|
| 973 | { |
|---|
| 974 | mapping_header_t * header = (mapping_header_t *) &seg_mapping_base; |
|---|
| 975 | mapping_vspace_t * vspace = boot_get_vspace_base(header); |
|---|
| 976 | mapping_vseg_t * vseg = boot_get_vseg_base(header); |
|---|
| 977 | |
|---|
| 978 | unsigned int vspace_id; |
|---|
| 979 | unsigned int vseg_id; |
|---|
| 980 | |
|---|
| 981 | #if BOOT_DEBUG_PT |
|---|
| 982 | boot_puts("\n[BOOT DEBUG] ****** mapping global vsegs ******\n"); |
|---|
| 983 | #endif |
|---|
| 984 | |
|---|
| 985 | // step 1 : loop on virtual spaces to map global vsegs |
|---|
| 986 | for (vseg_id = 0; vseg_id < header->globals; vseg_id++) |
|---|
| 987 | { |
|---|
| 988 | boot_vseg_map(&vseg[vseg_id], ((unsigned int) (-1))); |
|---|
| 989 | } |
|---|
| 990 | |
|---|
| 991 | // step 2 : loop on virtual vspaces to map private vsegs |
|---|
| 992 | for (vspace_id = 0; vspace_id < header->vspaces; vspace_id++) |
|---|
| 993 | { |
|---|
| 994 | |
|---|
| 995 | #if BOOT_DEBUG_PT |
|---|
| 996 | boot_puts("\n[BOOT DEBUG] ****** mapping private vsegs in vspace "); |
|---|
| 997 | boot_puts(vspace[vspace_id].name); |
|---|
| 998 | boot_puts(" ******\n"); |
|---|
| 999 | #endif |
|---|
| 1000 | |
|---|
| 1001 | for (vseg_id = vspace[vspace_id].vseg_offset; |
|---|
| 1002 | vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs); |
|---|
| 1003 | vseg_id++) |
|---|
| 1004 | { |
|---|
| 1005 | boot_vseg_map(&vseg[vseg_id], vspace_id); |
|---|
| 1006 | } |
|---|
| 1007 | } |
|---|
| 1008 | |
|---|
| 1009 | // step 3 : loop on the vspaces to build the page tables |
|---|
| 1010 | for (vspace_id = 0; vspace_id < header->vspaces; vspace_id++) |
|---|
| 1011 | { |
|---|
| 1012 | #if BOOT_DEBUG_PT |
|---|
| 1013 | boot_puts("\n[BOOT DEBUG] ****** building page table for vspace "); |
|---|
| 1014 | boot_puts(vspace[vspace_id].name); |
|---|
| 1015 | boot_puts(" ******\n"); |
|---|
| 1016 | #endif |
|---|
| 1017 | boot_vspace_pt_build(vspace_id); |
|---|
| 1018 | |
|---|
| 1019 | #if BOOT_DEBUG_PT |
|---|
| 1020 | boot_puts("\n>>> page table physical address = "); |
|---|
| 1021 | boot_putl(boot_ptabs_paddr[vspace_id]); |
|---|
| 1022 | boot_puts(", number of PT2 = "); |
|---|
| 1023 | boot_putd((unsigned int) boot_max_pt2[vspace_id]); |
|---|
| 1024 | boot_puts("\n"); |
|---|
| 1025 | #endif |
|---|
| 1026 | } |
|---|
| 1027 | } // end boot_pt_init() |
|---|
| 1028 | |
|---|
| 1029 | /////////////////////////////////////////////////////////////////////////////// |
|---|
| 1030 | // This function initializes all private vobjs defined in the vspaces, |
|---|
| 1031 | // such as mwmr channels, barriers and locks, because these vobjs |
|---|
| 1032 | // are not known, and not initialized by the compiler. |
|---|
| 1033 | // Warning : The MMU is supposed to be activated... |
|---|
| 1034 | /////////////////////////////////////////////////////////////////////////////// |
|---|
| 1035 | void boot_vobjs_init() |
|---|
| 1036 | { |
|---|
| 1037 | mapping_header_t* header = (mapping_header_t *) & seg_mapping_base; |
|---|
| 1038 | mapping_vspace_t* vspace = boot_get_vspace_base(header); |
|---|
| 1039 | mapping_vobj_t* vobj = boot_get_vobj_base(header); |
|---|
| 1040 | |
|---|
| 1041 | unsigned int vspace_id; |
|---|
| 1042 | unsigned int vobj_id; |
|---|
| 1043 | |
|---|
| 1044 | // loop on the vspaces |
|---|
| 1045 | for (vspace_id = 0; vspace_id < header->vspaces; vspace_id++) |
|---|
| 1046 | { |
|---|
| 1047 | |
|---|
| 1048 | #if BOOT_DEBUG_VOBJS |
|---|
| 1049 | boot_puts("\n[BOOT DEBUG] ****** vobjs initialisation in vspace "); |
|---|
| 1050 | boot_puts(vspace[vspace_id].name); |
|---|
| 1051 | boot_puts(" ******\n"); |
|---|
| 1052 | #endif |
|---|
| 1053 | |
|---|
| 1054 | unsigned int ptab_found = 0; |
|---|
| 1055 | |
|---|
| 1056 | // loop on the vobjs |
|---|
| 1057 | for (vobj_id = vspace[vspace_id].vobj_offset; |
|---|
| 1058 | vobj_id < (vspace[vspace_id].vobj_offset + vspace[vspace_id].vobjs); |
|---|
| 1059 | vobj_id++) |
|---|
| 1060 | { |
|---|
| 1061 | switch (vobj[vobj_id].type) |
|---|
| 1062 | { |
|---|
| 1063 | case VOBJ_TYPE_MWMR: // storage capacity is (vobj.length/4 - 5) words |
|---|
| 1064 | { |
|---|
| 1065 | mwmr_channel_t* mwmr = (mwmr_channel_t *) (vobj[vobj_id].vaddr); |
|---|
| 1066 | mwmr->ptw = 0; |
|---|
| 1067 | mwmr->ptr = 0; |
|---|
| 1068 | mwmr->sts = 0; |
|---|
| 1069 | mwmr->width = vobj[vobj_id].init; |
|---|
| 1070 | mwmr->depth = (vobj[vobj_id].length >> 2) - 6; |
|---|
| 1071 | mwmr->lock = 0; |
|---|
| 1072 | #if BOOT_DEBUG_VOBJS |
|---|
| 1073 | boot_puts("MWMR : "); |
|---|
| 1074 | boot_puts(vobj[vobj_id].name); |
|---|
| 1075 | boot_puts(" / depth = "); |
|---|
| 1076 | boot_putd(mwmr->depth); |
|---|
| 1077 | boot_puts(" / width = "); |
|---|
| 1078 | boot_putd(mwmr->width); |
|---|
| 1079 | boot_puts("\n"); |
|---|
| 1080 | #endif |
|---|
| 1081 | break; |
|---|
| 1082 | } |
|---|
| 1083 | case VOBJ_TYPE_ELF: // initialisation done by the loader |
|---|
| 1084 | { |
|---|
| 1085 | #if BOOT_DEBUG_VOBJS |
|---|
| 1086 | boot_puts("ELF : "); |
|---|
| 1087 | boot_puts(vobj[vobj_id].name); |
|---|
| 1088 | boot_puts(" / length = "); |
|---|
| 1089 | boot_putx(vobj[vobj_id].length); |
|---|
| 1090 | boot_puts("\n"); |
|---|
| 1091 | #endif |
|---|
| 1092 | break; |
|---|
| 1093 | } |
|---|
| 1094 | case VOBJ_TYPE_BLOB: // initialisation done by the loader |
|---|
| 1095 | { |
|---|
| 1096 | #if BOOT_DEBUG_VOBJS |
|---|
| 1097 | boot_puts("BLOB : "); |
|---|
| 1098 | boot_puts(vobj[vobj_id].name); |
|---|
| 1099 | boot_puts(" / length = "); |
|---|
| 1100 | boot_putx(vobj[vobj_id].length); |
|---|
| 1101 | boot_puts("\n"); |
|---|
| 1102 | #endif |
|---|
| 1103 | break; |
|---|
| 1104 | } |
|---|
| 1105 | case VOBJ_TYPE_BARRIER: // init is the number of participants |
|---|
| 1106 | { |
|---|
| 1107 | giet_barrier_t* barrier = (giet_barrier_t *) (vobj[vobj_id].vaddr); |
|---|
| 1108 | barrier->count = vobj[vobj_id].init; |
|---|
| 1109 | barrier->init = vobj[vobj_id].init; |
|---|
| 1110 | #if BOOT_DEBUG_VOBJS |
|---|
| 1111 | boot_puts("BARRIER : "); |
|---|
| 1112 | boot_puts(vobj[vobj_id].name); |
|---|
| 1113 | boot_puts(" / init_value = "); |
|---|
| 1114 | boot_putd(barrier->init); |
|---|
| 1115 | boot_puts("\n"); |
|---|
| 1116 | #endif |
|---|
| 1117 | break; |
|---|
| 1118 | } |
|---|
| 1119 | case VOBJ_TYPE_LOCK: // init value is "not taken" |
|---|
| 1120 | { |
|---|
| 1121 | unsigned int* lock = (unsigned int *) (vobj[vobj_id].vaddr); |
|---|
| 1122 | *lock = 0; |
|---|
| 1123 | #if BOOT_DEBUG_VOBJS |
|---|
| 1124 | boot_puts("LOCK : "); |
|---|
| 1125 | boot_puts(vobj[vobj_id].name); |
|---|
| 1126 | boot_puts("\n"); |
|---|
| 1127 | #endif |
|---|
| 1128 | break; |
|---|
| 1129 | } |
|---|
| 1130 | case VOBJ_TYPE_BUFFER: // nothing to initialise |
|---|
| 1131 | { |
|---|
| 1132 | #if BOOT_DEBUG_VOBJS |
|---|
| 1133 | boot_puts("BUFFER : "); |
|---|
| 1134 | boot_puts(vobj[vobj_id].name); |
|---|
| 1135 | boot_puts(" / paddr = "); |
|---|
| 1136 | boot_putl(vobj[vobj_id].paddr); |
|---|
| 1137 | boot_puts(" / length = "); |
|---|
| 1138 | boot_putx(vobj[vobj_id].length); |
|---|
| 1139 | boot_puts("\n"); |
|---|
| 1140 | #endif |
|---|
| 1141 | break; |
|---|
| 1142 | } |
|---|
| 1143 | case VOBJ_TYPE_MEMSPACE: |
|---|
| 1144 | { |
|---|
| 1145 | giet_memspace_t* memspace = (giet_memspace_t *) vobj[vobj_id].vaddr; |
|---|
| 1146 | memspace->buffer = (void *) vobj[vobj_id].vaddr + 8; |
|---|
| 1147 | memspace->size = vobj[vobj_id].length - 8; |
|---|
| 1148 | #if BOOT_DEBUG_VOBJS |
|---|
| 1149 | boot_puts("MEMSPACE : "); |
|---|
| 1150 | boot_puts(vobj[vobj_id].name); |
|---|
| 1151 | boot_puts(" / vaddr = "); |
|---|
| 1152 | boot_putx(vobj[vobj_id].vaddr); |
|---|
| 1153 | boot_puts(" / length = "); |
|---|
| 1154 | boot_putx(vobj[vobj_id].length); |
|---|
| 1155 | boot_puts(" / buffer = "); |
|---|
| 1156 | boot_putx((unsigned int)memspace->buffer); |
|---|
| 1157 | boot_puts(" / size = "); |
|---|
| 1158 | boot_putx(memspace->size); |
|---|
| 1159 | boot_puts("\n"); |
|---|
| 1160 | #endif |
|---|
| 1161 | break; |
|---|
| 1162 | } |
|---|
| 1163 | case VOBJ_TYPE_PTAB: // nothing to initialize |
|---|
| 1164 | { |
|---|
| 1165 | ptab_found = 1; |
|---|
| 1166 | #if BOOT_DEBUG_VOBJS |
|---|
| 1167 | boot_puts("PTAB : "); |
|---|
| 1168 | boot_puts(vobj[vobj_id].name); |
|---|
| 1169 | boot_puts(" / length = "); |
|---|
| 1170 | boot_putx(vobj[vobj_id].length); |
|---|
| 1171 | boot_puts("\n"); |
|---|
| 1172 | #endif |
|---|
| 1173 | break; |
|---|
| 1174 | } |
|---|
| 1175 | case VOBJ_TYPE_CONST: |
|---|
| 1176 | { |
|---|
| 1177 | unsigned int* addr = (unsigned int *) vobj[vobj_id].vaddr; |
|---|
| 1178 | *addr = vobj[vobj_id].init; |
|---|
| 1179 | #if BOOT_DEBUG_VOBJS |
|---|
| 1180 | boot_puts("CONST : "); |
|---|
| 1181 | boot_puts(vobj[vobj_id].name); |
|---|
| 1182 | boot_puts(" / Paddr :"); |
|---|
| 1183 | boot_putl(vobj[vobj_id].paddr); |
|---|
| 1184 | boot_puts(" / init = "); |
|---|
| 1185 | boot_putx(*addr); |
|---|
| 1186 | boot_puts("\n"); |
|---|
| 1187 | #endif |
|---|
| 1188 | break; |
|---|
| 1189 | } |
|---|
| 1190 | default: |
|---|
| 1191 | { |
|---|
| 1192 | boot_puts("\n[BOOT ERROR] illegal vobj type: "); |
|---|
| 1193 | boot_putd(vobj[vobj_id].type); |
|---|
| 1194 | boot_puts("\n"); |
|---|
| 1195 | boot_exit(); |
|---|
| 1196 | } |
|---|
| 1197 | } // end switch type |
|---|
| 1198 | } // end loop on vobjs |
|---|
| 1199 | if (ptab_found == 0) |
|---|
| 1200 | { |
|---|
| 1201 | boot_puts("\n[BOOT ERROR] Missing PTAB for vspace "); |
|---|
| 1202 | boot_putd(vspace_id); |
|---|
| 1203 | boot_exit(); |
|---|
| 1204 | } |
|---|
| 1205 | } // end loop on vspaces |
|---|
| 1206 | } // end boot_vobjs_init() |
|---|
| 1207 | |
|---|
| 1208 | //////////////////////////////////////////////////////////////////////////////// |
|---|
| 1209 | // This function initializes one MWMR controller channel. |
|---|
| 1210 | // - coproc_pbase : physical base address of the Coproc configuration segment |
|---|
| 1211 | // - channel_pbase : physical base address of the MWMR channel segment |
|---|
| 1212 | // Warning : the channel physical base address should be on 32 bits, as the |
|---|
| 1213 | // MWMR controller configuration registers are 32 bits. |
|---|
| 1214 | // TODO : Introduce a MWMR_CONFIG_PADDR_EXT register in the MWMR coprocessor |
|---|
| 1215 | // To support addresses > 32 bits and remove this limitation... |
|---|
| 1216 | /////////////////////////////////////////////////////////////////////////////// |
|---|
| 1217 | void mwmr_hw_init(paddr_t coproc_pbase, |
|---|
| 1218 | enum mwmrPortDirection way, |
|---|
| 1219 | unsigned int no, |
|---|
| 1220 | paddr_t channel_pbase) |
|---|
| 1221 | { |
|---|
| 1222 | if ( (channel_pbase>>32) != 0 ) |
|---|
| 1223 | { |
|---|
| 1224 | boot_puts("\n[BOOT ERROR] MWMR controller does not support address > 32 bits\n"); |
|---|
| 1225 | boot_exit(); |
|---|
| 1226 | } |
|---|
| 1227 | |
|---|
| 1228 | unsigned int lsb = (unsigned int)channel_pbase; |
|---|
| 1229 | // unsigned int msb = (unsigned int)(channel_pbase>>32); |
|---|
| 1230 | |
|---|
| 1231 | unsigned int depth = boot_physical_read( channel_pbase + 16 ); |
|---|
| 1232 | unsigned int width = boot_physical_read( channel_pbase + 20 ); |
|---|
| 1233 | |
|---|
| 1234 | boot_physical_write( coproc_pbase + MWMR_CONFIG_FIFO_WAY*4, way ); |
|---|
| 1235 | boot_physical_write( coproc_pbase + MWMR_CONFIG_FIFO_NO*4, no ); |
|---|
| 1236 | boot_physical_write( coproc_pbase + MWMR_CONFIG_WIDTH*4, width); |
|---|
| 1237 | boot_physical_write( coproc_pbase + MWMR_CONFIG_DEPTH*4, depth); |
|---|
| 1238 | boot_physical_write( coproc_pbase + MWMR_CONFIG_STATUS_ADDR*4, lsb); |
|---|
| 1239 | boot_physical_write( coproc_pbase + MWMR_CONFIG_BUFFER_ADDR*4, lsb + 24 ); |
|---|
| 1240 | // boot_physical_write( coproc_pbase + MWMR_CONFIG_PADDR_EXT*4, msb); |
|---|
| 1241 | boot_physical_write( coproc_pbase + MWMR_CONFIG_RUNNING*4, 1 ); |
|---|
| 1242 | } |
|---|
| 1243 | |
|---|
| 1244 | //////////////////////////////////////////////////////////////////////////////// |
|---|
| 1245 | // This function intializes the periherals and coprocessors, as specified |
|---|
| 1246 | // in the mapping_info file. |
|---|
| 1247 | //////////////////////////////////////////////////////////////////////////////// |
|---|
| 1248 | void boot_peripherals_init() |
|---|
| 1249 | { |
|---|
| 1250 | mapping_header_t * header = (mapping_header_t *) & seg_mapping_base; |
|---|
| 1251 | mapping_cluster_t * cluster = boot_get_cluster_base(header); |
|---|
| 1252 | mapping_periph_t * periph = boot_get_periph_base(header); |
|---|
| 1253 | mapping_pseg_t * pseg = boot_get_pseg_base(header); |
|---|
| 1254 | mapping_vobj_t * vobj = boot_get_vobj_base(header); |
|---|
| 1255 | mapping_vspace_t * vspace = boot_get_vspace_base(header); |
|---|
| 1256 | mapping_coproc_t * coproc = boot_get_coproc_base(header); |
|---|
| 1257 | mapping_cp_port_t * cp_port = boot_get_cp_port_base(header); |
|---|
| 1258 | |
|---|
| 1259 | unsigned int cluster_id; |
|---|
| 1260 | unsigned int periph_id; |
|---|
| 1261 | unsigned int coproc_id; |
|---|
| 1262 | unsigned int cp_port_id; |
|---|
| 1263 | unsigned int channel_id; |
|---|
| 1264 | |
|---|
| 1265 | for (cluster_id = 0; cluster_id < header->clusters; cluster_id++) |
|---|
| 1266 | { |
|---|
| 1267 | |
|---|
| 1268 | #if BOOT_DEBUG_PERI |
|---|
| 1269 | boot_puts("\n[BOOT DEBUG] ****** peripherals initialisation in cluster "); |
|---|
| 1270 | boot_putd(cluster_id); |
|---|
| 1271 | boot_puts(" ******\n"); |
|---|
| 1272 | #endif |
|---|
| 1273 | |
|---|
| 1274 | for (periph_id = cluster[cluster_id].periph_offset; |
|---|
| 1275 | periph_id < cluster[cluster_id].periph_offset + |
|---|
| 1276 | cluster[cluster_id].periphs; periph_id++) |
|---|
| 1277 | { |
|---|
| 1278 | unsigned int type = periph[periph_id].type; |
|---|
| 1279 | unsigned int channels = periph[periph_id].channels; |
|---|
| 1280 | unsigned int pseg_id = periph[periph_id].psegid; |
|---|
| 1281 | |
|---|
| 1282 | paddr_t pbase = pseg[pseg_id].base; |
|---|
| 1283 | |
|---|
| 1284 | #if BOOT_DEBUG_PERI |
|---|
| 1285 | boot_puts("- peripheral type : "); |
|---|
| 1286 | boot_putd(type); |
|---|
| 1287 | boot_puts(" / pbase = "); |
|---|
| 1288 | boot_putl(pbase); |
|---|
| 1289 | boot_puts(" / channels = "); |
|---|
| 1290 | boot_putd(channels); |
|---|
| 1291 | boot_puts("\n"); |
|---|
| 1292 | #endif |
|---|
| 1293 | |
|---|
| 1294 | switch (type) |
|---|
| 1295 | { |
|---|
| 1296 | case PERIPH_TYPE_IOC: // vci_block_device component |
|---|
| 1297 | { |
|---|
| 1298 | paddr_t paddr = pbase + BLOCK_DEVICE_IRQ_ENABLE*4; |
|---|
| 1299 | boot_physical_write(paddr, 1); |
|---|
| 1300 | #if BOOT_DEBUG_PERI |
|---|
| 1301 | boot_puts("- IOC initialised\n"); |
|---|
| 1302 | #endif |
|---|
| 1303 | } |
|---|
| 1304 | break; |
|---|
| 1305 | case PERIPH_TYPE_DMA: // vci_multi_dma component |
|---|
| 1306 | for (channel_id = 0; channel_id < channels; channel_id++) |
|---|
| 1307 | { |
|---|
| 1308 | paddr_t paddr = pbase + (channel_id*DMA_SPAN + DMA_IRQ_DISABLE) * 4; |
|---|
| 1309 | boot_physical_write(paddr, 0); |
|---|
| 1310 | } |
|---|
| 1311 | #if BOOT_DEBUG_PERI |
|---|
| 1312 | boot_puts("- DMA initialised\n"); |
|---|
| 1313 | #endif |
|---|
| 1314 | break; |
|---|
| 1315 | case PERIPH_TYPE_NIC: // vci_multi_nic component |
|---|
| 1316 | for (channel_id = 0; channel_id < channels; channel_id++) |
|---|
| 1317 | { |
|---|
| 1318 | // TODO |
|---|
| 1319 | } |
|---|
| 1320 | #if BOOT_DEBUG_PERI |
|---|
| 1321 | boot_puts("- NIC initialised\n"); |
|---|
| 1322 | #endif |
|---|
| 1323 | break; |
|---|
| 1324 | case PERIPH_TYPE_TTY: // vci_multi_tty component |
|---|
| 1325 | #if BOOT_DEBUG_PERI |
|---|
| 1326 | boot_puts("- TTY initialised\n"); |
|---|
| 1327 | #endif |
|---|
| 1328 | break; |
|---|
| 1329 | case PERIPH_TYPE_IOB: // vci_io_bridge component |
|---|
| 1330 | if (IOMMU_ACTIVE) |
|---|
| 1331 | { |
|---|
| 1332 | // TODO |
|---|
| 1333 | // get the iommu page table physical address |
|---|
| 1334 | // define IPI address mapping the IOC interrupt |
|---|
| 1335 | // set IOMMU page table address |
|---|
| 1336 | // pseg_base[IOB_IOMMU_PTPR] = ptab_pbase; |
|---|
| 1337 | // activate IOMMU |
|---|
| 1338 | // pseg_base[IOB_IOMMU_ACTIVE] = 1; |
|---|
| 1339 | } |
|---|
| 1340 | #if BOOT_DEBUG_PERI |
|---|
| 1341 | boot_puts("- IOB initialised\n"); |
|---|
| 1342 | #endif |
|---|
| 1343 | break; |
|---|
| 1344 | } // end switch periph type |
|---|
| 1345 | } // end for periphs |
|---|
| 1346 | |
|---|
| 1347 | #if BOOT_DEBUG_PERI |
|---|
| 1348 | boot_puts("\n[BOOT DEBUG] ****** coprocessors initialisation in cluster "); |
|---|
| 1349 | boot_putd(cluster_id); |
|---|
| 1350 | boot_puts(" ******\n"); |
|---|
| 1351 | #endif |
|---|
| 1352 | |
|---|
| 1353 | for (coproc_id = cluster[cluster_id].coproc_offset; |
|---|
| 1354 | coproc_id < cluster[cluster_id].coproc_offset + |
|---|
| 1355 | cluster[cluster_id].coprocs; coproc_id++) |
|---|
| 1356 | { |
|---|
| 1357 | unsigned no_fifo_to = 0; //FIXME: should the map.xml define the order? |
|---|
| 1358 | unsigned no_fifo_from = 0; |
|---|
| 1359 | |
|---|
| 1360 | // Get physical base address for MWMR controler |
|---|
| 1361 | paddr_t coproc_pbase = pseg[coproc[coproc_id].psegid].base; |
|---|
| 1362 | |
|---|
| 1363 | #if BOOT_DEBUG_PERI |
|---|
| 1364 | boot_puts("- coprocessor name : "); |
|---|
| 1365 | boot_puts(coproc[coproc_id].name); |
|---|
| 1366 | boot_puts(" / nb ports = "); |
|---|
| 1367 | boot_putd((unsigned int) coproc[coproc_id].ports); |
|---|
| 1368 | boot_puts("\n"); |
|---|
| 1369 | #endif |
|---|
| 1370 | |
|---|
| 1371 | for (cp_port_id = coproc[coproc_id].port_offset; |
|---|
| 1372 | cp_port_id < coproc[coproc_id].port_offset + coproc[coproc_id].ports; |
|---|
| 1373 | cp_port_id++) |
|---|
| 1374 | { |
|---|
| 1375 | unsigned int vspace_id = cp_port[cp_port_id].vspaceid; |
|---|
| 1376 | unsigned int vobj_id = cp_port[cp_port_id].mwmr_vobjid + |
|---|
| 1377 | vspace[vspace_id].vobj_offset; |
|---|
| 1378 | |
|---|
| 1379 | // Get MWMR channel base address |
|---|
| 1380 | paddr_t channel_pbase = vobj[vobj_id].paddr; |
|---|
| 1381 | |
|---|
| 1382 | if (cp_port[cp_port_id].direction == PORT_TO_COPROC) |
|---|
| 1383 | { |
|---|
| 1384 | #if BOOT_DEBUG_PERI |
|---|
| 1385 | boot_puts(" port direction: PORT_TO_COPROC"); |
|---|
| 1386 | #endif |
|---|
| 1387 | mwmr_hw_init(coproc_pbase, |
|---|
| 1388 | PORT_TO_COPROC, |
|---|
| 1389 | no_fifo_to, |
|---|
| 1390 | channel_pbase); |
|---|
| 1391 | no_fifo_to++; |
|---|
| 1392 | } |
|---|
| 1393 | else |
|---|
| 1394 | { |
|---|
| 1395 | #if BOOT_DEBUG_PERI |
|---|
| 1396 | boot_puts(" port direction: PORT_FROM_COPROC"); |
|---|
| 1397 | #endif |
|---|
| 1398 | mwmr_hw_init(coproc_pbase, |
|---|
| 1399 | PORT_FROM_COPROC, |
|---|
| 1400 | no_fifo_from, |
|---|
| 1401 | channel_pbase); |
|---|
| 1402 | no_fifo_from++; |
|---|
| 1403 | } |
|---|
| 1404 | #if BOOT_DEBUG_PERI |
|---|
| 1405 | boot_puts(", with mwmr: "); |
|---|
| 1406 | boot_puts(vobj[vobj_id].name); |
|---|
| 1407 | boot_puts(" of vspace: "); |
|---|
| 1408 | boot_puts(vspace[vspace_id].name); |
|---|
| 1409 | #endif |
|---|
| 1410 | } // end for cp_ports |
|---|
| 1411 | } // end for coprocs |
|---|
| 1412 | } // end for clusters |
|---|
| 1413 | } // end boot_peripherals_init() |
|---|
| 1414 | |
|---|
| 1415 | /////////////////////////////////////////////////////////////////////////////// |
|---|
| 1416 | // This function returns in the vbase and length buffers the virtual base |
|---|
| 1417 | // address and the length of the segment allocated to the schedulers array |
|---|
| 1418 | // in the cluster defined by the clusterid argument. |
|---|
| 1419 | /////////////////////////////////////////////////////////////////////////////// |
|---|
| 1420 | void boot_get_sched_vaddr( unsigned int cluster_id, |
|---|
| 1421 | unsigned int* vbase, |
|---|
| 1422 | unsigned int* length ) |
|---|
| 1423 | { |
|---|
| 1424 | mapping_header_t* header = (mapping_header_t *) & seg_mapping_base; |
|---|
| 1425 | mapping_vobj_t* vobj = boot_get_vobj_base(header); |
|---|
| 1426 | mapping_vseg_t* vseg = boot_get_vseg_base(header); |
|---|
| 1427 | mapping_pseg_t* pseg = boot_get_pseg_base(header); |
|---|
| 1428 | |
|---|
| 1429 | unsigned int vseg_id; |
|---|
| 1430 | unsigned int found = 0; |
|---|
| 1431 | |
|---|
| 1432 | for ( vseg_id = 0 ; (vseg_id < header->vsegs) && (found == 0) ; vseg_id++ ) |
|---|
| 1433 | { |
|---|
| 1434 | if ( (vobj[vseg[vseg_id].vobj_offset].type == VOBJ_TYPE_SCHED) && |
|---|
| 1435 | (pseg[vseg[vseg_id].psegid].cluster == cluster_id ) ) |
|---|
| 1436 | { |
|---|
| 1437 | *vbase = vseg[vseg_id].vbase; |
|---|
| 1438 | *length = vobj[vseg[vseg_id].vobj_offset].length; |
|---|
| 1439 | found = 1; |
|---|
| 1440 | } |
|---|
| 1441 | } |
|---|
| 1442 | if ( found == 0 ) |
|---|
| 1443 | { |
|---|
| 1444 | boot_puts("\n[BOOT ERROR] No vobj of type SCHED in cluster "); |
|---|
| 1445 | boot_putd(cluster_id); |
|---|
| 1446 | boot_puts("\n"); |
|---|
| 1447 | boot_exit(); |
|---|
| 1448 | } |
|---|
| 1449 | } // end boot_get_sched_vaddr() |
|---|
| 1450 | |
|---|
| 1451 | /////////////////////////////////////////////////////////////////////////////// |
|---|
| 1452 | // This function initialises all processors schedulers. |
|---|
| 1453 | // This is done by processor 0, and the MMU must be activated. |
|---|
| 1454 | // It initialises the boot_chedulers[gpid] pointers array. |
|---|
| 1455 | // Finally, it scan all tasks in all vspaces to initialise the tasks contexts, |
|---|
| 1456 | // as specified in the mapping_info data structure. |
|---|
| 1457 | // For each task, a TTY channel, a TIMER channel, a FBDMA channel, and a NIC |
|---|
| 1458 | // channel are allocated if required. |
|---|
| 1459 | /////////////////////////////////////////////////////////////////////////////// |
|---|
| 1460 | void boot_schedulers_init() |
|---|
| 1461 | { |
|---|
| 1462 | mapping_header_t* header = (mapping_header_t *) & seg_mapping_base; |
|---|
| 1463 | mapping_cluster_t* cluster = boot_get_cluster_base(header); |
|---|
| 1464 | mapping_vspace_t* vspace = boot_get_vspace_base(header); |
|---|
| 1465 | mapping_task_t* task = boot_get_task_base(header); |
|---|
| 1466 | mapping_vobj_t* vobj = boot_get_vobj_base(header); |
|---|
| 1467 | mapping_proc_t* proc = boot_get_proc_base(header); |
|---|
| 1468 | mapping_irq_t* irq = boot_get_irq_base(header); |
|---|
| 1469 | |
|---|
| 1470 | unsigned int cluster_id; // cluster index in mapping_info |
|---|
| 1471 | unsigned int proc_id; // processor index in mapping_info |
|---|
| 1472 | unsigned int irq_id; // irq index in mapping_info |
|---|
| 1473 | unsigned int vspace_id; // vspace index in mapping_info |
|---|
| 1474 | unsigned int task_id; // task index in mapping_info |
|---|
| 1475 | |
|---|
| 1476 | unsigned int alloc_tty_channel = 1; // TTY channel allocator |
|---|
| 1477 | unsigned int alloc_nic_channel = 0; // NIC channel allocator |
|---|
| 1478 | unsigned int alloc_cma_channel = 0; // CMA channel allocator |
|---|
| 1479 | unsigned int alloc_ioc_channel = 0; // IOC channel allocator |
|---|
| 1480 | unsigned int alloc_dma_channel[NB_CLUSTERS]; // DMA channel allocators |
|---|
| 1481 | unsigned int alloc_tim_channel[NB_CLUSTERS]; // user TIMER allocators |
|---|
| 1482 | |
|---|
| 1483 | ///////////////////////////////////////////////////////////////////////// |
|---|
| 1484 | // Step 1 : loop on the clusters and on the processors |
|---|
| 1485 | // to initialize the schedulers[] array of pointers and |
|---|
| 1486 | // the interrupt vectors. |
|---|
| 1487 | // Implementation note: |
|---|
| 1488 | // We need to use both proc_id to scan the mapping info structure, |
|---|
| 1489 | // and lpid to access the schedulers array. |
|---|
| 1490 | // - the boot_schedulers[] array of pointers can contain "holes", because |
|---|
| 1491 | // it is indexed by the global pid = cluster_id*NB_PROCS_MAX + ltid |
|---|
| 1492 | // - the mapping info array of processors is contiguous, it is indexed |
|---|
| 1493 | // by proc_id, and use an offset specific in each cluster. |
|---|
| 1494 | |
|---|
| 1495 | for (cluster_id = 0; cluster_id < header->clusters; cluster_id++) |
|---|
| 1496 | { |
|---|
| 1497 | |
|---|
| 1498 | #if BOOT_DEBUG_SCHED |
|---|
| 1499 | boot_puts("\n[BOOT DEBUG] Initialise schedulers in cluster "); |
|---|
| 1500 | boot_putd(cluster_id); |
|---|
| 1501 | boot_puts("\n"); |
|---|
| 1502 | #endif |
|---|
| 1503 | |
|---|
| 1504 | // TTY, NIC, CMA, IOC, TIM and DMA channels allocators |
|---|
| 1505 | // - TTY[0] is reserved for the kernel |
|---|
| 1506 | // - In all clusters the first NB_PROCS_MAX timers |
|---|
| 1507 | // are reserved for the kernel (context switch) |
|---|
| 1508 | |
|---|
| 1509 | alloc_dma_channel[cluster_id] = 0; |
|---|
| 1510 | alloc_tim_channel[cluster_id] = NB_PROCS_MAX; |
|---|
| 1511 | |
|---|
| 1512 | unsigned int lpid; // processor local index in cluster |
|---|
| 1513 | unsigned int sched_vbase; // schedulers segment virtual base address |
|---|
| 1514 | unsigned int sched_length; // schedulers segment length |
|---|
| 1515 | unsigned int nprocs; // number of processors in cluster |
|---|
| 1516 | |
|---|
| 1517 | nprocs = cluster[cluster_id].procs; |
|---|
| 1518 | |
|---|
| 1519 | // checking processors number |
|---|
| 1520 | if ( nprocs > NB_PROCS_MAX ) |
|---|
| 1521 | { |
|---|
| 1522 | boot_puts("\n[BOOT ERROR] Too much processors in cluster "); |
|---|
| 1523 | boot_putd(cluster_id); |
|---|
| 1524 | boot_puts("\n"); |
|---|
| 1525 | boot_exit(); |
|---|
| 1526 | } |
|---|
| 1527 | |
|---|
| 1528 | // get scheduler array virtual base address for cluster_id |
|---|
| 1529 | boot_get_sched_vaddr( cluster_id, &sched_vbase, &sched_length ); |
|---|
| 1530 | |
|---|
| 1531 | // each processor scheduler requires 4 Kbytes |
|---|
| 1532 | if ( sched_length < (nprocs<<12) ) |
|---|
| 1533 | { |
|---|
| 1534 | boot_puts("\n[BOOT ERROR] Schedulers segment too small in cluster "); |
|---|
| 1535 | boot_putd(cluster_id); |
|---|
| 1536 | boot_puts("\n"); |
|---|
| 1537 | boot_exit(); |
|---|
| 1538 | } |
|---|
| 1539 | |
|---|
| 1540 | for ( proc_id = cluster[cluster_id].proc_offset, lpid = 0 ; |
|---|
| 1541 | proc_id < cluster[cluster_id].proc_offset + cluster[cluster_id].procs; |
|---|
| 1542 | proc_id++, lpid++ ) |
|---|
| 1543 | { |
|---|
| 1544 | // set the schedulers pointers array |
|---|
| 1545 | boot_schedulers[cluster_id * NB_PROCS_MAX + lpid] = |
|---|
| 1546 | (static_scheduler_t*)( sched_vbase + (lpid<<12) ); |
|---|
| 1547 | |
|---|
| 1548 | #if BOOT_DEBUG_SCHED |
|---|
| 1549 | boot_puts("\nProc "); |
|---|
| 1550 | boot_putd(lpid); |
|---|
| 1551 | boot_puts(" : scheduler virtual base address = "); |
|---|
| 1552 | boot_putx( sched_vbase + (lpid<<12) ); |
|---|
| 1553 | boot_puts("\n"); |
|---|
| 1554 | #endif |
|---|
| 1555 | // current processor scheduler pointer : psched |
|---|
| 1556 | static_scheduler_t* psched = (static_scheduler_t*)(sched_vbase+(lpid<<12)); |
|---|
| 1557 | |
|---|
| 1558 | // initialise the "tasks" variable |
|---|
| 1559 | psched->tasks = 0; |
|---|
| 1560 | |
|---|
| 1561 | // initialise the interrupt_vector with ISR_DEFAULT |
|---|
| 1562 | unsigned int slot; |
|---|
| 1563 | for (slot = 0; slot < 32; slot++) psched->interrupt_vector[slot] = 0; |
|---|
| 1564 | |
|---|
| 1565 | // scan the IRQs actually allocated to current processor |
|---|
| 1566 | for (irq_id = proc[proc_id].irq_offset; |
|---|
| 1567 | irq_id < proc[proc_id].irq_offset + proc[proc_id].irqs; |
|---|
| 1568 | irq_id++) |
|---|
| 1569 | { |
|---|
| 1570 | unsigned int type = irq[irq_id].type; |
|---|
| 1571 | unsigned int icu_id = irq[irq_id].icuid; |
|---|
| 1572 | unsigned int isr_id = irq[irq_id].isr; |
|---|
| 1573 | unsigned int channel = irq[irq_id].channel; |
|---|
| 1574 | unsigned int value = isr_id | (type << 8) | (channel << 16); |
|---|
| 1575 | psched->interrupt_vector[icu_id] = value; |
|---|
| 1576 | |
|---|
| 1577 | #if BOOT_DEBUG_SCHED |
|---|
| 1578 | boot_puts("- IRQ : icu = "); |
|---|
| 1579 | boot_putd(icu_id); |
|---|
| 1580 | boot_puts(" / type = "); |
|---|
| 1581 | boot_putd(type); |
|---|
| 1582 | boot_puts(" / isr = "); |
|---|
| 1583 | boot_putd(isr_id); |
|---|
| 1584 | boot_puts(" / channel = "); |
|---|
| 1585 | boot_putd(channel); |
|---|
| 1586 | boot_puts(" => vector_entry = "); |
|---|
| 1587 | boot_putx( value ); |
|---|
| 1588 | boot_puts("\n"); |
|---|
| 1589 | #endif |
|---|
| 1590 | } |
|---|
| 1591 | } // end for procs |
|---|
| 1592 | } // end for clusters |
|---|
| 1593 | |
|---|
| 1594 | /////////////////////////////////////////////////////////////////// |
|---|
| 1595 | // Step 2 : loop on the vspaces and the tasks |
|---|
| 1596 | // to initialise the schedulers and the task contexts. |
|---|
| 1597 | // Implementation note: |
|---|
| 1598 | // This function initialises the task context for all tasks. |
|---|
| 1599 | // For each processor, the scheduler virtual base address |
|---|
| 1600 | // is written in the CP0_SCHED register in reset.S |
|---|
| 1601 | |
|---|
| 1602 | for (vspace_id = 0; vspace_id < header->vspaces; vspace_id++) |
|---|
| 1603 | { |
|---|
| 1604 | |
|---|
| 1605 | #if BOOT_DEBUG_SCHED |
|---|
| 1606 | boot_puts("\n[BOOT DEBUG] Initialise task contexts for vspace "); |
|---|
| 1607 | boot_puts(vspace[vspace_id].name); |
|---|
| 1608 | boot_puts("\n"); |
|---|
| 1609 | #endif |
|---|
| 1610 | // We must set the PTPR depending on the vspace, because the start_vector |
|---|
| 1611 | // and the stack address are defined in virtual space. |
|---|
| 1612 | boot_set_mmu_ptpr( (unsigned int)(boot_ptabs_paddr[vspace_id] >> 13) ); |
|---|
| 1613 | |
|---|
| 1614 | // loop on the tasks in vspace (task_id is the global index) |
|---|
| 1615 | for (task_id = vspace[vspace_id].task_offset; |
|---|
| 1616 | task_id < (vspace[vspace_id].task_offset + vspace[vspace_id].tasks); |
|---|
| 1617 | task_id++) |
|---|
| 1618 | { |
|---|
| 1619 | // compute gpid (global processor index) and scheduler base address |
|---|
| 1620 | unsigned int gpid = task[task_id].clusterid * NB_PROCS_MAX + |
|---|
| 1621 | task[task_id].proclocid; |
|---|
| 1622 | static_scheduler_t* psched = boot_schedulers[gpid]; |
|---|
| 1623 | |
|---|
| 1624 | // ctx_ra : the return address is &boot_eret() |
|---|
| 1625 | unsigned int ctx_ra = (unsigned int) &boot_eret; |
|---|
| 1626 | |
|---|
| 1627 | // ctx_sr : value required before an eret instruction |
|---|
| 1628 | unsigned int ctx_sr = 0x0000FF13; |
|---|
| 1629 | |
|---|
| 1630 | // ctx_ptpr : page table physical base address (shifted by 13 bit) |
|---|
| 1631 | unsigned int ctx_ptpr = (unsigned int)(boot_ptabs_paddr[vspace_id] >> 13); |
|---|
| 1632 | |
|---|
| 1633 | // ctx_ptab : page_table virtual base address |
|---|
| 1634 | unsigned int ctx_ptab = boot_ptabs_vaddr[vspace_id]; |
|---|
| 1635 | |
|---|
| 1636 | // ctx_tty : terminal global index provided by the global allocator |
|---|
| 1637 | unsigned int ctx_tty = 0xFFFFFFFF; |
|---|
| 1638 | if (task[task_id].use_tty) |
|---|
| 1639 | { |
|---|
| 1640 | if (alloc_tty_channel >= NB_TTY_CHANNELS) |
|---|
| 1641 | { |
|---|
| 1642 | boot_puts("\n[BOOT ERROR] TTY index too large for task "); |
|---|
| 1643 | boot_puts(task[task_id].name); |
|---|
| 1644 | boot_puts(" in vspace "); |
|---|
| 1645 | boot_puts(vspace[vspace_id].name); |
|---|
| 1646 | boot_puts("\n"); |
|---|
| 1647 | boot_exit(); |
|---|
| 1648 | } |
|---|
| 1649 | ctx_tty = alloc_tty_channel; |
|---|
| 1650 | alloc_tty_channel++; |
|---|
| 1651 | } |
|---|
| 1652 | // ctx_nic : NIC channel global index provided by the global allocator |
|---|
| 1653 | unsigned int ctx_nic = 0xFFFFFFFF; |
|---|
| 1654 | if (task[task_id].use_nic) |
|---|
| 1655 | { |
|---|
| 1656 | if (alloc_nic_channel >= NB_NIC_CHANNELS) |
|---|
| 1657 | { |
|---|
| 1658 | boot_puts("\n[BOOT ERROR] NIC channel index too large for task "); |
|---|
| 1659 | boot_puts(task[task_id].name); |
|---|
| 1660 | boot_puts(" in vspace "); |
|---|
| 1661 | boot_puts(vspace[vspace_id].name); |
|---|
| 1662 | boot_puts("\n"); |
|---|
| 1663 | boot_exit(); |
|---|
| 1664 | } |
|---|
| 1665 | ctx_nic = alloc_nic_channel; |
|---|
| 1666 | alloc_nic_channel++; |
|---|
| 1667 | } |
|---|
| 1668 | // ctx_cma : CMA channel global index provided by the global allocator |
|---|
| 1669 | unsigned int ctx_cma = 0xFFFFFFFF; |
|---|
| 1670 | if (task[task_id].use_cma) |
|---|
| 1671 | { |
|---|
| 1672 | if (alloc_cma_channel >= NB_CMA_CHANNELS) |
|---|
| 1673 | { |
|---|
| 1674 | boot_puts("\n[BOOT ERROR] CMA channel index too large for task "); |
|---|
| 1675 | boot_puts(task[task_id].name); |
|---|
| 1676 | boot_puts(" in vspace "); |
|---|
| 1677 | boot_puts(vspace[vspace_id].name); |
|---|
| 1678 | boot_puts("\n"); |
|---|
| 1679 | boot_exit(); |
|---|
| 1680 | } |
|---|
| 1681 | ctx_cma = alloc_cma_channel; |
|---|
| 1682 | alloc_cma_channel++; |
|---|
| 1683 | } |
|---|
| 1684 | // ctx_ioc : IOC channel global index provided by the global allocator |
|---|
| 1685 | unsigned int ctx_ioc = 0xFFFFFFFF; |
|---|
| 1686 | if (task[task_id].use_ioc) |
|---|
| 1687 | { |
|---|
| 1688 | if (alloc_ioc_channel >= NB_IOC_CHANNELS) |
|---|
| 1689 | { |
|---|
| 1690 | boot_puts("\n[BOOT ERROR] IOC channel index too large for task "); |
|---|
| 1691 | boot_puts(task[task_id].name); |
|---|
| 1692 | boot_puts(" in vspace "); |
|---|
| 1693 | boot_puts(vspace[vspace_id].name); |
|---|
| 1694 | boot_puts("\n"); |
|---|
| 1695 | boot_exit(); |
|---|
| 1696 | } |
|---|
| 1697 | ctx_ioc = alloc_ioc_channel; |
|---|
| 1698 | alloc_ioc_channel++; |
|---|
| 1699 | } |
|---|
| 1700 | // ctx_tim : TIMER local channel index provided by the cluster allocator |
|---|
| 1701 | unsigned int ctx_tim = 0xFFFFFFFF; |
|---|
| 1702 | if (task[task_id].use_tim) |
|---|
| 1703 | { |
|---|
| 1704 | unsigned int cluster_id = task[task_id].clusterid; |
|---|
| 1705 | |
|---|
| 1706 | if ( alloc_tim_channel[cluster_id] >= NB_TIM_CHANNELS ) |
|---|
| 1707 | { |
|---|
| 1708 | boot_puts("\n[BOOT ERROR] local TIMER index too large for task "); |
|---|
| 1709 | boot_puts(task[task_id].name); |
|---|
| 1710 | boot_puts(" in vspace "); |
|---|
| 1711 | boot_puts(vspace[vspace_id].name); |
|---|
| 1712 | boot_puts("\n"); |
|---|
| 1713 | boot_exit(); |
|---|
| 1714 | } |
|---|
| 1715 | |
|---|
| 1716 | // checking that there is a well defined ISR_TIMER installed |
|---|
| 1717 | unsigned int found = 0; |
|---|
| 1718 | for ( irq_id = 0 ; irq_id < 32 ; irq_id++ ) |
|---|
| 1719 | { |
|---|
| 1720 | unsigned int entry = psched->interrupt_vector[irq_id]; |
|---|
| 1721 | unsigned int isr = entry & 0x000000FF; |
|---|
| 1722 | unsigned int channel = entry>>16; |
|---|
| 1723 | if ( (isr == ISR_TIMER) && (channel == alloc_tim_channel[cluster_id]) ) |
|---|
| 1724 | { |
|---|
| 1725 | found = 1; |
|---|
| 1726 | ctx_tim = alloc_tim_channel[cluster_id]; |
|---|
| 1727 | alloc_tim_channel[cluster_id]++; |
|---|
| 1728 | break; |
|---|
| 1729 | } |
|---|
| 1730 | } |
|---|
| 1731 | if (!found) |
|---|
| 1732 | { |
|---|
| 1733 | boot_puts("\n[BOOT ERROR] No ISR_TIMER installed for task "); |
|---|
| 1734 | boot_puts(task[task_id].name); |
|---|
| 1735 | boot_puts(" in vspace "); |
|---|
| 1736 | boot_puts(vspace[vspace_id].name); |
|---|
| 1737 | boot_puts("\n"); |
|---|
| 1738 | boot_exit(); |
|---|
| 1739 | } |
|---|
| 1740 | } |
|---|
| 1741 | // ctx_dma : the local channel index is defined by the cluster allocator |
|---|
| 1742 | // but the ctx_dma value is a global index |
|---|
| 1743 | unsigned int ctx_dma = 0xFFFFFFFF; |
|---|
| 1744 | if ( task[task_id].use_dma ) |
|---|
| 1745 | { |
|---|
| 1746 | unsigned int cluster_id = task[task_id].clusterid; |
|---|
| 1747 | |
|---|
| 1748 | if (alloc_dma_channel[cluster_id] >= NB_DMA_CHANNELS) |
|---|
| 1749 | { |
|---|
| 1750 | boot_puts("\n[BOOT ERROR] local DMA index too large for task "); |
|---|
| 1751 | boot_puts(task[task_id].name); |
|---|
| 1752 | boot_puts(" in vspace "); |
|---|
| 1753 | boot_puts(vspace[vspace_id].name); |
|---|
| 1754 | boot_puts("\n"); |
|---|
| 1755 | boot_exit(); |
|---|
| 1756 | } |
|---|
| 1757 | ctx_dma = cluster_id * NB_DMA_CHANNELS + alloc_dma_channel[cluster_id]; |
|---|
| 1758 | alloc_dma_channel[cluster_id]++; |
|---|
| 1759 | } |
|---|
| 1760 | // ctx_epc : Get the virtual address of the start function |
|---|
| 1761 | mapping_vobj_t* pvobj = &vobj[vspace[vspace_id].vobj_offset + |
|---|
| 1762 | vspace[vspace_id].start_offset]; |
|---|
| 1763 | unsigned int* start_vector_vbase = (unsigned int *) pvobj->vaddr; |
|---|
| 1764 | unsigned int ctx_epc = start_vector_vbase[task[task_id].startid]; |
|---|
| 1765 | |
|---|
| 1766 | // ctx_sp : Get the vobj containing the stack |
|---|
| 1767 | unsigned int vobj_id = task[task_id].stack_vobjid + vspace[vspace_id].vobj_offset; |
|---|
| 1768 | unsigned int ctx_sp = vobj[vobj_id].vaddr + vobj[vobj_id].length; |
|---|
| 1769 | |
|---|
| 1770 | // get local task index in scheduler |
|---|
| 1771 | unsigned int ltid = psched->tasks; |
|---|
| 1772 | |
|---|
| 1773 | if (ltid >= IDLE_TASK_INDEX) |
|---|
| 1774 | { |
|---|
| 1775 | boot_puts("\n[BOOT ERROR] : "); |
|---|
| 1776 | boot_putd(ltid); |
|---|
| 1777 | boot_puts(" tasks allocated to processor "); |
|---|
| 1778 | boot_putd(gpid); |
|---|
| 1779 | boot_puts(" / max is 15\n"); |
|---|
| 1780 | boot_exit(); |
|---|
| 1781 | } |
|---|
| 1782 | // update the "tasks" field in scheduler |
|---|
| 1783 | psched->tasks = ltid + 1; |
|---|
| 1784 | |
|---|
| 1785 | // update the "current" field in scheduler |
|---|
| 1786 | psched->current = 0; |
|---|
| 1787 | |
|---|
| 1788 | // initializes the task context in scheduler |
|---|
| 1789 | psched->context[ltid][CTX_SR_ID] = ctx_sr; |
|---|
| 1790 | psched->context[ltid][CTX_SP_ID] = ctx_sp; |
|---|
| 1791 | psched->context[ltid][CTX_RA_ID] = ctx_ra; |
|---|
| 1792 | psched->context[ltid][CTX_EPC_ID] = ctx_epc; |
|---|
| 1793 | psched->context[ltid][CTX_PTPR_ID] = ctx_ptpr; |
|---|
| 1794 | psched->context[ltid][CTX_TTY_ID] = ctx_tty; |
|---|
| 1795 | psched->context[ltid][CTX_CMA_ID] = ctx_cma; |
|---|
| 1796 | psched->context[ltid][CTX_IOC_ID] = ctx_ioc; |
|---|
| 1797 | psched->context[ltid][CTX_NIC_ID] = ctx_nic; |
|---|
| 1798 | psched->context[ltid][CTX_TIM_ID] = ctx_tim; |
|---|
| 1799 | psched->context[ltid][CTX_DMA_ID] = ctx_dma; |
|---|
| 1800 | psched->context[ltid][CTX_PTAB_ID] = ctx_ptab; |
|---|
| 1801 | psched->context[ltid][CTX_LTID_ID] = ltid; |
|---|
| 1802 | psched->context[ltid][CTX_GTID_ID] = task_id; |
|---|
| 1803 | psched->context[ltid][CTX_VSID_ID] = vspace_id; |
|---|
| 1804 | psched->context[ltid][CTX_RUN_ID] = 1; |
|---|
| 1805 | |
|---|
| 1806 | #if BOOT_DEBUG_SCHED |
|---|
| 1807 | boot_puts("\nTask "); |
|---|
| 1808 | boot_puts(task[task_id].name); |
|---|
| 1809 | boot_puts(" ("); |
|---|
| 1810 | boot_putd(task_id); |
|---|
| 1811 | boot_puts(") allocated to processor "); |
|---|
| 1812 | boot_putd(gpid); |
|---|
| 1813 | boot_puts("\n - ctx[LTID] = "); |
|---|
| 1814 | boot_putd(ltid); |
|---|
| 1815 | boot_puts("\n - ctx[SR] = "); |
|---|
| 1816 | boot_putx(ctx_sr); |
|---|
| 1817 | boot_puts("\n - ctx[SR] = "); |
|---|
| 1818 | boot_putx(ctx_sp); |
|---|
| 1819 | boot_puts("\n - ctx[RA] = "); |
|---|
| 1820 | boot_putx(ctx_ra); |
|---|
| 1821 | boot_puts("\n - ctx[EPC] = "); |
|---|
| 1822 | boot_putx(ctx_epc); |
|---|
| 1823 | boot_puts("\n - ctx[PTPR] = "); |
|---|
| 1824 | boot_putx(ctx_ptpr); |
|---|
| 1825 | boot_puts("\n - ctx[TTY] = "); |
|---|
| 1826 | boot_putd(ctx_tty); |
|---|
| 1827 | boot_puts("\n - ctx[NIC] = "); |
|---|
| 1828 | boot_putd(ctx_nic); |
|---|
| 1829 | boot_puts("\n - ctx[CMA] = "); |
|---|
| 1830 | boot_putd(ctx_cma); |
|---|
| 1831 | boot_puts("\n - ctx[IOC] = "); |
|---|
| 1832 | boot_putd(ctx_ioc); |
|---|
| 1833 | boot_puts("\n - ctx[TIM] = "); |
|---|
| 1834 | boot_putd(ctx_tim); |
|---|
| 1835 | boot_puts("\n - ctx[DMA] = "); |
|---|
| 1836 | boot_putd(ctx_dma); |
|---|
| 1837 | boot_puts("\n - ctx[PTAB] = "); |
|---|
| 1838 | boot_putx(ctx_ptab); |
|---|
| 1839 | boot_puts("\n - ctx[GTID] = "); |
|---|
| 1840 | boot_putd(task_id); |
|---|
| 1841 | boot_puts("\n - ctx[VSID] = "); |
|---|
| 1842 | boot_putd(vspace_id); |
|---|
| 1843 | boot_puts("\n"); |
|---|
| 1844 | #endif |
|---|
| 1845 | |
|---|
| 1846 | } // end loop on tasks |
|---|
| 1847 | } // end loop on vspaces |
|---|
| 1848 | } // end boot_schedulers_init() |
|---|
| 1849 | |
|---|
| 1850 | |
|---|
| 1851 | ////////////////////////////////////////////////////////////////////////////////// |
|---|
| 1852 | // This function is executed by P[0] to wakeup all processors. |
|---|
| 1853 | ////////////////////////////////////////////////////////////////////////////////// |
|---|
| 1854 | void boot_start_all_procs() |
|---|
| 1855 | { |
|---|
| 1856 | mapping_header_t * header = (mapping_header_t *) &seg_mapping_base; |
|---|
| 1857 | header->signature = OUT_MAPPING_SIGNATURE; |
|---|
| 1858 | } |
|---|
| 1859 | |
|---|
| 1860 | |
|---|
| 1861 | ///////////////////////////////////////////////////////////////////// |
|---|
| 1862 | // This function is the entry point of the initialisation procedure |
|---|
| 1863 | ///////////////////////////////////////////////////////////////////// |
|---|
| 1864 | void boot_init() { |
|---|
| 1865 | |
|---|
| 1866 | // mapping_info checking |
|---|
| 1867 | boot_check_mapping(); |
|---|
| 1868 | |
|---|
| 1869 | boot_puts("\n[BOOT] Mapping check completed at cycle "); |
|---|
| 1870 | boot_putd(boot_proctime()); |
|---|
| 1871 | boot_puts("\n"); |
|---|
| 1872 | |
|---|
| 1873 | // pseg allocators initialisation |
|---|
| 1874 | boot_psegs_init(); |
|---|
| 1875 | |
|---|
| 1876 | boot_puts("\n[BOOT] Pseg allocators initialisation completed at cycle "); |
|---|
| 1877 | boot_putd(boot_proctime()); |
|---|
| 1878 | boot_puts("\n"); |
|---|
| 1879 | |
|---|
| 1880 | // page table building |
|---|
| 1881 | boot_pt_init(); |
|---|
| 1882 | |
|---|
| 1883 | boot_puts("\n[BOOT] Page Tables initialisation completed at cycle "); |
|---|
| 1884 | boot_putd(boot_proctime()); |
|---|
| 1885 | boot_puts("\n"); |
|---|
| 1886 | |
|---|
| 1887 | // mmu activation ( with page table [Ã] ) |
|---|
| 1888 | boot_set_mmu_ptpr((unsigned int) (boot_ptabs_paddr[0] >> 13)); |
|---|
| 1889 | boot_set_mmu_mode(0xF); |
|---|
| 1890 | |
|---|
| 1891 | boot_puts("\n[BOOT] Proc 0 MMU activation at cycle "); |
|---|
| 1892 | boot_putd(boot_proctime()); |
|---|
| 1893 | boot_puts("\n"); |
|---|
| 1894 | |
|---|
| 1895 | |
|---|
| 1896 | // vobjs initialisation |
|---|
| 1897 | boot_vobjs_init(); |
|---|
| 1898 | |
|---|
| 1899 | boot_puts("\n[BOOT] Vobjs initialisation completed at cycle : "); |
|---|
| 1900 | boot_putd(boot_proctime()); |
|---|
| 1901 | boot_puts("\n"); |
|---|
| 1902 | |
|---|
| 1903 | // peripherals initialisation |
|---|
| 1904 | boot_peripherals_init(); |
|---|
| 1905 | |
|---|
| 1906 | boot_puts("\n[BOOT] Peripherals initialisation completed at cycle "); |
|---|
| 1907 | boot_putd(boot_proctime()); |
|---|
| 1908 | boot_puts("\n"); |
|---|
| 1909 | |
|---|
| 1910 | // schedulers initialisation |
|---|
| 1911 | boot_schedulers_init(); |
|---|
| 1912 | |
|---|
| 1913 | boot_puts("\n[BOOT] Schedulers initialisation completed at cycle "); |
|---|
| 1914 | boot_putd(boot_proctime()); |
|---|
| 1915 | boot_puts("\n"); |
|---|
| 1916 | |
|---|
| 1917 | // start all processors |
|---|
| 1918 | boot_start_all_procs(); |
|---|
| 1919 | |
|---|
| 1920 | } // end boot_init() |
|---|
| 1921 | |
|---|
| 1922 | |
|---|
| 1923 | // Local Variables: |
|---|
| 1924 | // tab-width: 4 |
|---|
| 1925 | // c-basic-offset: 4 |
|---|
| 1926 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
|---|
| 1927 | // indent-tabs-mode: nil |
|---|
| 1928 | // End: |
|---|
| 1929 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
|---|
| 1930 | |
|---|