Changeset 246 for soft/giet_vm/boot/boot_init.c

Timestamp:

Jul 9, 2013, 3:54:53 PM (11 years ago)

Author:

meunier

Message:

Cosmétique + gestion du reset de l'irq du timer ou de l'xicu lors d'un task_switch

File:

• soft/giet_vm/boot/boot_init.c (modified) (12 diffs)

soft/giet_vm/boot/boot_init.c

@@ -156 +156 @@
 {
     unsigned int value;
-    unsigned int lsb = (unsigned int)paddr;
-    unsigned int msb = (unsigned int)(paddr >> 32);
+    unsigned int lsb = (unsigned int) paddr;
+    unsigned int msb = (unsigned int) (paddr >> 32);
 
     asm volatile(
@@ -489 +489 @@
     }
 
+
     // get page table physical base address
     pt1_pbase = boot_ptabs_paddr[vspace_id];
 
     // get ptd in PT1
-    ptd = boot_physical_read( pt1_pbase + 4*ix1 );
+    ptd = boot_physical_read(pt1_pbase + 4 * ix1);
 
     if ((ptd & PTE_V) == 0)    // invalid PTD: compute PT2 base address, 
@@ -508 +509 @@
         {
             pt2_pbase = pt1_pbase + PT1_SIZE + PT2_SIZE * pt2_id;
-            ptd = PTE_V | PTE_T | (unsigned int)(pt2_pbase >> 12);
-            boot_physical_write( pt1_pbase + 4*ix1 , ptd);
+            ptd = PTE_V | PTE_T | (unsigned int) (pt2_pbase >> 12);
+            boot_physical_write( pt1_pbase + 4 * ix1, ptd);
             boot_next_free_pt2[vspace_id] = pt2_id + 1;
         }
@@ -519 +520 @@
 
     // set PTE in PT2 : flags & PPN in two 32 bits words
-    pte_paddr = pt2_pbase + 8*ix2;
-    boot_physical_write( pte_paddr     , flags);
-    boot_physical_write( pte_paddr + 4 , ppn);
-
-if ( verbose )
-{
-boot_puts("     / pt1_pbase = ");
-boot_putl( pt1_pbase );
-boot_puts(" / ptd = ");
-boot_putl( ptd );
-boot_puts(" / pt2_pbase = ");
-boot_putl( pt2_pbase );
-boot_puts(" / pte_paddr = ");
-boot_putl( pte_paddr );
-boot_puts(" / ppn = ");
-boot_putx( ppn );
-boot_puts("/\n");
-}
+    pte_paddr = pt2_pbase + 8 * ix2;
+    boot_physical_write(pte_paddr    , flags);
+    boot_physical_write(pte_paddr + 4, ppn);
+
+    if (verbose)
+    {
+        boot_puts("     / pt1_pbase = ");
+        boot_putl( pt1_pbase );
+        boot_puts(" / ptd = ");
+        boot_putl( ptd );
+        boot_puts(" / pt2_pbase = ");
+        boot_putl( pt2_pbase );
+        boot_puts(" / pte_paddr = ");
+        boot_putl( pte_paddr );
+        boot_puts(" / ppn = ");
+        boot_putx( ppn );
+        boot_puts("/\n");
+    }
 
 }   // end boot_add_pte()
@@ -567 +568 @@
     {
         vpn = vseg[vseg_id].vbase >> 12;
-        ppn = (unsigned int)(vseg[vseg_id].pbase >> 12);
+        ppn = (unsigned int) (vseg[vseg_id].pbase >> 12);
+
         npages = vseg[vseg_id].length >> 12;
         if ((vseg[vseg_id].length & 0xFFF) != 0) npages++; 
 
         flags = PTE_V;
-        if (vseg[vseg_id].mode & C_MODE_MASK)  flags = flags | PTE_C;
-        if (vseg[vseg_id].mode & X_MODE_MASK)  flags = flags | PTE_X;
-        if (vseg[vseg_id].mode & W_MODE_MASK)  flags = flags | PTE_W;
-        if (vseg[vseg_id].mode & U_MODE_MASK)  flags = flags | PTE_U;
+        if (vseg[vseg_id].mode & C_MODE_MASK) flags = flags | PTE_C;
+        if (vseg[vseg_id].mode & X_MODE_MASK) flags = flags | PTE_X;
+        if (vseg[vseg_id].mode & W_MODE_MASK) flags = flags | PTE_W;
+        if (vseg[vseg_id].mode & U_MODE_MASK) flags = flags | PTE_U;
 
 #if BOOT_DEBUG_PT
@@ -705 +707 @@
         vobj[vobj_id].paddr = cur_paddr;
         
-        // initialise boot_ptabs_vaddr[] & boot_ptabs-paddr[] if PTAB
+        // initialize boot_ptabs_vaddr[] & boot_ptabs-paddr[] if PTAB
         if (vobj[vobj_id].type == VOBJ_TYPE_PTAB) 
         {
@@ -725 +727 @@
             boot_ptabs_vaddr[vspace_id] = vobj[vobj_id].vaddr;
             boot_ptabs_paddr[vspace_id] = vobj[vobj_id].paddr;
-
+            
             // reset all valid bits in PT1
             for ( offset = 0 ; offset < 8192 ; offset = offset + 4)
             {
-                boot_physical_write( cur_paddr + offset, 0);
+                boot_physical_write(cur_paddr + offset, 0);
             }
 
@@ -998 +1000 @@
 
         for (vseg_id = vspace[vspace_id].vseg_offset;
-                vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs);
-                vseg_id++) 
+             vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs);
+             vseg_id++) 
         {
             boot_vseg_map(&vseg[vseg_id], vspace_id);
@@ -1132 +1134 @@
 boot_puts(vobj[vobj_id].name);
 boot_puts(" / paddr = ");
-boot_putx(vobj[vobj_id].paddr);
+boot_putl(vobj[vobj_id].paddr);
 boot_puts(" / length = ");
 boot_putx(vobj[vobj_id].length);
@@ -1179 +1181 @@
 boot_puts(vobj[vobj_id].name);
 boot_puts(" / Paddr :");
-boot_putx(vobj[vobj_id].paddr);
+boot_putl(vobj[vobj_id].paddr);
 boot_puts(" / init = ");
 boot_putx(*addr);
@@ -1884 +1886 @@
 
     // mmu activation ( with page table [Ø] )
-    boot_set_mmu_ptpr( (unsigned int)(boot_ptabs_paddr[0] >> 13) );
+    boot_set_mmu_ptpr((unsigned int) (boot_ptabs_paddr[0] >> 13));
     boot_set_mmu_mode(0xF);
 
@@ -1890 +1892 @@
     boot_putd(boot_proctime());
     boot_puts("\n");
+
 
     // vobjs initialisation