[258] | 1 | /////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : hba_driver.h |
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| 3 | // Date : 01/11/2013 |
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| 4 | // Author : alain greiner and zhang |
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| 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | /////////////////////////////////////////////////////////////////////////////////// |
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[437] | 7 | // The hba_driver.c and hba_driver.h files are part ot the GIET-VM kernel. |
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| 8 | // This driver supports the SocLib VciMultiAhci component, that is a multi-channels, |
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| 9 | // block oriented, external storage contrÃŽler, respecting the AHCI standard. |
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| 10 | // |
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[529] | 11 | // 1. Each HBA channel define an independant physical disk, but this driver |
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| 12 | // supports only channel 0, because the GIET-VM uses only one physical disk. |
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| 13 | // |
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[540] | 14 | // 2. This HBA component support split memory buffers (several physical |
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| 15 | // buffers for one single command), but this driver supports only |
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| 16 | // single buffer commands. |
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| 17 | // |
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| 18 | // 3. The "command list" can contain up to 32 independant commands, posted |
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[529] | 19 | // by different user tasks. These independant transfers are handled |
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| 20 | // by the HBA device in the same order as they have been written by the |
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| 21 | // driver(s) in the command list. There is no global lock protecting the |
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| 22 | // the HBA device, but the command list being a shared structure, the driver |
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| 23 | // must use an atomic_increment() to get a slot in the command list, |
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| 24 | // and increment the write pointer. |
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| 25 | // |
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[540] | 26 | // 4. This driver implements two operating mode: |
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[529] | 27 | // - In synchronous mode, the calling task poll the HBA_PXCI register to |
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| 28 | // detect the command completion (busy waiting). |
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| 29 | // - In descheduling mode, the calling task is descheduled, and must be |
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| 30 | // restart when the command is completed. |
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| 31 | // |
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[540] | 32 | // 5. As several user tasks can concurrently register commands in the command |
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[529] | 33 | // list, and there is only one HBA interrupt, this interrupt is not linked |
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| 34 | // to a specific task. In descheduling mode, the HBA IRQ is a "global" IRQ |
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| 35 | // that is statically routed to processor P[x_io,y_io,0] in cluster_io. |
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| 36 | // The associated global HBA_ISR send a WAKUP WTI to all tasks that have |
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| 37 | // a completed command. This HBA_ISR uses a read pointer on the command |
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| 38 | // to identify the first expected command completion. The incrementation |
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| 39 | // of this read pointer does not require atomic_increment as there is |
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| 40 | // no concurrent access for this pointer. |
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| 41 | // |
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[437] | 42 | // The SEG_IOC_BASE virtual address must be defined in the hard_config.h file. |
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| 43 | ////////////////////////////////////////////////////////////////////////////////// |
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[258] | 44 | |
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| 45 | #ifndef _GIET_HBA_DRIVERS_H_ |
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| 46 | #define _GIET_HBA_DRIVERS_H_ |
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| 47 | |
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| 48 | /////////////////////////////////////////////////////////////////////////////////// |
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| 49 | // HBA component registers offsets |
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| 50 | /////////////////////////////////////////////////////////////////////////////////// |
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| 51 | |
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| 52 | enum SoclibMultiAhciRegisters |
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| 53 | { |
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| 54 | HBA_PXCLB = 0, // command list base address 32 LSB bits |
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| 55 | HBA_PXCLBU = 1, // command list base address 32 MSB bits |
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| 56 | HBA_PXIS = 4, // interrupt status |
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| 57 | HBA_PXIE = 5, // interrupt enable |
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| 58 | HBA_PXCMD = 6, // run |
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| 59 | HBA_PXCI = 14, // command bit-vector |
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| 60 | HBA_SPAN = 0x400, // 4 Kbytes per channel => 1024 slots |
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| 61 | }; |
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| 62 | |
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| 63 | /////////////////////////////////////////////////////////////////////////////////// |
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[540] | 64 | // Data structures for command table |
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[258] | 65 | /////////////////////////////////////////////////////////////////////////////////// |
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| 66 | |
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| 67 | typedef struct hba_cmd_header_s // size = 128 bytes |
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| 68 | { |
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| 69 | // WORD 0 |
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| 70 | unsigned int res0; // reserved |
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| 71 | |
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| 72 | // WORD 1 |
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| 73 | unsigned char lba0; // LBA 7:0 |
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| 74 | unsigned char lba1; // LBA 15:8 |
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| 75 | unsigned char lba2; // LBA 23:16 |
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| 76 | unsigned char res1; // reserved |
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| 77 | |
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| 78 | // WORD 2 |
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| 79 | unsigned char lba3; // LBA 31:24 |
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| 80 | unsigned char lba4; // LBA 39:32 |
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| 81 | unsigned char lba5; // LBA 47:40 |
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| 82 | unsigned char res2; // reserved |
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| 83 | |
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| 84 | // WORD 3 to 31 |
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| 85 | unsigned int res[29]; // reserved |
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| 86 | |
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| 87 | } hba_cmd_header_t; |
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| 88 | |
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[540] | 89 | typedef struct hba_cmd_buffer_s // size = 16 bytes |
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[258] | 90 | { |
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| 91 | unsigned int dba; // Buffer base address 32 LSB bits |
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| 92 | unsigned int dbau; // Buffer base address 32 MSB bits |
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| 93 | unsigned int res0; // reserved |
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| 94 | unsigned int dbc; // Buffer byte count |
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| 95 | |
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[540] | 96 | } hba_cmd_buffer_t; |
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[258] | 97 | |
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[540] | 98 | typedef struct hba_cmd_table_s // size = 256 bytes |
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[258] | 99 | { |
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| 100 | |
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[540] | 101 | hba_cmd_header_t header; // contains LBA |
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| 102 | hba_cmd_buffer_t buffer; // only one physical buffer |
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| 103 | char res[112]; // for 256 bytes alignment |
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[258] | 104 | |
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| 105 | } hba_cmd_table_t; |
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| 106 | |
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| 107 | /////////////////////////////////////////////////////////////////////////////////// |
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[529] | 108 | // Data structure for command descriptor in command list |
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[258] | 109 | /////////////////////////////////////////////////////////////////////////////////// |
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| 110 | |
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| 111 | typedef struct hba_cmd_desc_s // size = 16 bytes |
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| 112 | { |
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| 113 | // WORD 0 |
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| 114 | unsigned char flag[2]; // W in bit 6 of flag[0] |
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| 115 | unsigned char prdtl[2]; // Number of buffers |
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| 116 | |
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| 117 | // WORD 1 |
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| 118 | unsigned int prdbc; // Number of bytes actually transfered |
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| 119 | |
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| 120 | // WORD 2, WORD 3 |
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| 121 | unsigned int ctba; // Command Table base address 32 LSB bits |
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| 122 | unsigned int ctbau; // Command Table base address 32 MSB bits |
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| 123 | |
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| 124 | } hba_cmd_desc_t; |
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| 125 | |
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| 126 | /////////////////////////////////////////////////////////////////////////////////// |
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[437] | 127 | // access functions |
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[258] | 128 | /////////////////////////////////////////////////////////////////////////////////// |
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| 129 | |
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[437] | 130 | /////////////////////////////////////////////////////////////////////////////////// |
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| 131 | // This function initializes for a given channel |
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| 132 | // - the HBA hardware registers, |
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| 133 | // - the command list pointer, |
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| 134 | // - the command lists physical addresse, |
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| 135 | // - the command tables physical addresses array, |
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| 136 | /////////////////////////////////////////////////////////////////////////////////// |
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[529] | 137 | extern unsigned int _hba_init (); |
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[258] | 138 | |
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[437] | 139 | /////////////////////////////////////////////////////////////////////////////////// |
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[529] | 140 | // This function register a command in Command List and Command Table |
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[437] | 141 | // for a single physical buffer, and updates the HBA_PXCI register. |
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| 142 | // Returns 0 if success, > 0 if error. |
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| 143 | /////////////////////////////////////////////////////////////////////////////////// |
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[529] | 144 | extern unsigned int _hba_access( unsigned int use_irq, |
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| 145 | unsigned int to_mem, |
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| 146 | unsigned int lba, |
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| 147 | unsigned long long paddr, |
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| 148 | unsigned int count ); |
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[258] | 149 | |
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[529] | 150 | /////////////////////////////////////////////////////////////////////////////////// |
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| 151 | // Interrupt Service Routine executed in descheduling mode. |
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| 152 | /////////////////////////////////////////////////////////////////////////////////// |
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| 153 | extern void _hba_isr( unsigned int irq_type, |
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| 154 | unsigned int irq_id, |
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| 155 | unsigned int channel ); |
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[258] | 156 | #endif |
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| 157 | |
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| 158 | // Local Variables: |
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| 159 | // tab-width: 4 |
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| 160 | // c-basic-offset: 4 |
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| 161 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 162 | // indent-tabs-mode: nil |
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| 163 | // End: |
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| 164 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 165 | |
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