Changeset 529 for soft/giet_vm/giet_drivers/hba_driver.h
- Timestamp:
- Mar 27, 2015, 11:51:33 AM (9 years ago)
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- 1 edited
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soft/giet_vm/giet_drivers/hba_driver.h
r437 r529 8 8 // This driver supports the SocLib VciMultiAhci component, that is a multi-channels, 9 9 // block oriented, external storage contrÃŽler, respecting the AHCI standard. 10 // 11 // 1. Each HBA channel define an independant physical disk, but this driver 12 // supports only channel 0, because the GIET-VM uses only one physical disk. 13 // 14 // 2. The "command list" can contain up to 32 independant commands, posted 15 // by different user tasks. These independant transfers are handled 16 // by the HBA device in the same order as they have been written by the 17 // driver(s) in the command list. There is no global lock protecting the 18 // the HBA device, but the command list being a shared structure, the driver 19 // must use an atomic_increment() to get a slot in the command list, 20 // and increment the write pointer. 21 // 22 // 3. This driver implements two operating mode: 23 // - In synchronous mode, the calling task poll the HBA_PXCI register to 24 // detect the command completion (busy waiting). 25 // - In descheduling mode, the calling task is descheduled, and must be 26 // restart when the command is completed. 27 // 28 // 4. As several user tasks can concurrently register commands in the command 29 // list, and there is only one HBA interrupt, this interrupt is not linked 30 // to a specific task. In descheduling mode, the HBA IRQ is a "global" IRQ 31 // that is statically routed to processor P[x_io,y_io,0] in cluster_io. 32 // The associated global HBA_ISR send a WAKUP WTI to all tasks that have 33 // a completed command. This HBA_ISR uses a read pointer on the command 34 // to identify the first expected command completion. The incrementation 35 // of this read pointer does not require atomic_increment as there is 36 // no concurrent access for this pointer. 10 37 // 11 38 // The SEG_IOC_BASE virtual address must be defined in the hard_config.h file. … … 74 101 75 102 /////////////////////////////////////////////////////////////////////////////////// 76 // Data structure s for command list array103 // Data structure for command descriptor in command list 77 104 /////////////////////////////////////////////////////////////////////////////////// 78 105 … … 92 119 } hba_cmd_desc_t; 93 120 94 typedef struct hba_cmd_list_s // size = 512 bytes95 {96 // 32 command descriptors97 hba_cmd_desc_t desc[32];98 99 } hba_cmd_list_t;100 101 121 /////////////////////////////////////////////////////////////////////////////////// 102 122 // access functions … … 110 130 // - the command tables physical addresses array, 111 131 /////////////////////////////////////////////////////////////////////////////////// 112 extern unsigned int _hba_init ( unsigned int channel);132 extern unsigned int _hba_init (); 113 133 114 134 /////////////////////////////////////////////////////////////////////////////////// 115 // This function register a writecommand in Command List and Command Table135 // This function register a command in Command List and Command Table 116 136 // for a single physical buffer, and updates the HBA_PXCI register. 117 137 // Returns 0 if success, > 0 if error. 118 138 /////////////////////////////////////////////////////////////////////////////////// 119 extern unsigned int _hba_ write( unsigned int channel, // channel index120 unsigned int mode, // BOOT / KERNEL / USER121 unsigned int lba, // logic bloc address on device122 unsigned long long paddr, // memory buffer base address123 unsigned int count ); // number of blocs139 extern unsigned int _hba_access( unsigned int use_irq, 140 unsigned int to_mem, 141 unsigned int lba, 142 unsigned long long paddr, 143 unsigned int count ); 124 144 125 ////////////////////////////////////////////////////////////////////////////////// 126 // This function register a read command in Command List and Command Table 127 // for a single physical buffer, and updates the HBA_PXCI register. 128 // Returns 0 if success, > 0 if error. 129 ////////////////////////////////////////////////////////////////////////////////// 130 extern unsigned int _hba_read ( unsigned int channel, // channel index 131 unsigned int mode, // BOOT / KERNEL / USER 132 unsigned int lba, // logic bloc address on device 133 unsigned long long paddr, // memory buffer base address 134 unsigned int count ); // number of blocks 135 136 ///////////////////////////////////////////////////////////////////////////////// 137 // This function returns the block_size of HBA controller 138 ///////////////////////////////////////////////////////////////////////////////// 139 extern unsigned int _hba_get_block_size (); 140 141 ///////////////////////////////////////////////////////////////////////////////////// 142 // This function returns the content of the HBA_PXIS register for a given channel, 143 // and reset this register to acknoledge IRQ. 144 // return 0 if success, > 0 if error 145 ///////////////////////////////////////////////////////////////////////////////////// 146 extern unsigned int _hba_get_status( unsigned int channel ); 147 148 145 /////////////////////////////////////////////////////////////////////////////////// 146 // Interrupt Service Routine executed in descheduling mode. 147 /////////////////////////////////////////////////////////////////////////////////// 148 extern void _hba_isr( unsigned int irq_type, 149 unsigned int irq_id, 150 unsigned int channel ); 149 151 #endif 150 152
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