[258] | 1 | /////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : nic_driver.h |
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| 3 | // Date : 01/11/2013 |
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| 4 | // Author : alain greiner |
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| 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | /////////////////////////////////////////////////////////////////////////////////// |
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[437] | 7 | // The nic_driver.c and nic_driver.h files are part ot the GIET-VM nano-kernel. |
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| 8 | // This driver supports the vci_multi_nic component. |
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| 9 | // |
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| 10 | // It can exist only one network controller in the architecture, but this |
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| 11 | // component supports several channels. |
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| 12 | // |
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| 13 | // It can be accessed directly by software with memcpy(), |
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| 14 | // or it can be accessed through the vci_chbuf_dma component: |
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| 15 | // |
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| 16 | // The '_nic_sync_write' and '_nic_sync_read' functions use a memcpy strategy to |
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| 17 | // implement the transfer between a data buffer (user space) and the NIC |
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| 18 | // buffer (kernel space). They are blocking until completion of the transfer. |
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| 19 | // |
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| 20 | // The _nic_cma_start() and _nic_cma_stop() functions use the VciChbufDma component |
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| 21 | // to transfer a flow of packets from the NIC RX hard chbuf (two containers) |
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| 22 | // to an user RX chbuf (two containers), and to transfer another flow of packets |
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| 23 | // from an user TX chbuf (two containers) to the NIC TX chbuf (two containers). |
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| 24 | // One NIC channel and two CMA channels must be allocated to the task |
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| 25 | // in the mapping_info data structure. |
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| 26 | // |
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| 27 | // All these access functions return -1 in case of error. |
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| 28 | // |
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| 29 | // The SEG_NIC_BASE address must be defined in the hard_config.h file. |
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| 30 | ////////////////////////////////////////////////////////////////////////////////// |
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[258] | 31 | |
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| 32 | #ifndef _GIET_NIC_DRIVERS_H_ |
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| 33 | #define _GIET_NIC_DRIVERS_H_ |
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| 34 | |
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[437] | 35 | #include <giet_config.h> |
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| 36 | |
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[258] | 37 | /////////////////////////////////////////////////////////////////////////////////// |
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[437] | 38 | // Global Addressable Registers |
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[295] | 39 | /////////////////////////////////////////////////////////////////////////////////// |
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| 40 | |
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[456] | 41 | enum SoclibMultiNicHyperRegisters { |
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[295] | 42 | NIC_G_VIS = 0, // bitfield : bit N = 0 -> channel N disabled |
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| 43 | NIC_G_ON = 1, // boolean : NIC component activated |
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[456] | 44 | NIC_G_NB_CHAN = 2, // Number of channels (read only) |
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[295] | 45 | NIC_G_BC_ENABLE = 3, // boolean : Enable Broadcast if non zero |
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| 46 | NIC_G_TDM_ENABLE = 4, // boolean : TDM Scheduler if non zero |
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| 47 | NIC_G_TDM_PERIOD = 5, // TDM time slot value |
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| 48 | NIC_G_BYPASS_ENABLE = 6, // boolean : Enable bypass for TX packets |
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| 49 | // alignment |
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| 50 | NIC_G_MAC_4 = 8, // channel mac address 32 LSB bits array[8] |
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| 51 | NIC_G_MAC_2 = 16, // channel mac address 16 MSB bits array[8] |
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| 52 | // alignment |
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| 53 | NIC_G_NPKT_RX_G2S_RECEIVED = 32, // number of packets received on GMII RX port |
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| 54 | NIC_G_NPKT_RX_G2S_DISCARDED = 33, // number of RX packets discarded by RX_G2S FSM |
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| 55 | |
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| 56 | NIC_G_NPKT_RX_DES_SUCCESS = 34, // number of RX packets transmited by RX_DES FSM |
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| 57 | NIC_G_NPKT_RX_DES_TOO_SMALL = 35, // number of discarded too small RX packets (<60B) |
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| 58 | NIC_G_NPKT_RX_DES_TOO_BIG = 36, // number of discarded too big RX packets (>1514B) |
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[456] | 59 | NIC_G_NPKT_RX_DES_MFIFO_FULL = 37, // number of discarded RX packets fifo full |
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| 60 | NIC_G_NPKT_RX_DES_CRC_FAIL = 38, // number of discarded RX packets CRC32 failure |
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[295] | 61 | |
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| 62 | NIC_G_NPKT_RX_DISPATCH_RECEIVED = 39, // number of packets received by RX_DISPATCH FSM |
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| 63 | NIC_G_NPKT_RX_DISPATCH_BROADCAST = 40, // number of broadcast RX packets received |
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[456] | 64 | NIC_G_NPKT_RX_DISPATCH_DST_FAIL = 41, // number of discarded RX packets DST MAC not found |
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[295] | 65 | NIC_G_NPKT_RX_DISPATCH_CH_FULL = 42, // number of discarded RX packets for channel full |
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| 66 | |
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| 67 | NIC_G_NPKT_TX_DISPATCH_RECEIVED = 43, // number of packets received by TX_DISPATCH FSM |
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| 68 | NIC_G_NPKT_TX_DISPATCH_TOO_SMALL = 44, // number of discarded too small TX packets (<60B) |
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| 69 | NIC_G_NPKT_TX_DISPATCH_TOO_BIG = 45, // number of discarded too big TX packets (>1514B) |
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[456] | 70 | NIC_G_NPKT_TX_DISPATCH_SRC_FAIL = 46, // number of discarded TX packets SRC MAC failed |
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[295] | 71 | NIC_G_NPKT_TX_DISPATCH_BROADCAST = 47, // number of broadcast TX packets received |
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| 72 | NIC_G_NPKT_TX_DISPATCH_BYPASS = 48, // number of bypassed TX->RX packets |
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| 73 | NIC_G_NPKT_TX_DISPATCH_TRANSMIT = 49, // number of transmit TX packets |
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| 74 | |
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| 75 | NIC_CHANNEL_SPAN = 0x2000, |
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| 76 | }; |
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| 77 | |
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[481] | 78 | ////////////////////////////////////////////////////////////////////////////////////////////// |
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[437] | 79 | // Channel Addressable Registers |
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[613] | 80 | // A buffer descriptor occupies 8 bytes (two 32 bits words): |
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| 81 | // - the 26 LSB bits of LOW WORD contain bits[31:6] of the buffer satus paddr |
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| 82 | // - bits[31:26] of LOW WORD and bits[19:0] of HIGH WORD contain bits[31:6] of the buffer paddr |
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| 83 | // - the 12 MSB bits of HIGH WORD contain the common address extension of the buffer and its status |
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| 84 | // The buffer status occupies 64 bytes but only the last bit is useful (1 for full and 0 for empty) |
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| 85 | // The buffer address and its status address must be 64 bytes aligned (bits[5:0] equal to 0) |
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| 86 | /////////////////////////////////////////////////////////////////////////////////////////////// |
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[481] | 87 | |
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[295] | 88 | enum SoclibMultiNicChannelRegisters |
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| 89 | { |
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[613] | 90 | NIC_RX_STS_0 = 0, // RX_0 status (full or empty) (Read/Write) |
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| 91 | NIC_RX_STS_1 = 16, // RX_1 status (full or empty) (Read/Write) |
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| 92 | NIC_TX_STS_0 = 32, // TX_0 status (full or empty) (Read/Write) |
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| 93 | NIC_TX_STS_1 = 48, // TX_1 status (full or empty) (Read/Write) |
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| 94 | NIC_RX_DESC_LO_0 = 64, // RX_0 descriptor low word (Read/Write) |
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| 95 | NIC_RX_DESC_HI_0 = 65, // RX_0 descriptor high word (Read/Write) |
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| 96 | NIC_RX_DESC_LO_1 = 66, // RX_1 descriptor low word (Read/Write) |
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| 97 | NIC_RX_DESC_HI_1 = 67, // RX_1 descriptor high word (Read/Write) |
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| 98 | NIC_TX_DESC_LO_0 = 68, // TX_0 descriptor low word (Read/Write) |
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| 99 | NIC_TX_DESC_HI_0 = 69, // TX_0 descriptor high word (Read/Write) |
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| 100 | NIC_TX_DESC_LO_1 = 70, // TX_1 descriptor low word (Read/Write) |
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| 101 | NIC_TX_DESC_HI_1 = 71, // TX_1 descriptor high word (Read/Write) |
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| 102 | NIC_MAC_4 = 72, // channel mac address 32 LSB bits (Read Only) |
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| 103 | NIC_MAC_2 = 73, // channel mac address 16 LSB bits (Read Only) |
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| 104 | NIC_RX_RUN = 74, // RX packets can be received (write_only) |
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| 105 | NIC_TX_RUN = 75, // TX packets can be transmitted (write_only) |
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[295] | 106 | }; |
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| 107 | |
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[437] | 108 | |
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[295] | 109 | /////////////////////////////////////////////////////////////////////////////////// |
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[437] | 110 | // Initialization functions |
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[258] | 111 | /////////////////////////////////////////////////////////////////////////////////// |
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| 112 | |
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[456] | 113 | extern unsigned int _nic_get_channel_register( unsigned int channel, |
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| 114 | unsigned int index ); |
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[258] | 115 | |
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[456] | 116 | extern void _nic_set_channel_register( unsigned int channel, |
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| 117 | unsigned int index, |
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| 118 | unsigned int value ); |
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| 119 | |
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| 120 | extern unsigned int _nic_get_global_register( unsigned int index ); |
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| 121 | |
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| 122 | extern void _nic_set_global_register( unsigned int index, |
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| 123 | unsigned int value ); |
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| 124 | |
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| 125 | extern int _nic_global_init( unsigned int bc_enable, |
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| 126 | unsigned int bypass_enable, |
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| 127 | unsigned int tdm_enable, |
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| 128 | unsigned int tdm_period ); |
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| 129 | |
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[448] | 130 | extern int _nic_channel_start( unsigned int channel, |
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| 131 | unsigned int is_rx, |
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| 132 | unsigned int mac4, |
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| 133 | unsigned int mac2 ); |
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[258] | 134 | |
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[448] | 135 | extern int _nic_channel_stop( unsigned int channel, |
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| 136 | unsigned int is_rx ); |
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[258] | 137 | |
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| 138 | |
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[437] | 139 | /////////////////////////////////////////////////////////////////////////////////// |
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| 140 | // Interrupt Service Routines |
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| 141 | /////////////////////////////////////////////////////////////////////////////////// |
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| 142 | |
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[295] | 143 | extern void _nic_rx_isr( unsigned int irq_type, |
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| 144 | unsigned int irq_id, |
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| 145 | unsigned int channel ); |
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| 146 | |
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| 147 | extern void _nic_tx_isr( unsigned int irq_type, |
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| 148 | unsigned int irq_id, |
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| 149 | unsigned int channel ); |
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| 150 | |
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[258] | 151 | |
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| 152 | |
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| 153 | #endif |
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| 154 | |
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| 155 | // Local Variables: |
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| 156 | // tab-width: 4 |
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| 157 | // c-basic-offset: 4 |
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| 158 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 159 | // indent-tabs-mode: nil |
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| 160 | // End: |
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| 161 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 162 | |
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