source: soft/giet_vm/giet_drivers/spi_driver.h @ 595

Last change on this file since 595 was 545, checked in by alain, 10 years ago

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[284]1///////////////////////////////////////////////////////////////////////////////////
2// File     : spi_driver.h
3// Date     : 31/08/2012
4// Author   : cesar fuguet
5// Copyright (c) UPMC-LIP6
6///////////////////////////////////////////////////////////////////////////////////
7#ifndef _GIET_SPI_DRIVER_H_
8#define _GIET_SPI_DRIVER_H_
[283]9
10#include <io.h>
11#include <mapping_info.h>
12
[284]13///////////////////////////////////////////////////////////////////////////////
14// SPI structure definition
15///////////////////////////////////////////////////////////////////////////////
[283]16struct spi_dev
17{
[284]18    // RX/TX registers of the SPI controller
[283]19    unsigned int rx_tx[4];
20
[284]21    // control register of the SPI controller
[283]22    unsigned int ctrl;
23
[284]24    // divider register for the SPI controller generated clock signal
[283]25    unsigned int divider;
26
[284]27    // slave select register of the SPI controller
[283]28    unsigned int ss;
[284]29
30    // SPI-DMA registers
[283]31    unsigned int dma_base;
32    unsigned int dma_baseh;
33    unsigned int dma_count;
34};
35
36void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index);
37
38inline volatile unsigned char spi_get_rx(struct spi_dev * spi, int index);
39
40unsigned int spi_get_data(struct spi_dev * spi, paddr_t buffer, unsigned int count);
41
42inline void spi_ss_assert(struct spi_dev * spi, int index);
43
44inline void spi_ss_deassert(struct spi_dev * spi, int index);
45
[284]46void _spi_init ( struct spi_dev * spi,
47                 int spi_freq        ,
48                 int sys_freq        ,
49                 int char_len        ,
50                 int tx_edge         ,
51                 int rx_edge         );
[283]52
[284]53///////////////////////////////////////////////////////////////////////////////
54// SPI macros and constants
55///////////////////////////////////////////////////////////////////////////////
56#define SPI_TX_POSEDGE         1           // MOSI is changed on neg edge
57#define SPI_TX_NEGEDGE         0           // MOSI is changed on pos edge
58#define SPI_RX_POSEDGE         1           // MISO is latched on pos edge
59#define SPI_RX_NEGEDGE         0           // MISO is latched on neg edge
[283]60
[284]61#define SPI_CTRL_ASS_EN        ( 1 << 13 ) // Auto Slave Sel Assertion
62#define SPI_CTRL_IE_EN         ( 1 << 12 ) // Interrupt Enable
63#define SPI_CTRL_LSB_EN        ( 1 << 11 ) // LSB are sent first
64#define SPI_CTRL_TXN_EN        ( 1 << 10 ) // MOSI is changed on neg edge
65#define SPI_CTRL_RXN_EN        ( 1 << 9  ) // MISO is latched on neg edge
66#define SPI_CTRL_GO_BSY        ( 1 << 8  ) // Start the transfer
67#define SPI_CTRL_DMA_BSY       ( 1 << 16 ) // DMA in progress
68#define SPI_CTRL_CHAR_LEN_MASK (  0xFF   ) // Bits transmited in 1 transfer
69#define SPI_RXTX_MASK          (  0xFF   ) // Mask for the an RX/TX value
[283]70
[284]71#define SPI_DMA_COUNT_READ     ( 1 << 0  ) // operation is a read (else write)
[283]72
[284]73///////////////////////////////////////////////////////////////////////////////
74//      SPI_IS_BUSY()
75// This macro checks the GO_BSY and DMA_BSY bits of the SPI controller which
76// indicates an ongoing transfer.
77//
78// Returns 1 if there is an unfinished transfer
79///////////////////////////////////////////////////////////////////////////////
80#define SPI_IS_BUSY(x) \
81    ((ioread32(&x->ctrl) & (SPI_CTRL_GO_BSY|SPI_CTRL_DMA_BSY)) != 0) ? 1 : 0
[283]82
83#endif
84
[284]85// Local Variables:
86// tab-width: 4
87// c-basic-offset: 4
88// c-file-offsets:((innamespace . 0)(inline-open . 0))
89// indent-tabs-mode: nil
90// End:
91// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
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