1 | /////////////////////////////////////////////////////////////////////////// |
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2 | // File : irq_handler.h |
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3 | // Date : 01/04/2012 |
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4 | // Author : alain greiner |
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5 | // Copyright (c) UPMC-LIP6 |
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6 | /////////////////////////////////////////////////////////////////////////// |
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7 | // The irq_handler.c and irq_handler.h files are part of the GIET-VM. |
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8 | // They contain the code of used to handlle HWI, WTI, PTI interrupts. |
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9 | /////////////////////////////////////////////////////////////////////////// |
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10 | |
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11 | #ifndef _IRQ_HANDLER_H |
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12 | #define _IRQ_HANDLER_H |
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13 | |
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14 | /////////////////////////////////////////////////////////////////////////// |
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15 | // This enum must consistent with the values defined in |
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16 | // xml_driver.c / xml_parser.c / irq_handler.c / mapping.py |
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17 | /////////////////////////////////////////////////////////////////////////// |
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18 | |
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19 | enum isr_type_t |
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20 | { |
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21 | ISR_DEFAULT = 0, |
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22 | ISR_TICK = 1, |
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23 | ISR_TTY_RX = 2, |
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24 | ISR_TTY_TX = 3, |
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25 | ISR_BDV = 4, |
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26 | ISR_TIMER = 5, |
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27 | ISR_WAKUP = 6, |
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28 | ISR_NIC_RX = 7, |
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29 | ISR_NIC_TX = 8, |
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30 | ISR_CMA = 9, |
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31 | ISR_MMC = 10, |
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32 | ISR_DMA = 11, |
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33 | ISR_SPI = 12, |
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34 | ISR_MWR = 13, |
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35 | ISR_HBA = 14, |
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36 | }; |
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37 | |
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38 | /////////////////////////////////////////////////////////////////////////// |
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39 | // Global variables allocated in irq_handler.c |
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40 | /////////////////////////////////////////////////////////////////////////// |
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41 | |
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42 | // array of external IRQ indexes for each (isr/channel) couple |
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43 | extern unsigned char _ext_irq_index[GIET_ISR_TYPE_MAX][GIET_ISR_CHANNEL_MAX]; |
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44 | |
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45 | // WTI mailbox allocators for external IRQ routing (3 allocators per proc) |
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46 | extern unsigned char _wti_alloc_one[X_SIZE][Y_SIZE][NB_PROCS_MAX]; |
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47 | extern unsigned char _wti_alloc_two[X_SIZE][Y_SIZE][NB_PROCS_MAX]; |
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48 | extern unsigned char _wti_alloc_ter[X_SIZE][Y_SIZE][NB_PROCS_MAX]; |
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49 | |
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50 | /////////////////////////////////////////////////////////////////////////// |
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51 | // irq_handler functions |
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52 | /////////////////////////////////////////////////////////////////////////// |
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53 | |
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54 | /////////////////////////////////////////////////////////////////////////// |
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55 | // This function is only used when the architecture contains an external |
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56 | // IOPIC component. It initializes the _ext_irq_index[isr][channel] array, |
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57 | // defining the IRQ index associated to (isr_type/isr_channel) couple. |
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58 | // This array is used by the kernel for dynamic routing of an external IRQ |
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59 | // signaling completion to the processor that launched the I/O operation. |
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60 | /////////////////////////////////////////////////////////////////////////// |
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61 | |
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62 | extern void _ext_irq_init(); |
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63 | |
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64 | /////////////////////////////////////////////////////////////////////////// |
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65 | // This function is only used when the architecture contains an external |
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66 | // IOPIC component. It dynamically routes an external IRQ signaling |
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67 | // completion of an I/O operation to the processor P[x,y,p] running |
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68 | // the calling task. |
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69 | // 1) it allocates a WTI mailbox in the XCU of cluster[x,y] : Each processor |
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70 | // has 3 mailboxes, with index in [4*p+1, 4*p+2, 4*p+3]. |
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71 | // 2) it initialises the IOPIC_ADDRESS and IOPIC_MASK registers associated |
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72 | // to the (isr_type/isr_channel) couple. |
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73 | // 3) it initializes the proper entry in the WTI interrupt vector associated |
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74 | // to processor P[x,y,p]. |
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75 | /////////////////////////////////////////////////////////////////////////// |
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76 | |
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77 | extern void _ext_irq_alloc( unsigned int isr_type, |
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78 | unsigned int isr_channel, |
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79 | unsigned int* wti_index ); |
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80 | |
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81 | /////////////////////////////////////////////////////////////////////////// |
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82 | // This function is only used when the architecture contains an external |
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83 | // IOPIC component. It desallocates all ressources allocated by the |
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84 | // previous _ext_irq_alloc() function to the calling processor. |
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85 | // 1) it desactivates the PIC entry associated to (isr_type/isr_channel). |
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86 | // 2) it releases the WTI mailbox in the XCU of cluster[x,y]. |
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87 | /////////////////////////////////////////////////////////////////////////// |
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88 | |
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89 | extern void _ext_irq_release( unsigned int isr_type, |
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90 | unsigned int isr_channel, |
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91 | unsigned int wti_index ); |
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92 | |
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93 | /////////////////////////////////////////////////////////////////////////// |
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94 | // This function access the XICU component (Interrupt Controler Unit) |
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95 | // to get the interrupt vector entry. There is one XICU component per |
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96 | // cluster, and this component can support up to NB_PROCS_MAX output IRQs. |
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97 | // It returns the highest priority active interrupt index (smaller |
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98 | // indexes have the highest priority). |
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99 | // Any value larger than 31 means "no active interrupt". |
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100 | // |
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101 | // There is three interrupt vectors per processor (stored in the processor's |
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102 | // scheduler) for the three HWI, PTI, and WTI interrupts types. |
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103 | // Each interrupt vector entry contains two fields: |
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104 | // - isr_type bits[15:0] : defines the type of ISR to be executed. |
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105 | // - isr_channel bits[31:16] : defines the channel index |
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106 | // If the peripheral is replicated in clusters, the channel_id is |
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107 | // a global index : channel_id = cluster_id * NB_CHANNELS_MAX + loc_id |
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108 | /////////////////////////////////////////////////////////////////////////// |
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109 | |
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110 | extern void _irq_demux(); |
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111 | |
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112 | /////////////////////////////////////////////////////////////////////////// |
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113 | // This default ISR is called when the interrupt handler is called, |
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114 | // and there is no active IRQ. It displays a warning message on TTY[0]. |
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115 | /////////////////////////////////////////////////////////////////////////// |
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116 | |
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117 | extern void _isr_default(); |
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118 | |
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119 | /////////////////////////////////////////////////////////////////////////// |
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120 | // This ISR can only be executed after a WTI to force a context switch |
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121 | // on a remote processor. The context switch is only executed if the |
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122 | // current task is the IDLE_TASK, or if the value written in the mailbox |
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123 | // is non zero. |
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124 | /////////////////////////////////////////////////////////////////////////// |
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125 | |
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126 | extern void _isr_wakup( unsigned int irq_type, |
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127 | unsigned int irq_id, |
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128 | unsigned int channel ); |
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129 | |
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130 | ///////////////////////////////////////////////////////////////////////////////////// |
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131 | // This ISR is in charge of context switch, and handles the IRQs generated by |
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132 | // the "system" timers. It can be PTI in case of XCU, or it can be HWI generated |
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133 | // by an external timer in case of ICU. |
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134 | // The ISR acknowledges the IRQ, and calls the _ctx_switch() function. |
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135 | ///////////////////////////////////////////////////////////////////////////////////// |
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136 | extern void _isr_tick( unsigned int irq_type, |
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137 | unsigned int irq_id, |
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138 | unsigned int channel ); |
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139 | |
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140 | #endif |
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141 | |
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142 | // Local Variables: |
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143 | // tab-width: 4 |
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144 | // c-basic-offset: 4 |
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145 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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146 | // indent-tabs-mode: nil |
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147 | // End: |
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148 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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149 | |
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