Changeset 528 for soft/giet_vm/giet_kernel/irq_handler.h
- Timestamp:
- Mar 27, 2015, 11:43:48 AM (9 years ago)
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soft/giet_vm/giet_kernel/irq_handler.h
r519 r528 1 /////////////////////////////////////////////////////////////////////////// ////////1 /////////////////////////////////////////////////////////////////////////// 2 2 // File : irq_handler.h 3 3 // Date : 01/04/2012 4 4 // Author : alain greiner 5 5 // Copyright (c) UPMC-LIP6 6 /////////////////////////////////////////////////////////////////////////////////// 7 // The irq_handler.c and irq_handler.h files are part of the GIET-VM nano-kernel. 8 // They contain the code of the _irq_demux() function that access the XICU or 9 // ICU component (Interupt Controler Unit), and the various ISRs (Interrupt 10 // Service Routine) associated to the various ISR types. 11 /////////////////////////////////////////////////////////////////////////////////// 6 /////////////////////////////////////////////////////////////////////////// 7 // The irq_handler.c and irq_handler.h files are part of the GIET-VM. 8 // They contain the code of used to handlle HWI, WTI, PTI interrupts. 9 /////////////////////////////////////////////////////////////////////////// 12 10 13 11 #ifndef _IRQ_HANDLER_H 14 12 #define _IRQ_HANDLER_H 15 13 16 /////////////////////////////////////////////////////////////////////////// /////14 /////////////////////////////////////////////////////////////////////////// 17 15 // This enum must consistent with the values defined in 18 // xml_driver.c / irq_handler.c / mapping.py19 /////////////////////////////////////////////////////////////////////////// ////16 // xml_driver.c / xml_parser.c / irq_handler.c / mapping.py 17 /////////////////////////////////////////////////////////////////////////// 20 18 21 19 enum isr_type_t … … 35 33 ISR_SPI = 12, 36 34 ISR_MWR = 13, 35 ISR_HBA = 14, 37 36 }; 38 37 39 /////////////////////////////////////////////////////////////////////////////////// 38 /////////////////////////////////////////////////////////////////////////// 39 // Global variables allocated in irq_handler.c 40 /////////////////////////////////////////////////////////////////////////// 41 42 // array of external IRQ indexes for each (isr/channel) couple 43 extern unsigned char _ext_irq_index[GIET_ISR_TYPE_MAX][GIET_ISR_CHANNEL_MAX]; 44 45 // WTI mailbox allocators for external IRQ routing (3 allocators per proc) 46 extern unsigned char _wti_alloc_one[X_SIZE][Y_SIZE][NB_PROCS_MAX]; 47 extern unsigned char _wti_alloc_two[X_SIZE][Y_SIZE][NB_PROCS_MAX]; 48 extern unsigned char _wti_alloc_ter[X_SIZE][Y_SIZE][NB_PROCS_MAX]; 49 50 /////////////////////////////////////////////////////////////////////////// 40 51 // irq_handler functions 41 /////////////////////////////////////////////////////////////////////////// ////////52 /////////////////////////////////////////////////////////////////////////// 42 53 43 /////////////////////////////////////////////////////////////////////////////////// 44 // This function access the ICU or XICU component (Interrupt Controler Unit) 45 // to get the interrupt vector entry. There is one ICU or XICU component per 54 /////////////////////////////////////////////////////////////////////////// 55 // This function is only used when the architecture contains an external 56 // IOPIC component. It initializes the _ext_irq_index[isr][channel] array, 57 // defining the IRQ index associated to (isr_type/isr_channel) couple. 58 // This array is used by the kernel for dynamic routing of an external IRQ 59 // signaling completion to the processor that launched the I/O operation. 60 /////////////////////////////////////////////////////////////////////////// 61 62 extern void _ext_irq_init(); 63 64 /////////////////////////////////////////////////////////////////////////// 65 // This function is only used when the architecture contains an external 66 // IOPIC component. It dynamically routes an external IRQ signaling 67 // completion of an I/O operation to the processor P[x,y,p] running 68 // the calling task. 69 // 1) it allocates a WTI mailbox in the XCU of cluster[x,y] : Each processor 70 // has 3 mailboxes, with index in [4*p+1, 4*p+2, 4*p+3]. 71 // 2) it initialises the IOPIC_ADDRESS and IOPIC_MASK registers associated 72 // to the (isr_type/isr_channel) couple. 73 // 3) it initializes the proper entry in the WTI interrupt vector associated 74 // to processor P[x,y,p]. 75 /////////////////////////////////////////////////////////////////////////// 76 77 extern void _ext_irq_alloc( unsigned int isr_type, 78 unsigned int isr_channel, 79 unsigned int* wti_index ); 80 81 /////////////////////////////////////////////////////////////////////////// 82 // This function is only used when the architecture contains an external 83 // IOPIC component. It desallocates all ressources allocated by the 84 // previous _ext_irq_alloc() function to the calling processor. 85 // 1) it desactivates the PIC entry associated to (isr_type/isr_channel). 86 // 2) it releases the WTI mailbox in the XCU of cluster[x,y]. 87 /////////////////////////////////////////////////////////////////////////// 88 89 extern void _ext_irq_release( unsigned int isr_type, 90 unsigned int isr_channel, 91 unsigned int wti_index ); 92 93 /////////////////////////////////////////////////////////////////////////// 94 // This function access the XICU component (Interrupt Controler Unit) 95 // to get the interrupt vector entry. There is one XICU component per 46 96 // cluster, and this component can support up to NB_PROCS_MAX output IRQs. 47 97 // It returns the highest priority active interrupt index (smaller 48 98 // indexes have the highest priority). 49 // Any value larger than 31 means "no active interrupt" , and no ISR is executed.99 // Any value larger than 31 means "no active interrupt". 50 100 // 51 101 // There is three interrupt vectors per processor (stored in the processor's 52 102 // scheduler) for the three HWI, PTI, and WTI interrupts types. 53 // Each interrupt vector entry contains three bits fields: 54 // - isr_id bits[15:0] : defines the type of ISR to be executed. 55 // - channel_id bits[30:16] : defines the channel for multi-channels peripherals. 56 // - valid bit 31 : valid interrupt vector entry 103 // Each interrupt vector entry contains two fields: 104 // - isr_type bits[15:0] : defines the type of ISR to be executed. 105 // - isr_channel bits[31:16] : defines the channel index 57 106 // If the peripheral is replicated in clusters, the channel_id is 58 107 // a global index : channel_id = cluster_id * NB_CHANNELS_MAX + loc_id 59 /////////////////////////////////////////////////////////////////////////////////// 108 /////////////////////////////////////////////////////////////////////////// 109 60 110 extern void _irq_demux(); 61 111 62 /////////////////////////////////////////////////////////////////////////// ////////112 /////////////////////////////////////////////////////////////////////////// 63 113 // This default ISR is called when the interrupt handler is called, 64 // and there is no active IRQ. It simply displays a warning message on TTY[0]. 65 /////////////////////////////////////////////////////////////////////////////////// 114 // and there is no active IRQ. It displays a warning message on TTY[0]. 115 /////////////////////////////////////////////////////////////////////////// 116 66 117 extern void _isr_default(); 67 118 68 /////////////////////////////////////////////////////////////////////////////////// 69 // This ISR can only be executed after a WTI (IPI) to force a context switch 70 // on a remote processor. The context switch is only executed if the current task 71 // is the IDLE_TASK, or if the value written in the mailbox is non zero. 72 /////////////////////////////////////////////////////////////////////////////////// 119 /////////////////////////////////////////////////////////////////////////// 120 // This ISR can only be executed after a WTI to force a context switch 121 // on a remote processor. The context switch is only executed if the 122 // current task is the IDLE_TASK, or if the value written in the mailbox 123 // is non zero. 124 /////////////////////////////////////////////////////////////////////////// 125 73 126 extern void _isr_wakup( unsigned int irq_type, 74 127 unsigned int irq_id,
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