Context Navigation

source: soft/giet_vm/giet_python/mapping.py @ 423

Last change on this file since 423 was 423, checked in by porquet, 10 years ago
fix the scripts to use python2
Property svn:executable set to ``*
File size: 111.5 KB

Rev	Line
[423]	1	#!/usr/bin/env python2
[305]	2
[319]	3	import sys
	4
	5	##########################################################################################
[305]	6	# file : giet_mapping.py
	7	# date : april 2014
	8	# author : Alain Greiner
[319]	9	##########################################################################################
	10	# This file contains the classes required to define a mapping for the GIET_VM.
	11	# - A 'Mapping' contains a set of 'Cluster' (hardware architecture)
	12	# a set of 'Vseg' (kernel virtual segments mapping)
	13	# a set of 'Vspace' (several user applications).
	14	# - A 'Cluster' contains a set of 'Pseg' (all physical segments in cluster)
	15	# a set of 'Proc' (processors in cluster)
	16	# a set of 'Periph' (peripherals in cluster)
	17	# a set of 'Coproc' (coprocessors in cluster)
	18	# - A 'Vspace' contains a set of 'Vseg' (user virtual segments mapping)
	19	# a set of 'Task' (user tasks mapping)
	20	# - A 'Vseg' contains a set of 'Vobj'
	21	# - A 'Periph' contains a set of 'Irq' (only for XCU, ICU and PIC types )
	22	# - A 'Coproc' contains a set of 'Cpports' (one port per MWMR channel)
	23	##########################################################################################
	24	# Implementation Note
[411]	25	# The various objects used to describe a mapping are distributed in the PYTHON structure:
[319]	26	# For example the psegs set is split in several subsets (one subset per cluster),
	27	# or the tasks set is split in several subsets (one subset per vspace), etc...
	28	# In the C binary data structure used by the giet_vm, all objects of same type
[406]	29	# are stored in a linear array (one single array for all psegs for example).
	30	# For all objects, we compute and store in the PYTHON object itsel a "global index"
	31	# corresponding to the index in this global array, and this index can be used as
[319]	32	# a pseudo-pointer to identify a specific object of a given type.
	33	##########################################################################################
[305]	34
[411]	35	##########################################################################################
	36	# Various constants
	37	##########################################################################################
	38
	39	PADDR_WIDTH = 40 # number of bits for physical address
	40	X_WIDTH = 4 # number of bits encoding x coordinate
	41	Y_WIDTH = 4 # number of bits encoding y coordinate
	42	P_WIDTH = 4 # number of bits encoding local proc_id
	43	VPN_ANTI_MASK = 0x00000FFF # mask virtual address to get offset in a small page
	44	BPN_MASK = 0xFFE00000 # mask virtual address to get the BPN (big page)
	45	PERI_INCREMENT = 0x10000 # virtual address increment for replicated global vsegs
	46	RESET_ADDRESS = 0xBFC00000 # Processor wired boot_address
	47	MAPPING_SIGNATURE = 0xDACE2014 # Magic number indicating a valid C binary struture
	48
	49	##########################################################################################
	50	# These global lists must be consistent with enums in mapping_info.h or irq_handler.
	51	##########################################################################################
[319]	52	PERIPHTYPES = [
	53	'CMA',
	54	'DMA',
	55	'FBF',
	56	'ICU',
	57	'IOB',
	58	'IOC',
	59	'MMC',
	60	'MWR',
	61	'NIC',
	62	'ROM',
	63	'SIM',
	64	'TIM',
	65	'TTY',
	66	'XCU',
	67	'PIC',
	68	]
	69
	70	PERIPHSUBTYPES = [
	71	'BDV',
	72	'HBA',
	73	'SPI',
	74	'NONE',
	75	]
	76
	77	IRQTYPES = [
	78	'HWI',
	79	'WTI',
	80	'PTI',
	81	]
	82
	83	ISRTYPES = [
	84	'ISR_DEFAULT',
	85	'ISR_TICK',
	86	'ISR_TTY_RX',
	87	'ISR_TTY_TX',
	88	'ISR_BDV',
	89	'ISR_TIMER',
	90	'ISR_WAKUP',
	91	'ISR_NIC_RX',
	92	'ISR_NIC_TX',
	93	'ISR_CMA',
	94	'ISR_MMC',
	95	'ISR_DMA',
	96	'ISR_SPI',
	97	]
	98
	99	VOBJTYPES = [
	100	'ELF',
	101	'BLOB',
	102	'PTAB',
	103	'PERI',
	104	'MWMR',
	105	'LOCK',
	106	'BUFFER',
	107	'BARRIER',
	108	'CONST',
	109	'MEMSPACE',
	110	'SCHED',
	111	]
	112
	113	VSEGMODES = [
	114	'____',
	115	'___U',
	116	'__W_',
	117	'__WU',
	118	'_X__',
	119	'_X_U',
	120	'_XW_',
	121	'_XWU',
	122	'C___',
	123	'C__U',
	124	'C_W_',
	125	'C_WU',
	126	'CX__',
	127	'CX_U',
	128	'CXW_',
	129	'CXWU',
	130	]
	131
	132	PSEGTYPES = [
	133	'RAM',
	134	'ROM', # deprecated => use PERI
	135	'PERI',
	136	]
	137
	138	CP_PORT_DIRS = [
	139	'TO_COPROC',
	140	'FROM_COPROC',
	141	]
	142
	143	##########################################################################################
[305]	144	class Mapping( object ):
[319]	145	##########################################################################################
[305]	146	def __init__( self,
[411]	147	name, # mapping name
	148	x_size, # number of clusters in a row
	149	y_size, # number of clusters in a column
[421]	150	nprocs, # max number of processors per cluster
[411]	151	x_width = X_WIDTH, # number of bits encoding x coordinate
	152	y_width = Y_WIDTH, # number of bits encoding y coordinate
	153	p_width = P_WIDTH, # number of bits encoding local proc_id
	154	paddr_width = PADDR_WIDTH, # number of bits for physical address
	155	coherence = 1, # hardware cache coherence when non-zero
	156	irq_per_proc = 1, # number or IRQs from XCU to processor
	157	use_ramdisk = False, # use ramdisk when true
	158	x_io = 0, # cluster_io x coordinate
	159	y_io = 0, # cluster_io y coordinate
	160	peri_increment = PERI_INCREMENT, # address increment for globals
	161	reset_address = RESET_ADDRESS, # Processor wired boot_address
	162	ram_base = 0, # RAM physical base in cluster[0,0]
	163	ram_size = 0 ): # RAM size in each cluster (bytes)
[305]	164
[411]	165	assert ( x_size <= (1<<X_WIDTH) )
	166	assert ( y_size <= (1<<Y_WIDTH) )
	167	assert ( nprocs <= (1<<P_WIDTH) )
[406]	168
[411]	169	self.signature = MAPPING_SIGNATURE
[319]	170	self.name = name
[406]	171	self.paddr_width = paddr_width
[319]	172	self.coherence = coherence
	173	self.x_size = x_size
	174	self.y_size = y_size
[411]	175	self.nprocs = nprocs
[319]	176	self.x_width = x_width
	177	self.y_width = y_width
[406]	178	self.p_width = p_width
[319]	179	self.irq_per_proc = irq_per_proc
	180	self.use_ramdisk = use_ramdisk
	181	self.x_io = x_io
	182	self.y_io = y_io
[328]	183	self.peri_increment = peri_increment
[319]	184	self.reset_address = reset_address
[356]	185	self.ram_base = ram_base
	186	self.ram_size = ram_size
[305]	187
[319]	188	self.total_vspaces = 0
	189	self.total_globals = 0
	190	self.total_psegs = 0
	191	self.total_vsegs = 0
	192	self.total_vobjs = 0
	193	self.total_tasks = 0
	194	self.total_procs = 0
	195	self.total_irqs = 0
	196	self.total_coprocs = 0
	197	self.total_cpports = 0
	198	self.total_periphs = 0
[305]	199
[319]	200	self.clusters = []
	201	self.globs = []
	202	self.vspaces = []
[305]	203
[319]	204	for x in xrange( self.x_size ):
	205	for y in xrange( self.y_size ):
	206	cluster = Cluster( x , y )
[406]	207	cluster.index = (x * self.y_size) + y
[319]	208	self.clusters.append( cluster )
[305]	209
	210	return
	211
[319]	212	########################## add a ram pseg in a cluster
[406]	213	def addRam( self,
[319]	214	name, # pseg name
	215	base, # pseg base address
	216	size ): # pseg length (bytes)
[406]	217
[411]	218	# computes coordinates from the base address extension
[356]	219	paddr_lsb_width = self.paddr_width - self.x_width - self.y_width
	220	cluster_xy = base >> paddr_lsb_width
[305]	221	x = cluster_xy >> (self.y_width);
[406]	222	y = cluster_xy & ((1 << self.y_width) - 1)
[305]	223
[411]	224	assert (base & VPN_ANTI_MASK) == 0
[319]	225
	226	assert (x < self.x_size) and (y < self.y_size)
[406]	227
[356]	228	assert ( (base & ((1<<paddr_lsb_width)-1)) == self.ram_base )
	229
	230	assert ( size == self.ram_size )
	231
[319]	232	cluster_id = (x * self.y_size) + y
	233
	234	# add one pseg in the mapping
	235	pseg = Pseg( name, base, size, x, y, 'RAM' )
	236	self.clusters[cluster_id].psegs.append( pseg )
	237	pseg.index = self.total_psegs
	238	self.total_psegs += 1
	239
	240	return pseg
	241
	242	############################## add a peripheral and the associated pseg in a cluster
[406]	243	def addPeriph( self,
[319]	244	name, # associated pseg name
	245	base, # associated pseg base address
	246	size, # associated pseg length (bytes)
[406]	247	ptype, # peripheral type
[319]	248	subtype = 'NONE', # peripheral subtype
	249	channels = 1, # number of channels
	250	arg = 0 ): # optional argument (semantic depends on ptype)
	251
	252	# check cluster coordinates (obtained from the base address)
	253	cluster_xy = base >> (self.paddr_width - self.x_width - self.y_width)
[305]	254	x = cluster_xy >> (self.y_width);
[406]	255	y = cluster_xy & ((1 << self.y_width) - 1)
[305]	256
[319]	257	assert (x < self.x_size) and (y < self.y_size)
	258
[411]	259	assert (base & VPN_ANTI_MASK) == 0
[319]	260
	261	assert ptype in PERIPHTYPES
	262
	263	assert subtype in PERIPHSUBTYPES
	264
	265	cluster_id = (x * self.y_size) + y
	266
	267	# add one pseg into mapping
	268	pseg = Pseg( name, base, size, x, y, 'PERI' )
	269	self.clusters[cluster_id].psegs.append( pseg )
	270	pseg.index = self.total_psegs
	271	self.total_psegs += 1
	272
	273	# add one periph into mapping
[406]	274	periph = Periph( pseg, ptype, subtype, channels, arg )
[319]	275	self.clusters[cluster_id].periphs.append( periph )
	276	periph.index = self.total_periphs
	277	self.total_periphs += 1
	278
	279	return periph
	280
	281	################################ add an IRQ in a peripheral
	282	def addIrq( self,
	283	periph, # peripheral containing IRQ (PIC or XCU)
	284	index, # peripheral input port index
	285	isrtype, # ISR type
	286	channel = 0 ): # channel for multi-channels ISR
	287
	288	assert isrtype in ISRTYPES
	289
	290	assert index < 32
	291
[406]	292	# add one irq into mapping
[319]	293	irq = Irq( 'HWI', index , isrtype, channel )
	294	periph.irqs.append( irq )
	295	irq.index = self.total_irqs
	296	self.total_irqs += 1
	297
	298	return irq
	299
	300	########################## add a processor in a cluster
[406]	301	def addProc( self,
[319]	302	x, # cluster x coordinate
	303	y, # cluster y coordinate
	304	p ): # processor local index
	305
	306	assert (x < self.x_size) and (y < self.y_size)
	307
	308	cluster_id = (x * self.y_size) + y
	309
[406]	310	# add one proc into mapping
[319]	311	proc = Processor( x, y, p )
	312	self.clusters[cluster_id].procs.append( proc )
	313	proc.index = self.total_procs
[305]	314	self.total_procs += 1
	315
[319]	316	return proc
	317
	318	############################## add a coprocessor in a cluster
[406]	319	def addCoproc( self,
[319]	320	name, # associated pseg name
	321	base, # associated pseg base address
	322	size ): # associated pseg length
[406]	323
[319]	324	# check cluster coordinates (obtained from the base address)
	325	cluster_xy = base >> (self.paddr_width - self.x_width - self.y_width)
	326	x = cluster_xy >> (self.y_width);
[406]	327	y = cluster_xy & ((1 << self.y_width) - 1)
[319]	328
	329	assert (x < self.x_size) and (y < self.y_size)
	330
	331	cluster_id = (x * self.y_size) + y
	332
	333	# add one pseg into mapping
	334	pseg = Pseg( name, base, size, x, y, 'PERI' )
	335	self.clusters[cluster_id].psegs.append( pseg )
	336	pseg.index = self.total_psegs
	337	self.total_psegs += 1
	338
	339	# add one coproc into mapping
[406]	340	periph = Coproc( pseg )
[319]	341	self.clusters[cluster_id].coprocs.append( coproc )
	342	periph.index = self.total_coprocs
	343	self.total_coprocs += 1
	344
	345	return coproc
	346
[406]	347	################################## add a port in a coprocessor
	348	def addPort( self,
[319]	349	coproc, # coprocessor containing the port
	350	direction, # direction (TO_COPROC / FROM_COPROC)
	351	vspacename, # name of vspace using the coproc
	352	mwmrname ): # name of the vobj defining the MWMR channel
	353
	354	assert direction in CP_PORT_DIRS
	355
	356	# add one cpport into mapping
	357	port = Cpport( direction, vspacename, mwmrname )
	358	coproc.ports.append( port )
	359	port.index = self.total_cpports
	360	self.total_cpports += 1
	361
	362	return port
	363
[411]	364	############################ add one global vseg into mapping
	365	def addGlobal( self,
	366	name, # vseg name
	367	vbase, # virtual base address
	368	size, # vobj length (bytes)
	369	mode, # CXWU flags
	370	vtype, # vobj type
	371	x, # destination x coordinate
	372	y, # destination y coordinate
	373	pseg, # destination pseg name
	374	identity = False, # identity mapping required if true
	375	binpath = '', # pathname for binary code if required
	376	align = 0, # alignment required
	377	local = False, # only mapped in local PTAB if true
	378	big = False ): # to be mapped in a big physical page
[319]	379
	380	assert mode in VSEGMODES
	381
	382	assert vtype in VOBJTYPES
	383
	384	assert (x < self.x_size) and (y < self.y_size)
	385
[411]	386	# two global vsegs must not overlap if they have different names
	387	for prev in self.globs:
	388	prev_vbase = prev.vbase
	389	prev_size = prev.vobjs[0].length
	390
	391	if ( ((prev_vbase + prev_size) > vbase ) and
	392	((vbase + size) > prev_vbase) and
	393	(prev.name != name) ):
	394	print '[genmap error] in addGlobal() : %s overlap %s' % (name, prev.name)
	395	print ' %s : base = %x / size = %x' %( name, vbase, size )
	396	print ' %s : base = %x / size = %x' %( prev.name, prev_vbase, prev_size )
	397	sys.exit(1)
	398
[328]	399	# add one vseg into mapping
[406]	400	vseg = Vseg( name, vbase, mode, x, y, pseg,
[411]	401	identity = identity, local = local, big = big )
[348]	402
[328]	403	self.globs.append( vseg )
	404	self.total_globals += 1
[406]	405	vseg.index = self.total_vsegs
[328]	406	self.total_vsegs += 1
[406]	407
[328]	408	# add one vobj into mapping
	409	vobj = Vobj( name, size, vtype, binpath, 0, 0 )
	410	vseg.vobjs.append( vobj )
	411	vobj.index = self.total_vobjs
	412	self.total_vobjs += 1
[319]	413
[305]	414	return
	415
[319]	416	################################ add a vspace into mapping
[406]	417	def addVspace( self,
[319]	418	name, # vspace name
	419	startname ): # name of vobj containing start_vector
	420
	421	# add one vspace into mapping
	422	vspace = Vspace( name, startname )
[305]	423	self.vspaces.append( vspace )
[319]	424	vspace.index = self.total_vspaces
	425	self.total_vspaces += 1
	426
	427	return vspace
[406]	428
[319]	429	################################# add a private vseg and a vobj in a vspace
	430	def addVseg( self,
[406]	431	vspace, # vspace containing the vseg
[319]	432	name, # vseg name
	433	vbase, # virtual base address
	434	size, # vobj length (bytes)
	435	mode, # CXWU flags
	436	vtype, # vobj type
	437	x, # destination x coordinate
	438	y, # destination y coordinate
	439	pseg, # destination pseg name
[348]	440	binpath = '', # pathname for binary code
	441	align = 0, # alignment required
	442	init = 0, # initial value
[411]	443	local = False, # only mapped in local PTAB if true
	444	big = False ): # to be mapped in a big physical page
[319]	445
	446	assert mode in VSEGMODES
	447
	448	assert vtype in VOBJTYPES
	449
	450	assert (x < self.x_size) and (y < self.y_size)
	451
	452	# add one vseg into mapping
[411]	453	vseg = Vseg( name, vbase, mode, x, y, pseg, local = local, big = big )
[319]	454	vspace.vsegs.append( vseg )
	455	vseg.index = self.total_vsegs
	456	self.total_vsegs += 1
	457
	458	# add one vobj into mapping
	459	vobj = Vobj( name, size, vtype, binpath, align, init )
	460	vseg.vobjs.append( vobj )
	461	vobj.index = self.total_vobjs
	462	self.total_vobjs += 1
	463
	464	return vseg
	465
	466	################################ add a vobj in a private vseg
[406]	467	def addVobj( self,
[319]	468	vseg, # vseg containing vobj
	469	name, # vobj name
	470	size, # vobj length (bytes)
	471	vtype, # vobj type
	472	binpath = '', # pathname to binary
	473	align = 0, # alignment constraint
	474	init = 0 ): # initial value
	475
	476	assert vtype in VOBJTYPES
	477
	478	# add one vobj into mapping
	479	vobj = Vobj( name, size, vtype, binpath, align, init )
	480	vseg.vobjs.append( vobj )
	481	vobj.index = self.total_vobjs
	482	self.total_vobjs += 1
	483
	484	return vobj
	485
[406]	486	################################ add a task in a vspace
	487	def addTask( self,
[319]	488	vspace, # vspace containing task
	489	name, # task name
	490	trdid, # task index in vspace
	491	x, # destination x coordinate
	492	y, # destination y coordinate
	493	lpid, # destination processor local index
	494	stackname, # name of vobj containing stack
	495	heapname, # name of vobj containing heap
	496	startid, # index in start_vector
	497	usetty = False, # request a private TTY channel
	498	usenic = False, # request a private NIC channel
	499	usecma = False, # request a private CMA channel
	500	usehba = False, # request a private HBA channel
	501	usetim = False ): # request a private TIM channel
[406]	502
[319]	503	assert (x < self.x_size) and (y < self.y_size)
[411]	504	assert lpid < self.nprocs
[319]	505
[406]	506	# add one task into mapping
[319]	507	task = Task( name, trdid, x, y, lpid, stackname, heapname, startid,
	508	usetty, usenic, usecma, usehba, usetim )
	509	vspace.tasks.append( task )
	510	task.index = self.total_tasks
	511	self.total_tasks += 1
	512
	513	return task
	514
	515	#################################
	516	def str2bytes( self, nbytes, s ): # string => nbytes_packed byte array
	517
	518	byte_stream = bytearray()
	519	length = len( s )
	520	if length < (nbytes - 1):
	521	for b in s:
	522	byte_stream.append( b )
	523	for x in xrange(nbytes-length):
	524	byte_stream.append( '\0' )
	525	else:
[348]	526	print '[genmap error] in str2bytes() : string %s too long' % s
[319]	527	sys.exit(1)
	528
	529	return byte_stream
	530
	531	###################################
[406]	532	def int2bytes( self, nbytes, val ): # integer => nbytes litle endian byte array
[319]	533
	534	byte_stream = bytearray()
	535	for n in xrange( nbytes ):
	536	byte_stream.append( (val >> (n<<3)) & 0xFF )
	537
	538	return byte_stream
	539
[411]	540	####################################################################################
	541	def xml( self ): # compute string for map.xml file generation
[319]	542
[305]	543	s = '<?xml version="1.0"?>\n\n'
[319]	544	s += '<mapping_info signature = "0x%x"\n' % (self.signature)
[305]	545	s += ' name = "%s"\n' % (self.name)
	546	s += ' x_size = "%d"\n' % (self.x_size)
	547	s += ' y_size = "%d"\n' % (self.y_size)
	548	s += ' x_width = "%d"\n' % (self.x_width)
	549	s += ' y_width = "%d"\n' % (self.y_width)
	550	s += ' irq_per_proc = "%d"\n' % (self.irq_per_proc)
[319]	551	s += ' use_ramdisk = "%d"\n' % (self.use_ramdisk)
[305]	552	s += ' x_io = "%d"\n' % (self.x_io)
	553	s += ' y_io = "%d" >\n' % (self.y_io)
[319]	554	s += '\n'
	555
[305]	556	s += ' <clusterset>\n'
	557	for x in xrange ( self.x_size ):
	558	for y in xrange ( self.y_size ):
[406]	559	cluster_id = (x * self.y_size) + y
[319]	560	s += self.clusters[cluster_id].xml()
[305]	561	s += ' </clusterset>\n'
[319]	562	s += '\n'
	563
[305]	564	s += ' <globalset>\n'
[319]	565	for vseg in self.globs: s += vseg.xml()
[305]	566	s += ' </globalset>\n'
[319]	567	s += '\n'
	568
[305]	569	s += ' <vspaceset>\n'
[319]	570	for vspace in self.vspaces: s += vspace.xml()
[305]	571	s += ' </vspaceset>\n'
[319]	572
[305]	573	s += '</mapping_info>\n'
	574	return s
[319]	575
[411]	576	#####################################################################################
	577	def cbin( self, verbose ): # C binary structure for map.bin file generation
[319]	578
	579	byte_stream = bytearray()
	580
	581	# header
	582	byte_stream += self.int2bytes(4, self.signature)
[406]	583	byte_stream += self.int2bytes(4, self.x_size)
	584	byte_stream += self.int2bytes(4, self.y_size)
	585	byte_stream += self.int2bytes(4, self.x_width)
	586	byte_stream += self.int2bytes(4, self.y_width)
	587	byte_stream += self.int2bytes(4, self.x_io)
	588	byte_stream += self.int2bytes(4, self.y_io)
	589	byte_stream += self.int2bytes(4, self.irq_per_proc)
	590	byte_stream += self.int2bytes(4, self.use_ramdisk)
	591	byte_stream += self.int2bytes(4, self.total_globals)
	592	byte_stream += self.int2bytes(4, self.total_vspaces)
	593	byte_stream += self.int2bytes(4, self.total_psegs)
	594	byte_stream += self.int2bytes(4, self.total_vsegs)
	595	byte_stream += self.int2bytes(4, self.total_vobjs)
	596	byte_stream += self.int2bytes(4, self.total_tasks)
	597	byte_stream += self.int2bytes(4, self.total_procs)
	598	byte_stream += self.int2bytes(4, self.total_irqs)
	599	byte_stream += self.int2bytes(4, self.total_coprocs)
	600	byte_stream += self.int2bytes(4, self.total_cpports)
	601	byte_stream += self.int2bytes(4, self.total_periphs)
[319]	602	byte_stream += self.str2bytes(32, self.name)
	603
	604	if ( verbose ):
[406]	605	print '\n'
[319]	606	print 'name = %s' % self.name
	607	print 'signature = %x' % self.signature
	608	print 'x_size = %d' % self.x_size
	609	print 'y_size = %d' % self.y_size
	610	print 'x_width = %d' % self.x_width
	611	print 'y_width = %d' % self.y_width
[406]	612	print 'x_io = %d' % self.x_io
	613	print 'y_io = %d' % self.y_io
[319]	614	print 'irq_per_proc = %d' % self.irq_per_proc
	615	print 'use_ramdisk = %d' % self.use_ramdisk
	616	print 'total_globals = %d' % self.total_globals
[406]	617	print 'total_psegs = %d' % self.total_psegs
	618	print 'total_vsegs = %d' % self.total_vsegs
	619	print 'total_vobjs = %d' % self.total_vobjs
	620	print 'total_tasks = %d' % self.total_tasks
	621	print 'total_procs = %d' % self.total_procs
	622	print 'total_irqs = %d' % self.total_irqs
[319]	623	print 'total_coprocs = %d' % self.total_coprocs
	624	print 'total_cpports = %d' % self.total_cpports
	625	print 'total_periphs = %d' % self.total_periphs
[406]	626	print '\n'
[319]	627
	628	# clusters array
	629	index = 0
	630	for cluster in self.clusters:
	631	byte_stream += cluster.cbin( self, verbose, index )
	632	index += 1
	633
	634	if ( verbose ): print '\n'
	635
	636	# psegs array
	637	index = 0
	638	for cluster in self.clusters:
[406]	639	for pseg in cluster.psegs:
[319]	640	byte_stream += pseg.cbin( self, verbose, index, cluster )
	641	index += 1
	642
	643	if ( verbose ): print '\n'
	644
	645	# vspaces array
	646	index = 0
[406]	647	for vspace in self.vspaces:
	648	byte_stream += vspace.cbin( self, verbose, index )
[319]	649	index += 1
	650
	651	if ( verbose ): print '\n'
	652
	653	# vsegs array
	654	index = 0
	655	for vseg in self.globs:
	656	byte_stream += vseg.cbin( self, verbose, index )
	657	index += 1
	658	for vspace in self.vspaces:
[406]	659	for vseg in vspace.vsegs:
[319]	660	byte_stream += vseg.cbin( self, verbose, index )
	661	index += 1
	662
	663	if ( verbose ): print '\n'
	664
	665	# vobjs array
	666	index = 0
	667	for vseg in self.globs:
	668	for vobj in vseg.vobjs:
	669	byte_stream += vobj.cbin( self, verbose, index )
	670	index += 1
	671	for vspace in self.vspaces:
[406]	672	for vseg in vspace.vsegs:
[319]	673	for vobj in vseg.vobjs:
[406]	674	byte_stream += vobj.cbin( self, verbose, index )
[319]	675	index += 1
	676
	677	if ( verbose ): print '\n'
	678
	679	# tasks array
	680	index = 0
	681	for vspace in self.vspaces:
[406]	682	for task in vspace.tasks:
[319]	683	byte_stream += task.cbin( self, verbose, index, vspace )
	684	index += 1
	685
	686	if ( verbose ): print '\n'
	687
	688	# procs array
	689	index = 0
	690	for cluster in self.clusters:
[406]	691	for proc in cluster.procs:
[319]	692	byte_stream += proc.cbin( self, verbose, index )
	693	index += 1
[406]	694
[319]	695	if ( verbose ): print '\n'
	696
	697	# irqs array
[406]	698	index = 0
[319]	699	for cluster in self.clusters:
	700	for periph in cluster.periphs:
	701	for irq in periph.irqs:
	702	byte_stream += irq.cbin( self, verbose, index )
	703	index += 1
	704
	705	if ( verbose ): print '\n'
	706
	707	# coprocs array
	708	index = 0
	709	for cluster in self.clusters:
[406]	710	for coproc in cluster.coprocs:
	711	byte_stream += coproc.cbin( self, verbose, index )
[319]	712	index += 1
	713
	714	if ( verbose ): print '\n'
	715
	716	# cpports array
	717	index = 0
	718	for cluster in self.clusters:
[406]	719	for coproc in cluster.coprocs:
[319]	720	for port in coproc.ports:
	721	byte_stream += port.cbin( self, verbose, index )
	722	index += 1
	723
	724	if ( verbose ): print '\n'
	725
	726	# periphs array
	727	index = 0
	728	for cluster in self.clusters:
[406]	729	for periph in cluster.periphs:
[319]	730	byte_stream += periph.cbin( self, verbose, index )
	731	index += 1
	732
	733	return byte_stream
	734	# end of cbin()
[406]	735
[411]	736	##################################################################################
	737	def giet_vsegs( self ): # compute string for giet_vsegs.ld file generation
[319]	738	# required by giet_vm compilation
	739
[406]	740	# search the vsegs required for the giet_vsegs.ld
[319]	741	boot_code_found = False
	742	boot_data_found = False
	743	kernel_uncdata_found = False
	744	kernel_data_found = False
	745	kernel_code_found = False
	746	kernel_init_found = False
	747	for vseg in self.globs:
[348]	748
[319]	749	if ( vseg.name == 'seg_boot_code' ):
[406]	750	boot_code_vbase = vseg.vbase
[319]	751	boot_code_size = vseg.vobjs[0].length
	752	boot_code_found = True
	753
[406]	754	if ( vseg.name == 'seg_boot_data' ):
	755	boot_data_vbase = vseg.vbase
[319]	756	boot_data_size = vseg.vobjs[0].length
	757	boot_data_found = True
	758
	759	if ( vseg.name == 'seg_kernel_uncdata' ):
[406]	760	kernel_uncdata_vbase = vseg.vbase
[319]	761	kernel_uncdata_size = vseg.vobjs[0].length
	762	kernel_uncdata_found = True
	763
	764	if ( vseg.name == 'seg_kernel_data' ):
[406]	765	kernel_data_vbase = vseg.vbase
[319]	766	kernel_data_size = vseg.vobjs[0].length
	767	kernel_data_found = True
	768
	769	if ( vseg.name == 'seg_kernel_code' ):
[406]	770	kernel_code_vbase = vseg.vbase
[319]	771	kernel_code_size = vseg.vobjs[0].length
	772	kernel_code_found = True
	773
	774	if ( vseg.name == 'seg_kernel_init' ):
[406]	775	kernel_init_vbase = vseg.vbase
[319]	776	kernel_init_size = vseg.vobjs[0].length
	777	kernel_init_found = True
	778
	779	# check if all required vsegs have been found
[406]	780	if ( boot_code_found == False ):
[348]	781	print '[genmap error] in giet_vsegs() : seg_boot_code vseg missing'
[319]	782	sys.exit()
	783
[406]	784	if ( boot_data_found == False ):
[348]	785	print '[genmap error] in giet_vsegs() : seg_boot_data vseg missing'
[319]	786	sys.exit()
	787
[406]	788	if ( kernel_data_found == False ):
[348]	789	print '[genmap error] in giet_vsegs() : seg_kernel_data vseg missing'
[319]	790	sys.exit()
	791
	792	if ( kernel_uncdata_found == False ):
[348]	793	print '[genmap error] in giet_vsegs() : seg_kernel_uncdata vseg missing'
[319]	794	sys.exit()
	795
	796	if ( kernel_code_found == False ):
[348]	797	print '[genmap error] in giet_vsegs() : seg_kernel_code vseg missing'
[319]	798	sys.exit()
	799
	800	if ( kernel_init_found == False ):
[348]	801	print '[genmap error] in giet_vsegs() : seg_kernel_init vseg missing'
[319]	802	sys.exit()
	803
	804	# build string
[406]	805	s = '/* Generated by genmap for %s */\n' % self.name
[319]	806	s += '\n'
	807
[406]	808	s += 'boot_code_vbase = 0x%x;\n' % boot_code_vbase
	809	s += 'boot_code_size = 0x%x;\n' % boot_code_size
[319]	810	s += '\n'
[406]	811	s += 'boot_data_vbase = 0x%x;\n' % boot_data_vbase
	812	s += 'boot_data_size = 0x%x;\n' % boot_data_size
[319]	813	s += '\n'
[406]	814	s += 'kernel_code_vbase = 0x%x;\n' % kernel_code_vbase
	815	s += 'kernel_code_size = 0x%x;\n' % kernel_code_size
[319]	816	s += '\n'
[406]	817	s += 'kernel_data_vbase = 0x%x;\n' % kernel_data_vbase
	818	s += 'kernel_data_size = 0x%x;\n' % kernel_data_size
[319]	819	s += '\n'
[406]	820	s += 'kernel_uncdata_vbase = 0x%x;\n' % kernel_uncdata_vbase
	821	s += 'kernel_uncdata_size = 0x%x;\n' % kernel_uncdata_size
[319]	822	s += '\n'
[406]	823	s += 'kernel_init_vbase = 0x%x;\n' % kernel_init_vbase
	824	s += 'kernel_init_size = 0x%x;\n' % kernel_init_size
[319]	825	s += '\n'
	826
	827	return s
[406]	828
[411]	829	###################################################################################
	830	def hard_config( self ): # compute string for hard_config.h file generation,
	831	# required by
[319]	832	# - top.cpp compilation
	833	# - giet_vm compilation
	834	# - tsar_preloader compilation
	835
	836	nb_total_procs = 0
	837
	838	# for each peripheral type, define default values
[406]	839	# for pbase address, size, number of components, and channels
[319]	840	nb_cma = 0
	841	cma_channels = 0
	842	seg_cma_base = 0xFFFFFFFF
	843	seg_cma_size = 0
	844
	845	nb_dma = 0
	846	dma_channels = 0
	847	seg_dma_base = 0xFFFFFFFF
	848	seg_dma_size = 0
	849
	850	nb_fbf = 0
	851	fbf_channels = 0
[328]	852	fbf_arg = 0
[319]	853	seg_fbf_base = 0xFFFFFFFF
	854	seg_fbf_size = 0
	855
	856	nb_icu = 0
	857	icu_channels = 0
	858	seg_icu_base = 0xFFFFFFFF
	859	seg_icu_size = 0
	860
	861	nb_iob = 0
	862	iob_channels = 0
	863	seg_iob_base = 0xFFFFFFFF
	864	seg_iob_size = 0
	865
	866	nb_ioc = 0
	867	ioc_channels = 0
	868	seg_ioc_base = 0xFFFFFFFF
	869	seg_ioc_size = 0
	870
	871	nb_mmc = 0
	872	mmc_channels = 0
	873	seg_mmc_base = 0xFFFFFFFF
	874	seg_mmc_size = 0
	875
	876	nb_mwr = 0
	877	mwr_channels = 0
	878	seg_mwr_base = 0xFFFFFFFF
	879	seg_mwr_size = 0
	880
	881	nb_nic = 0
	882	nic_channels = 0
	883	seg_nic_base = 0xFFFFFFFF
	884	seg_nic_size = 0
	885
	886	nb_pic = 0
	887	pic_channels = 0
	888	seg_pic_base = 0xFFFFFFFF
	889	seg_pic_size = 0
	890
	891	nb_rom = 0
	892	rom_channels = 0
	893	seg_rom_base = 0xFFFFFFFF
	894	seg_rom_size = 0
	895
	896	nb_sim = 0
	897	sim_channels = 0
	898	seg_sim_base = 0xFFFFFFFF
	899	seg_sim_size = 0
	900
	901	nb_tim = 0
	902	tim_channels = 0
	903	seg_tim_base = 0xFFFFFFFF
	904	seg_tim_size = 0
	905
	906	nb_tty = 0
	907	tty_channels = 0
	908	seg_tty_base = 0xFFFFFFFF
	909	seg_tty_size = 0
	910
	911	nb_xcu = 0
	912	xcu_channels = 0
[328]	913	xcu_arg = 0
[319]	914	seg_xcu_base = 0xFFFFFFFF
	915	seg_xcu_size = 0
	916
	917	use_bdv = False
	918	use_spi = False
	919	use_hba = False
	920
	921	# get peripherals attributes
	922	for cluster in self.clusters:
	923	for periph in cluster.periphs:
[406]	924	if ( periph.ptype == 'CMA' ):
[319]	925	seg_cma_base = periph.pseg.base & 0xFFFFFFFF
	926	seg_cma_size = periph.pseg.size
	927	cma_channels = periph.channels
	928	nb_cma +=1
	929
[406]	930	elif ( periph.ptype == 'DMA' ):
	931	seg_dma_base = periph.pseg.base & 0xFFFFFFFF
[319]	932	seg_dma_size = periph.pseg.size
	933	dma_channels = periph.channels
	934	nb_dma +=1
	935
[406]	936	elif ( periph.ptype == 'FBF' ):
[319]	937	seg_fbf_base = periph.pseg.base & 0xFFFFFFFF
	938	seg_fbf_size = periph.pseg.size
	939	fbf_channels = periph.channels
[328]	940	fbf_arg = periph.arg
[319]	941	nb_fbf +=1
	942
[406]	943	elif ( periph.ptype == 'ICU' ):
[319]	944	seg_icu_base = periph.pseg.base & 0xFFFFFFFF
	945	seg_icu_size = periph.pseg.size
	946	icu_channels = periph.channels
	947	nb_icu +=1
	948
	949	elif ( periph.ptype == 'IOB' ):
	950	seg_iob_base = periph.pseg.base & 0xFFFFFFFF
	951	seg_iob_size = periph.pseg.size
	952	iob_channels = periph.channels
	953	nb_iob +=1
	954
[406]	955	elif ( periph.ptype == 'IOC' ):
[319]	956	seg_ioc_base = periph.pseg.base & 0xFFFFFFFF
	957	seg_ioc_size = periph.pseg.size
	958	ioc_channels = periph.channels
	959	nb_ioc += 1
[404]	960
	961	if self.use_ramdisk: continue
	962
[319]	963	if ( periph.subtype == 'BDV' ): use_bdv = True
	964	elif ( periph.subtype == 'HBA' ): use_hba = True
	965	elif ( periph.subtype == 'SPI' ): use_spi = True
	966
	967	elif ( periph.ptype == 'MMC' ):
	968	seg_mmc_base = periph.pseg.base & 0xFFFFFFFF
	969	seg_mmc_size = periph.pseg.size
	970	mmc_channels = periph.channels
	971	nb_mmc +=1
	972
	973	elif ( periph.ptype == 'MWR' ):
	974	seg_mwr_base = periph.pseg.base & 0xFFFFFFFF
	975	seg_wmr_size = periph.pseg.size
	976	mwr_channels = periph.channels
	977	nb_mwr +=1
	978
	979	elif ( periph.ptype == 'ROM' ):
	980	seg_rom_base = periph.pseg.base & 0xFFFFFFFF
	981	seg_rom_size = periph.pseg.size
	982	rom_channels = periph.channels
	983	nb_rom +=1
	984
	985	elif ( periph.ptype == 'SIM' ):
	986	seg_sim_base = periph.pseg.base & 0xFFFFFFFF
	987	seg_sim_size = periph.pseg.size
	988	sim_channels = periph.channels
	989	nb_sim +=1
	990
[406]	991	elif ( periph.ptype == 'NIC' ):
[319]	992	seg_nic_base = periph.pseg.base & 0xFFFFFFFF
	993	seg_nic_size = periph.pseg.size
	994	nic_channels = periph.channels
	995	nb_nic +=1
	996
[406]	997	elif ( periph.ptype == 'PIC' ):
[319]	998	seg_pic_base = periph.pseg.base & 0xFFFFFFFF
	999	seg_pic_size = periph.pseg.size
	1000	pic_channels = periph.channels
	1001	nb_pic +=1
[406]	1002
	1003	elif ( periph.ptype == 'TIM' ):
[319]	1004	seg_tim_base = periph.pseg.base & 0xFFFFFFFF
	1005	seg_tim_size = periph.pseg.size
	1006	tim_channels = periph.channels
	1007	nb_tim +=1
[406]	1008
[319]	1009	elif ( periph.ptype == 'TTY' ):
	1010	seg_tty_base = periph.pseg.base & 0xFFFFFFFF
	1011	seg_tty_size = periph.pseg.size
	1012	tty_channels = periph.channels
	1013	nb_tty +=1
[406]	1014
	1015	elif ( periph.ptype == 'XCU' ):
[319]	1016	seg_xcu_base = periph.pseg.base & 0xFFFFFFFF
	1017	seg_xcu_size = periph.pseg.size
	1018	xcu_channels = periph.channels
[328]	1019	xcu_arg = periph.arg
[319]	1020	nb_xcu +=1
[406]	1021
[319]	1022	# don't mix ICU and XCU
[406]	1023	assert ( nb_icu*nb_xcu == 0 )
[319]	1024
	1025	# no more than two access to external peripherals
[406]	1026	assert ( nb_fbf <= 2 )
	1027	assert ( nb_cma <= 2 )
	1028	assert ( nb_ioc <= 2 )
	1029	assert ( nb_nic <= 2 )
	1030	assert ( nb_tim <= 2 )
	1031	assert ( nb_tty <= 2 )
[319]	1032	assert ( nb_pic <= 2 )
	1033
	1034	# one and only one type of IOC controller
[403]	1035	nb_iocs = 0
	1036	if use_hba : nb_iocs += 1
	1037	if use_bdv : nb_iocs += 1
	1038	if use_spi : nb_iocs += 1
	1039	if self.use_ramdisk: nb_iocs += 1
	1040	assert ( nb_iocs == 1 )
[404]	1041
[319]	1042	# Compute total number of processors
	1043	for cluster in self.clusters:
	1044	nb_total_procs += len( cluster.procs )
	1045
	1046	# Compute physical addresses for BOOT vsegs
	1047	boot_mapping_found = False
	1048	boot_code_found = False
	1049	boot_data_found = False
	1050	boot_stack_found = False
	1051
	1052	for vseg in self.globs:
	1053	if ( vseg.name == 'seg_boot_mapping' ):
[406]	1054	boot_mapping_base = vseg.vbase
[319]	1055	boot_mapping_size = vseg.vobjs[0].length
[348]	1056	boot_mapping_identity = vseg.identity
[319]	1057	boot_mapping_found = True
	1058
	1059	if ( vseg.name == 'seg_boot_code' ):
[406]	1060	boot_code_base = vseg.vbase
[319]	1061	boot_code_size = vseg.vobjs[0].length
[348]	1062	boot_code_identity = vseg.identity
[319]	1063	boot_code_found = True
	1064
[406]	1065	if ( vseg.name == 'seg_boot_data' ):
	1066	boot_data_base = vseg.vbase
[319]	1067	boot_data_size = vseg.vobjs[0].length
[348]	1068	boot_data_identity = vseg.identity
[319]	1069	boot_data_found = True
	1070
	1071	if ( vseg.name == 'seg_boot_stack' ):
[406]	1072	boot_stack_base = vseg.vbase
[319]	1073	boot_stack_size = vseg.vobjs[0].length
[348]	1074	boot_stack_identity = vseg.identity
[319]	1075	boot_stack_found = True
	1076
[328]	1077	# check that BOOT vsegs are found and identity mapping
[348]	1078	if ( (boot_mapping_found == False) or (boot_mapping_identity == False) ):
	1079	print '[genmap error] in hard_config() : seg_boot_mapping missing or not ident'
[319]	1080	sys.exit()
	1081
[406]	1082	if ( (boot_code_found == False) or (boot_code_identity == False) ):
[348]	1083	print '[genmap error] in hard_config() : seg_boot_code missing or not ident'
[319]	1084	sys.exit()
	1085
[406]	1086	if ( (boot_data_found == False) or (boot_data_identity == False) ):
[348]	1087	print '[genmap error] in hard_config() : seg_boot_data missing or not ident'
[319]	1088	sys.exit()
	1089
[348]	1090	if ( (boot_stack_found == False) or (boot_stack_identity == False) ):
	1091	print '[genmap error] in giet_vsegs() : seg_boot_stack missing or not ident'
[319]	1092	sys.exit()
	1093
	1094	# Search RAMDISK global vseg if required
	1095	seg_rdk_base = 0xFFFFFFFF
	1096	seg_rdk_size = 0
	1097	seg_rdk_found = False
	1098
	1099	if self.use_ramdisk:
	1100	for vseg in self.globs:
[404]	1101	if ( vseg.name == 'seg_rdk' ):
[319]	1102	seg_rdk_base = vseg.vbase
	1103	seg_rdk_size = vseg.vobjs[0].length
	1104	seg_rdk_found = True
	1105
	1106	if ( seg_rdk_found == False ):
	1107	print 'Error in hard_config() "seg_ramdisk" not found'
	1108	sys.exit(1)
	1109
	1110	# build string
[406]	1111	s = '/* Generated by genmap for %s */\n' % self.name
[319]	1112	s += '\n'
	1113	s += '#ifndef HARD_CONFIG_H\n'
	1114	s += '#define HARD_CONFIG_H\n'
	1115	s += '\n'
	1116
[406]	1117	s += '/* General platform parameters */\n'
[319]	1118	s += '\n'
	1119	s += '#define X_SIZE %d\n' % self.x_size
	1120	s += '#define Y_SIZE %d\n' % self.y_size
	1121	s += '#define X_WIDTH %d\n' % self.x_width
	1122	s += '#define Y_WIDTH %d\n' % self.y_width
[406]	1123	s += '#define P_WIDTH %d\n' % self.p_width
[319]	1124	s += '#define X_IO %d\n' % self.x_io
[406]	1125	s += '#define Y_IO %d\n' % self.y_io
[411]	1126	s += '#define NB_PROCS_MAX %d\n' % self.nprocs
[319]	1127	s += '#define IRQ_PER_PROCESSOR %d\n' % self.irq_per_proc
	1128	s += '#define RESET_ADDRESS 0x%x\n' % self.reset_address
	1129	s += '#define NB_TOTAL_PROCS %d\n' % nb_total_procs
	1130	s += '\n'
	1131
[406]	1132	s += '/* Peripherals */\n'
[319]	1133	s += '\n'
	1134	s += '#define NB_TTY_CHANNELS %d\n' % tty_channels
	1135	s += '#define NB_IOC_CHANNELS %d\n' % ioc_channels
	1136	s += '#define NB_NIC_CHANNELS %d\n' % nic_channels
	1137	s += '#define NB_CMA_CHANNELS %d\n' % cma_channels
	1138	s += '#define NB_TIM_CHANNELS %d\n' % tim_channels
	1139	s += '#define NB_DMA_CHANNELS %d\n' % dma_channels
	1140	s += '\n'
	1141	s += '#define USE_XCU %d\n' % ( nb_xcu != 0 )
	1142	s += '#define USE_IOB %d\n' % ( nb_iob != 0 )
	1143	s += '#define USE_PIC %d\n' % ( nb_pic != 0 )
	1144	s += '#define USE_FBF %d\n' % ( nb_fbf != 0 )
	1145	s += '\n'
	1146	s += '#define USE_IOC_BDV %d\n' % use_bdv
	1147	s += '#define USE_IOC_SPI %d\n' % use_spi
	1148	s += '#define USE_IOC_HBA %d\n' % use_hba
[403]	1149	s += '#define USE_IOC_RDK %d\n' % self.use_ramdisk
[319]	1150	s += '\n'
[328]	1151	s += '#define FBUF_X_SIZE %d\n' % fbf_arg
	1152	s += '#define FBUF_Y_SIZE %d\n' % fbf_arg
	1153	s += '\n'
	1154	s += '#define XCU_NB_INPUTS %d\n' % xcu_arg
	1155	s += '\n'
[319]	1156
[356]	1157	s += '/* base addresses and sizes for physical segments */\n'
[319]	1158	s += '\n'
[406]	1159	s += '#define SEG_RAM_BASE 0x%x\n' % self.ram_base
	1160	s += '#define SEG_RAM_SIZE 0x%x\n' % self.ram_size
[356]	1161	s += '\n'
[406]	1162	s += '#define SEG_CMA_BASE 0x%x\n' % seg_cma_base
	1163	s += '#define SEG_CMA_SIZE 0x%x\n' % seg_cma_size
[319]	1164	s += '\n'
[406]	1165	s += '#define SEG_DMA_BASE 0x%x\n' % seg_dma_base
	1166	s += '#define SEG_DMA_SIZE 0x%x\n' % seg_dma_size
[319]	1167	s += '\n'
[406]	1168	s += '#define SEG_FBF_BASE 0x%x\n' % seg_fbf_base
	1169	s += '#define SEG_FBF_SIZE 0x%x\n' % seg_fbf_size
[319]	1170	s += '\n'
[406]	1171	s += '#define SEG_ICU_BASE 0x%x\n' % seg_icu_base
	1172	s += '#define SEG_ICU_SIZE 0x%x\n' % seg_icu_size
[319]	1173	s += '\n'
[406]	1174	s += '#define SEG_IOB_BASE 0x%x\n' % seg_iob_base
	1175	s += '#define SEG_IOB_SIZE 0x%x\n' % seg_iob_size
[319]	1176	s += '\n'
[406]	1177	s += '#define SEG_IOC_BASE 0x%x\n' % seg_ioc_base
	1178	s += '#define SEG_IOC_SIZE 0x%x\n' % seg_ioc_size
[319]	1179	s += '\n'
[406]	1180	s += '#define SEG_MMC_BASE 0x%x\n' % seg_mmc_base
	1181	s += '#define SEG_MMC_SIZE 0x%x\n' % seg_mmc_size
[319]	1182	s += '\n'
[406]	1183	s += '#define SEG_MWR_BASE 0x%x\n' % seg_mwr_base
	1184	s += '#define SEG_MWR_SIZE 0x%x\n' % seg_mwr_size
[319]	1185	s += '\n'
[406]	1186	s += '#define SEG_ROM_BASE 0x%x\n' % seg_rom_base
	1187	s += '#define SEG_ROM_SIZE 0x%x\n' % seg_rom_size
[319]	1188	s += '\n'
[406]	1189	s += '#define SEG_SIM_BASE 0x%x\n' % seg_sim_base
	1190	s += '#define SEG_SIM_SIZE 0x%x\n' % seg_sim_size
[319]	1191	s += '\n'
[406]	1192	s += '#define SEG_NIC_BASE 0x%x\n' % seg_nic_base
	1193	s += '#define SEG_NIC_SIZE 0x%x\n' % seg_nic_size
[319]	1194	s += '\n'
[406]	1195	s += '#define SEG_PIC_BASE 0x%x\n' % seg_pic_base
	1196	s += '#define SEG_PIC_SIZE 0x%x\n' % seg_pic_size
[319]	1197	s += '\n'
[406]	1198	s += '#define SEG_TIM_BASE 0x%x\n' % seg_tim_base
	1199	s += '#define SEG_TIM_SIZE 0x%x\n' % seg_tim_size
[319]	1200	s += '\n'
[406]	1201	s += '#define SEG_TTY_BASE 0x%x\n' % seg_tty_base
	1202	s += '#define SEG_TTY_SIZE 0x%x\n' % seg_tty_size
[319]	1203	s += '\n'
[406]	1204	s += '#define SEG_XCU_BASE 0x%x\n' % seg_xcu_base
	1205	s += '#define SEG_XCU_SIZE 0x%x\n' % seg_xcu_size
[319]	1206	s += '\n'
	1207	s += '#define SEG_RDK_BASE 0x%x\n' % seg_rdk_base
	1208	s += '#define SEG_RDK_SIZE 0x%x\n' % seg_rdk_size
	1209	s += '\n'
[328]	1210	s += '#define PERI_CLUSTER_INCREMENT 0x%x\n' % self.peri_increment
[319]	1211	s += '\n'
	1212
[326]	1213	s += '/* physical base addresses for identity mapped vsegs */\n'
	1214	s += '/* used by the GietVM OS */\n'
[319]	1215	s += '\n'
	1216	s += '#define SEG_BOOT_MAPPING_BASE 0x%x\n' % boot_mapping_base
	1217	s += '#define SEG_BOOT_MAPPING_SIZE 0x%x\n' % boot_mapping_size
	1218	s += '\n'
	1219	s += '#define SEG_BOOT_CODE_BASE 0x%x\n' % boot_code_base
	1220	s += '#define SEG_BOOT_CODE_SIZE 0x%x\n' % boot_code_size
	1221	s += '\n'
	1222	s += '#define SEG_BOOT_DATA_BASE 0x%x\n' % boot_data_base
	1223	s += '#define SEG_BOOT_DATA_SIZE 0x%x\n' % boot_data_size
	1224	s += '\n'
	1225	s += '#define SEG_BOOT_STACK_BASE 0x%x\n' % boot_stack_base
	1226	s += '#define SEG_BOOT_STACK_SIZE 0x%x\n' % boot_stack_size
	1227	s += '#endif\n'
[406]	1228
[319]	1229	return s
	1230
	1231	# end of hard_config()
	1232
[411]	1233	################################################################################
	1234	def linux_dts( self ): # compute string for linux.dts file generation
	1235	# used for linux configuration
	1236	# header
	1237	s = '/dts-v1/;\n'
	1238	s += '\n'
	1239	s += '/{\n'
[421]	1240	s += ' compatible = "tsar,%s";\n' % self.name
[411]	1241	s += ' #address-cells = <2>;\n' # physical address on 64 bits
	1242	s += ' #size-cells = <1>;\n' # segment size on 32 bits
	1243	s += ' model = "%s";\n' % self.name
	1244	s += '\n'
	1245
	1246	# linux globals arguments
	1247	s += ' chosen {\n'
	1248	s += ' linux,stdout-path = &tty;\n'
	1249	s += ' bootargs = "console=tty0 console=ttyVTTY0 earlyprintk";\n'
	1250	s += ' };\n\n'
	1251
	1252	# cpus (for each cluster)
	1253	s += ' cpus {\n'
	1254	s += ' #address-cells = <1>;\n'
	1255	s += ' #size-cells = <0>;\n'
	1256
	1257	for cluster in self.clusters:
	1258	for proc in cluster.procs:
	1259	x = cluster.x
	1260	y = cluster.y
	1261	l = proc.lpid
[421]	1262	proc_id = (((x << self.y_width) + y) << self.p_width) + l
[411]	1263	s += ' cpu@%d_%d_%d {\n' %(x,y,l)
	1264	s += ' device_type = "cpu";\n'
	1265	s += ' compatible = "soclib,mips32el";\n'
	1266	s += ' reg = <0x%x>;\n' % proc_id
	1267	s += ' };\n'
	1268	s += '\n'
	1269
	1270	s += ' };\n\n'
	1271
	1272	# devices (ram or peripheral) are grouped per cluster
	1273	# the "compatible" attribute links a peripheral device
	1274	# to one or several drivers identified by ("major","minor")
	1275
	1276	for cluster in self.clusters:
	1277	x = cluster.x
	1278	y = cluster.y
	1279	found_xcu = False
	1280	found_pic = False
	1281
	1282	s += ' /* cluster[%d,%d] */\n\n' % (x,y)
	1283
	1284	# scan all psegs to find RAM in current cluster
	1285	for pseg in cluster.psegs:
	1286	if ( pseg.segtype == 'RAM' ):
	1287	msb = pseg.base >> 32
	1288	lsb = pseg.base & 0xFFFFFFFF
	1289	size = pseg.size
	1290
	1291	s += ' ram@%d_%d: ram@%d_%d {\n' % (x,y,x,y)
	1292	s += ' device_type = "memory";\n'
	1293	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1294	s += ' };\n\n'
	1295
	1296	# scan all periphs to find XCU or PIC in current cluster
	1297	for periph in cluster.periphs:
	1298	msb = periph.pseg.base >> 32
	1299	lsb = periph.pseg.base & 0xFFFFFFFF
	1300	size = periph.pseg.size
	1301
	1302	# search XCU (can be replicated)
	1303	if ( (periph.ptype == 'XCU') ):
	1304	found_xcu = True
	1305	xcu = periph
	1306	irq_ctrl_name = 'xcu@%d_%d' % (x,y)
	1307
	1308	s += ' %s: %s {\n' % (irq_ctrl_name, irq_ctrl_name)
[421]	1309	s += ' compatible = "soclib,vci_xicu","soclib,vci_xicu_timer";\n'
[411]	1310	s += ' interrupt-controller;\n'
	1311	s += ' #interrupt-cells = <1>;\n'
	1312	s += ' clocks = <&freq>;\n' # the XCU component contains a timer
	1313	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1314	s += ' };\n\n'
	1315
	1316	# search PIC (non replicated)
	1317	if ( periph.ptype == 'PIC' ):
	1318	found_pic = True
	1319	pic = periph
	1320	irq_ctrl_name = 'pic'
	1321
	1322	s += ' %s: %s {\n' % (irq_ctrl_name, irq_ctrl_name)
[421]	1323	s += ' compatible = "soclib,vci_iopic";\n'
[411]	1324	s += ' interrupt-controller;\n'
	1325	s += ' #interrupt-cells = <1>;\n'
	1326	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1327	s += ' };\n\n'
	1328
	1329	# search ICU (non supported by Linux)
	1330	if ( periph.ptype == 'ICU' ):
	1331	print '[genmap warning] in linux_dts() : ICU peripheral not supported by LINUX'
	1332
	1333	# we need one interrupt controler in any cluster containing peripherals
	1334	if ( (found_xcu == False) and (found_pic == False) and (len(cluster.periphs) > 0) ):
	1335	print '[genmap error] in linux_dts() : No XCU/PIC in cluster(%d,%d)' % (x,y)
	1336	sys.exit(1)
	1337
	1338	if ( found_pic == True ): irq_ctrl = pic
	1339	else: irq_ctrl = xcu
	1340
	1341	# scan all periphs to find TTY and IOC in current cluster
	1342	for periph in cluster.periphs:
	1343	msb = periph.pseg.base >> 32
	1344	lsb = periph.pseg.base & 0xFFFFFFFF
	1345	size = periph.pseg.size
	1346
	1347	# search TTY (non replicated)
	1348	if ( periph.ptype == 'TTY' ):
	1349
	1350	# get HWI index to XCU or PIC (only TTY channel 0 is used by Linux)
	1351	hwi_id = 0xFFFFFFFF
	1352	for irq in irq_ctrl.irqs:
	1353	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == 0) ): hwi_id = irq.srcid
	1354	if ( hwi_id == 0xFFFFFFFF ):
	1355	print '[genmap error] in linux.dts() IRQ_TTY_RX not found'
	1356	sys.exit(1)
	1357
	1358	s += ' tty: tty {\n'
[421]	1359	s += ' compatible = "soclib,vci_multi_tty";\n'
[411]	1360	s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name)
	1361	s += ' interrupt = <%d>;\n' % hwi_id
	1362	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1363	s += ' };\n\n'
	1364
	1365	# search IOC (non replicated)
	1366	elif ( periph.ptype == 'IOC' ):
	1367
	1368	if ( periph.subtype == 'BDV' ):
	1369
	1370	# get irq line index associated to bdv
	1371	hwi_id = 0xFFFFFFFF
	1372	for irq in irq_ctrl.irqs:
	1373	if ( irq.isrtype == 'ISR_BDV' ): hwi_id = irq.srcid
	1374	if ( hwi_id == 0xFFFFFFFF ):
	1375	print '[genmap error] in linux.dts() ISR_BDV not found'
	1376	sys.exit(1)
	1377
	1378	s += ' bdv: bdv {\n'
[421]	1379	s += ' compatible = "soclib,vci_blockdevice";\n'
[411]	1380	s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name)
	1381	s += ' interrupt = <%d>;\n' % hwi_id
	1382	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1383	s += ' };\n\n'
	1384
	1385	elif ( periph.subtype == 'HBA' ):
	1386
	1387	print '[genmap error] in linux_dts() : HBA peripheral not supported by LINUX'
	1388	sys.exit(1)
	1389
	1390	elif ( periph.subtype == 'SPI' ):
	1391
	1392	print '[genmap error] in linux_dts() : SPI peripheral not supported by LINUX'
	1393	sys.exit(1)
	1394
	1395	# other peripherals
	1396	else:
	1397	type = periph.ptype
	1398	print '[genmap warning] in linux_dts() : %s peripheral not supported by LINUX' % (type)
	1399
	1400	# clocks
	1401	s += ' /* clocks */\n\n'
	1402	s += ' clocks {\n'
	1403	s += ' freq@50MHZ: freq@50MHZ {\n'
	1404	s += ' #clock-cells = <0>;\n'
	1405	s += ' compatible = "fixed-clock";\n'
	1406	s += ' clock-frequency = <50000000>;\n'
	1407	s += ' };\n'
	1408	s += ' };\n\n'
	1409	s += ' cpuclk {\n'
[421]	1410	s += ' compatible = "soclib,mips32_clksrc";\n'
[411]	1411	s += ' clocks = <&freq@50MHZ>;\n'
	1412	s += ' };\n'
	1413	s += '};\n'
	1414
	1415	return s
	1416	# end linux_dts()
	1417
	1418
	1419	#############################################################################
[319]	1420	def netbsd_dts( self ): # compute string for netbsd.dts file generation,
[406]	1421	# used for netbsd configuration
[319]	1422	# header
	1423	s = '/dts-v1/;\n'
	1424	s += '\n'
	1425	s += '/{\n'
[406]	1426	s += ' #address-cells = <2>;\n'
	1427	s += ' #size-cells = <1>;\n'
[319]	1428
	1429	# cpus (for each cluster)
	1430	s += ' cpus {\n'
	1431	s += ' #address-cells = <1>;\n'
	1432	s += ' #size-cells = <0>;\n'
	1433
	1434	for cluster in self.clusters:
	1435	for proc in cluster.procs:
[406]	1436	proc_id = (((cluster.x << self.y_width) + cluster.y) << self.p_width) + proc.lpid
[319]	1437
	1438	s += ' Mips,32@0x%x {\n' % proc_id
	1439	s += ' device_type = "cpu";\n'
	1440	s += ' icudev_type = "cpu:mips";\n'
	1441	s += ' name = "Mips,32";\n'
	1442	s += ' reg = <0x%x>;\n' % proc_id
	1443	s += ' };\n'
	1444	s += '\n'
	1445
	1446	s += ' };\n'
	1447
[411]	1448	# physical memory banks (for each cluster)
[319]	1449	for cluster in self.clusters:
	1450	for pseg in cluster.psegs:
	1451
	1452	if ( pseg.segtype == 'RAM' ):
	1453	msb = pseg.base >> 32
	1454	lsb = pseg.base & 0xFFFFFFFF
	1455	size = pseg.size
	1456
	1457	s += ' %s@0x%x {\n' % (pseg.name, pseg.base)
	1458	s += ' cached = <1>;\n'
	1459	s += ' device_type = "memory";\n'
	1460	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1461	s += ' };\n'
	1462
	1463	# peripherals (for each cluster)
	1464	for cluster in self.clusters:
[411]	1465	x = cluster.x
	1466	y = cluster.y
[319]	1467
[406]	1468	# research XCU component
[319]	1469	found_xcu = False
	1470	for periph in cluster.periphs:
[406]	1471	if ( (periph.ptype == 'XCU') ):
[319]	1472	found_xcu = True
	1473	xcu = periph
	1474	msb = periph.pseg.base >> 32
	1475	lsb = periph.pseg.base & 0xFFFFFFFF
	1476	size = periph.pseg.size
	1477
	1478	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1479	s += ' device_type = "soclib:xicu:root";\n'
	1480	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[400]	1481	s += ' input_lines = <%d>;\n' % periph.arg
	1482	s += ' ipis = <%d>;\n' % periph.arg
	1483	s += ' timers = <%d>;\n' % periph.arg
[319]	1484
	1485	output_id = 0 # output index from XCU
	1486	for lpid in xrange ( len(cluster.procs) ): # destination processor index
	1487	for itid in xrange ( self.irq_per_proc ): # input irq index on processor
[406]	1488	cluster_xy = (cluster.x << self.y_width) + cluster.y
	1489	proc_id = (cluster_xy << self.p_width) + lpid
[319]	1490	s += ' out@%d {\n' % output_id
	1491	s += ' device_type = "soclib:xicu:filter";\n'
[411]	1492	s += ' irq = <&{/cpus/Mips,32@0x%x} %d>;\n' % (proc_id, itid)
[406]	1493	s += ' output_line = <%d>;\n' % output_id
[411]	1494	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1495	s += ' };\n'
	1496
	1497	output_id += 1
	1498
	1499	s += ' };\n'
	1500
	1501	# research PIC component
	1502	found_pic = False
	1503	for periph in cluster.periphs:
[406]	1504	if ( periph.ptype == 'PIC' ):
[319]	1505	found_pic = True
	1506	pic = periph
	1507	msb = periph.pseg.base >> 32
	1508	lsb = periph.pseg.base & 0xFFFFFFFF
	1509	size = periph.pseg.size
	1510
	1511	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1512	s += ' device_type = "soclib:pic:root";\n'
	1513	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[406]	1514	s += ' input_lines = <%d>;\n' % periph.channels
[319]	1515	s += ' };\n'
	1516
[411]	1517	# at least one interrupt controller
[319]	1518	if ( (found_xcu == False) and (found_pic == False) and (len(cluster.periphs) > 0) ):
[411]	1519	print '[genmap error] in netbsd_dts() : No XCU/PIC in cluster(%d,%d)' % (x,y)
[406]	1520	sys.exit(1)
	1521
[319]	1522	if ( found_pic == True ): irq_tgt = pic
	1523	else: irq_tgt = xcu
[406]	1524
[319]	1525	# get all others peripherals in cluster
	1526	for periph in cluster.periphs:
	1527	msb = periph.pseg.base >> 32
	1528	lsb = periph.pseg.base & 0xFFFFFFFF
	1529	size = periph.pseg.size
	1530
	1531	# research DMA component
	1532	if ( periph.ptype == 'DMA' ):
	1533
	1534	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[411]	1535	s += ' device_type = "soclib:dma";\n'
	1536	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1537	s += ' channel_count = <%d>;\n' % periph.channels
	1538
	1539	# multi-channels : get HWI index (to XCU) for each channel
	1540	for channel in xrange( periph.channels ):
	1541	hwi_id = 0xFFFFFFFF
	1542	for irq in xcu.irqs:
[406]	1543	if ( (irq.isrtype == 'ISR_DMA') and (irq.channel == channel) ):
[319]	1544	hwi_id = irq.srcid
	1545	if ( hwi_id == 0xFFFFFFFF ):
[348]	1546	print '[genmap error] in netbsd.dts() ISR_DMA channel %d not found' % channel
[319]	1547	sys.exit(1)
	1548
	1549	name = '%s@0x%x' % (xcu.pseg.name, xcu.pseg.base)
	1550	s += ' irq@%d{\n' % channel
	1551	s += ' device_type = "soclib:periph:irq";\n'
	1552	s += ' output_line = <%d>;\n' % channel
[411]	1553	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1554	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1555	s += ' };\n'
	1556
[406]	1557	s += ' };\n'
[319]	1558
	1559	# research MMC component
	1560	elif ( periph.ptype == 'MMC' ):
	1561
	1562	# get irq line index associated to MMC in XCU
	1563	irq_in = 0xFFFFFFFF
	1564	for irq in xcu.irqs:
	1565	if ( irq.isrtype == 'ISR_MMC' ): irq_in = irq.srcid
	1566	if ( irq_in == 0xFFFFFFFF ):
[348]	1567	print '[genmap error] in netbsd.dts() ISR_MMC not found'
[319]	1568	sys.exit(1)
	1569
	1570	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1571	s += ' device_type = "soclib:mmc";\n'
[411]	1572	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name, irq_tgt.pseg.base, irq_in)
	1573	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[406]	1574	s += ' };\n'
[319]	1575
	1576	# research FBF component
[406]	1577	elif ( periph.ptype == 'FBF' ):
[319]	1578
[411]	1579	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1580	s += ' device_type = "soclib:framebuffer";\n'
	1581	s += ' mode = <32>;\n' # bits par pixel
[400]	1582	s += ' width = <%d>;\n' % periph.arg
	1583	s += ' height = <%d>;\n' % periph.arg
[319]	1584	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1585	s += ' };\n'
	1586
	1587	# research IOC component
[406]	1588	elif ( periph.ptype == 'IOC' ):
[319]	1589
	1590	if ( periph.subtype == 'BDV' ):
	1591
	1592	# get irq line index associated to bdv
	1593	irq_in = 0xFFFFFFFF
	1594	for irq in irq_tgt.irqs:
	1595	if ( irq.isrtype == 'ISR_BDV' ): irq_in = irq.srcid
	1596	if ( irq_in == 0xFFFFFFFF ):
[348]	1597	print '[genmap error] in netbsd.dts() ISR_BDV not found'
[319]	1598	sys.exit(1)
	1599
[411]	1600	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1601	s += ' device_type = "soclib:blockdevice";\n'
[411]	1602	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in)
	1603	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1604	s += ' };\n'
	1605
	1606	elif ( periph.subtype == 'HBA' ):
[348]	1607	print '[genmap error] in netbsd_dts() : HBA peripheral not supported by NetBSD'
[319]	1608	sys.exit(1)
	1609
	1610	elif ( periph.subtype == 'SPI' ):
	1611
	1612	# get irq line index associated to spi
	1613	irq_in = 0xFFFFFFFF
	1614	for irq in irq_tgt.irqs:
	1615	if ( irq.isrtype == 'ISR_SPI' ): irq_in = irq.srcid
	1616	if ( irq_in == 0xFFFFFFFF ):
[348]	1617	print '[genmap error] in netbsd.dts() ISR_SPI not found'
[319]	1618	sys.exit(1)
	1619
	1620	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1621	s += ' device_type = "soclib:spi";\n'
[411]	1622	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in)
	1623	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1624	s += ' };\n'
	1625
	1626	# research ROM component
	1627	elif ( periph.ptype == 'ROM' ):
	1628
[411]	1629	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1630	s += ' device_type = "rom";\n'
[411]	1631	s += ' cached = <1>;\n'
	1632	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1633	s += ' };\n'
	1634
	1635	# research SIM component
	1636	elif ( periph.ptype == 'SIM' ):
	1637
	1638	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1639	s += ' device_type = "soclib:simhelper";\n'
	1640	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1641	s += ' };\n'
	1642
	1643	# research TTY component
	1644	elif ( periph.ptype == 'TTY' ):
	1645
[411]	1646	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1647	s += ' device_type = "soclib:tty";\n'
[406]	1648	s += ' channel_count = < %d >;\n' % periph.channels
[411]	1649	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1650
	1651	# multi-channels : get HWI index (to XCU or PIC) for each channel
	1652	for channel in xrange( periph.channels ):
	1653	hwi_id = 0xFFFFFFFF
	1654	for irq in irq_tgt.irqs:
[406]	1655	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == channel) ):
[319]	1656	hwi_id = irq.srcid
	1657	if ( hwi_id == 0xFFFFFFFF ):
[348]	1658	print '[genmap error] in netbsd.dts() ISR_TTY_RX channel %d not found' % channel
[319]	1659	sys.exit(1)
	1660
	1661	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1662	s += ' irq@%d{\n' % channel
	1663	s += ' device_type = "soclib:periph:irq";\n'
	1664	s += ' output_line = <%d>;\n' % channel
[411]	1665	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1666	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1667	s += ' };\n'
	1668
	1669	s += ' };\n'
[406]	1670
[319]	1671	# research IOB component
	1672	elif ( periph.ptype == 'IOB' ):
	1673
	1674	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1675	s += ' device_type = "soclib:iob";\n'
	1676	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1677	s += ' };\n'
	1678
	1679	# research NIC component
[406]	1680	elif ( periph.ptype == 'NIC' ):
[319]	1681
	1682	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1683	s += ' device_type = "soclib:nic";\n'
	1684	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1685	s += ' channel_count = < %d >;\n' % periph.channels
	1686
	1687	# multi-channels : get HWI index (to XCU or PIC) for RX & TX IRQs
	1688	# RX IRQ : (2channel) / TX IRQs : (2channel + 1)
	1689	for channel in xrange( periph.channels ):
	1690	hwi_id = 0xFFFFFFFF
	1691	for irq in irq_tgt.irqs:
[406]	1692	if ( (irq.isrtype == 'ISR_NIC_RX') and (irq.channel == channel) ):
[319]	1693	hwi_id = irq.srcid
	1694	if ( hwi_id == 0xFFFFFFFF ):
[348]	1695	print '[genmap error] in netbsd.dts() ISR_NIC_RX channel %d not found' % channel
[319]	1696	sys.exit(1)
	1697
	1698	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1699	s += ' irq_rx@%d{\n' % channel
	1700	s += ' device_type = "soclib:periph:irq";\n'
	1701	s += ' output_line = <%d>;\n' % (2*channel)
	1702	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1703	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
	1704	s += ' };\n'
	1705
	1706	hwi_id = 0xFFFFFFFF
	1707	for irq in irq_tgt.irqs:
[406]	1708	if ( (irq.isrtype == 'ISR_NIC_TX') and (irq.channel == channel) ):
[319]	1709	hwi_id = irq.srcid
	1710	if ( hwi_id == 0xFFFFFFFF ):
[348]	1711	print '[genmap error] in netbsd.dts() ISR_NIC_TX channel %d not found' % channel
[319]	1712	sys.exit(1)
	1713
	1714	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1715	s += ' irq_tx@%d{\n' % channel
	1716	s += ' device_type = "soclib:periph:irq";\n'
	1717	s += ' output_line = <%d>;\n' % (2*channel + 1)
	1718	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1719	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
	1720	s += ' };\n'
[406]	1721
[319]	1722	s += ' };\n'
	1723
	1724	# research CMA component
[406]	1725	elif ( periph.ptype == 'CMA' ):
[319]	1726
	1727	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1728	s += ' device_type = "soclib:cma";\n'
	1729	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1730	s += ' channel_count = < %d >;\n' % periph.channels
	1731
	1732	# multi-channels : get HWI index (to XCU or PIC) for each channel
	1733	for channel in xrange( periph.channels ):
	1734	hwi_id = 0xFFFFFFFF
	1735	for irq in irq_tgt.irqs:
[406]	1736	if ( (irq.isrtype == 'ISR_CMA') and (irq.channel == channel) ):
[319]	1737	hwi_id = irq.srcid
	1738	if ( hwi_id == 0xFFFFFFFF ):
[348]	1739	print '[genmap error] in netbsd.dts() ISR_CMA channel %d not found' % channel
[319]	1740	sys.exit(1)
	1741
	1742	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1743	s += ' irq@%d{\n' % channel
	1744	s += ' device_type = "soclib:periph:irq";\n'
	1745	s += ' output_line = <%d>;\n' % channel
[411]	1746	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1747	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1748	s += ' };\n'
	1749
	1750	s += ' };\n'
	1751
	1752	# research TIM component
[406]	1753	elif ( periph.ptype == 'TIM' ):
[319]	1754
[348]	1755	print '[genmap error] in netbsd_dts() : TIM peripheral not supported by NetBSD'
[319]	1756	sys.exit(1)
	1757
	1758	# research MWR component
	1759	elif ( periph.ptype == 'MWR' ):
	1760
[348]	1761	print '[genmap error] in netbsd_dts() : MWR peripheral not supported by NetBSD'
[319]	1762	sys.exit(1)
	1763
	1764	# research ICU component
[406]	1765	elif ( periph.ptype == 'ICU' ):
[348]	1766	print '[genmap error] in netbsd_dts() : ICU peripheral not supported by NetBSD'
[319]	1767	sys.exit(1)
	1768
	1769	# topology
	1770	s += '\n'
	1771	s += ' topology {\n'
	1772	s += ' #address-cells = <2>;\n'
	1773	s += ' #size-cells = <0>;\n'
	1774	for cluster in self.clusters:
[406]	1775	s += ' cluster@%d,%d {\n' % (cluster.x, cluster.y)
[319]	1776	s += ' reg = <%d %d>;\n' % (cluster.x, cluster.y)
	1777	s += ' devices = <\n'
	1778
[406]	1779	offset = ((cluster.x << self.y_width) + cluster.y) << self.p_width
[319]	1780	for proc in cluster.procs:
	1781	s += ' &{/cpus/Mips,32@0x%x}\n' % (offset + proc.lpid)
	1782	for periph in cluster.periphs:
	1783	s += ' &{/%s@0x%x}\n' % (periph.pseg.name, periph.pseg.base)
	1784
	1785	s += ' >;\n'
	1786	s += ' };\n'
	1787	s += ' };\n'
	1788	s += '};\n'
	1789
	1790	return s
[411]	1791	# end netbsd_dts()
[319]	1792
	1793	###########################
	1794	def almos_archinfo( self ): # compute string for arch.info file generation,
[406]	1795	# used for almos configuration
[319]	1796	# header
[327]	1797	s = '# arch.info file generated by genmap for %s\n' % self.name
[319]	1798	s += '\n'
	1799	s += '[HEADER]\n'
	1800	s += ' REVISION=1\n'
	1801	s += ' ARCH=%s\n' % self.name
	1802	s += ' XMAX=%d\n' % self.x_size
	1803	s += ' YMAX=%d\n' % self.y_size
[411]	1804	s += ' CPU_NR=%d\n' % self.nprocs
[319]	1805	s += '\n'
	1806
	1807	# clusters
	1808	cluster_id = 0
	1809	for cluster in self.clusters:
	1810
	1811	ram = None
	1812	nb_cpus = len( cluster.procs )
	1813	nb_devs = len( cluster.periphs )
	1814	if ( len( cluster.coprocs ) != 0 ):
	1815	print 'Error in almos_archinfo() coprocessors not supported yet'
	1816	sys.exit(1)
	1817
	1818	# search a RAM
	1819	for pseg in cluster.psegs:
[406]	1820	if ( pseg.segtype == 'RAM' ):
[319]	1821	ram = pseg
	1822	nb_devs += 1
	1823
	1824	# search XCU to get IRQs indexes if cluster contains peripherals
	1825	if ( len( cluster.periphs ) != 0 ):
	1826	tty_irq_id = None
	1827	bdv_irq_id = None
	1828	dma_irq_id = None
	1829
	1830	for periph in cluster.periphs:
[406]	1831	if ( periph.ptype == 'XCU' ):
[319]	1832	# scan irqs
	1833	for irq in periph.irqs:
	1834	if ( irq.isrtype == 'ISR_TTY_RX' ) : tty_irq_id = irq.srcid
	1835	if ( irq.isrtype == 'ISR_BDV' ) : bdv_irq_id = irq.srcid
	1836	if ( irq.isrtype == 'ISR_DMA' ) : dma_irq_id = irq.srcid
	1837
	1838	# Build the cluster description
	1839	s += '[CLUSTER]\n'
[406]	1840	s += ' CID=%d\n' % cluster_id
	1841	s += ' ARCH_CID=0x%x\n' % ((cluster.x << self.y_width) + cluster.y)
[319]	1842	s += ' CPU_NR=%d\n' % nb_cpus
	1843	s += ' DEV_NR=%d\n' % nb_devs
	1844
[406]	1845
[319]	1846	# Handling RAM when cluster contain a RAM
	1847	if (ram != None ):
	1848	base = ram.base
	1849	size = ram.size
	1850	irqid = -1
[406]	1851	s += ' DEVID=RAM'
[319]	1852	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
	1853
	1854	# Handling peripherals
	1855	for periph in cluster.periphs:
	1856	base = periph.pseg.base
	1857	size = periph.pseg.size
	1858
[406]	1859	if ( periph.ptype == 'XCU' ):
[319]	1860
[406]	1861	s += ' DEVID=XICU'
[319]	1862	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
	1863
[406]	1864	elif ( (periph.ptype == 'TTY')
[319]	1865	and (tty_irq_id != None) ):
	1866
[406]	1867	s += ' DEVID=TTY'
[319]	1868	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, tty_irq_id )
	1869
[406]	1870	elif ( (periph.ptype == 'DMA')
[319]	1871	and (dma_irq_id != None) ):
	1872
	1873	s += ' DEVID=DMA'
	1874	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, dma_irq_id )
	1875
	1876	elif ( periph.ptype == 'FBF' ):
	1877
	1878	s += ' DEVID=FB'
	1879	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
	1880
	1881	elif ( (periph.ptype == 'IOC') and (periph.subtype == 'BDV')
	1882	and (bdv_irq_id != None) ):
	1883
[406]	1884	s += ' DEVID=BLKDEV'
[319]	1885	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, bdv_irq_id )
	1886
	1887	elif ( periph.ptype == 'PIC' ):
	1888
[406]	1889	s += ' DEVID=IOPIC'
[319]	1890	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
	1891
	1892	else:
	1893	print '# Warning from almos_archinfo() in cluster[%d,%d]' \
	1894	% (cluster.x, cluster.y)
	1895	print '# peripheral type %s/%s not supported yet\n' \
	1896	% ( periph.ptype, periph.subtype )
[406]	1897
[319]	1898	cluster_id += 1
	1899
	1900	return s
	1901
	1902	# end of almos_archinfo()
	1903
	1904
	1905
	1906
	1907
	1908
	1909
	1910
	1911	###########################################################################################
	1912	class Cluster ( object ):
	1913	###########################################################################################
	1914	def __init__( self,
[406]	1915	x,
[319]	1916	y ):
[406]	1917
[319]	1918	self.index = 0 # global index (set by Mapping constructor)
	1919	self.x = x # x coordinate
	1920	self.y = y # y coordinate
	1921	self.psegs = [] # filled by addRam() or addPeriph()
	1922	self.procs = [] # filled by addProc()
	1923	self.coprocs = [] # filled by addCoproc()
	1924	self.periphs = [] # filled by addPeriph()
	1925
	1926	return
	1927
	1928	################
	1929	def xml( self ): # xml for a cluster
	1930
	1931	s = ' <cluster x="%d" y="%d" >\n' % (self.x, self.y)
[406]	1932	for pseg in self.psegs: s += pseg.xml()
[319]	1933	for proc in self.procs: s += proc.xml()
[406]	1934	for copr in self.coprocs: s += copr.xml()
	1935	for peri in self.periphs: s += peri.xml()
[319]	1936	s += ' </cluster>\n'
	1937
	1938	return s
	1939
	1940	#############################################
	1941	def cbin( self, mapping, verbose, expected ): # C binary structure for Cluster
	1942
	1943	if ( verbose ):
	1944	print '*** cbin for cluster [%d,%d]' % (self.x, self.y)
	1945
	1946	# check index
	1947	if (self.index != expected):
[348]	1948	print '[genmap error] in Cluster.cbin() : cluster global index = %d / expected = %d' \
[319]	1949	% (self.index, expected )
	1950	sys.exit(1)
	1951
[406]	1952	# compute global index for first pseg
[319]	1953	if ( len(self.psegs) > 0 ):
	1954	pseg_id = self.psegs[0].index
	1955	else:
	1956	pseg_id = 0
	1957
[406]	1958	# compute global index for first proc
[319]	1959	if ( len(self.procs) > 0 ):
	1960	proc_id = self.procs[0].index
	1961	else:
	1962	proc_id = 0
	1963
[406]	1964	# compute global index for first coproc
[319]	1965	if ( len(self.coprocs) > 0 ):
	1966	coproc_id = self.coprocs[0].index
	1967	else:
	1968	coproc_id = 0
	1969
[406]	1970	# compute global index for first periph
[319]	1971	if ( len(self.periphs) > 0 ):
	1972	periph_id = self.periphs[0].index
	1973	else:
	1974	periph_id = 0
	1975
	1976	byte_stream = bytearray()
	1977	byte_stream += mapping.int2bytes( 4 , self.x ) # x coordinate
	1978	byte_stream += mapping.int2bytes( 4 , self.y ) # x coordinate
	1979	byte_stream += mapping.int2bytes( 4 , len( self.psegs ) ) # number of psegs in cluster
	1980	byte_stream += mapping.int2bytes( 4 , pseg_id ) # first pseg global index
	1981	byte_stream += mapping.int2bytes( 4 , len( self.procs ) ) # number of procs in cluster
	1982	byte_stream += mapping.int2bytes( 4 , proc_id ) # first proc global index
	1983	byte_stream += mapping.int2bytes( 4 , len( self.coprocs ) ) # number of coprocs in cluster
	1984	byte_stream += mapping.int2bytes( 4 , coproc_id ) # first coproc global index
	1985	byte_stream += mapping.int2bytes( 4 , len( self.periphs ) ) # number of periphs in cluster
	1986	byte_stream += mapping.int2bytes( 4 , periph_id ) # first periph global index
[406]	1987
[319]	1988	if ( verbose ):
	1989	print 'nb_psegs = %d' % len( self.psegs )
	1990	print 'pseg_id = %d' % pseg_id
	1991	print 'nb_procs = %d' % len( self.procs )
	1992	print 'proc_id = %d' % proc_id
	1993	print 'nb_coprocs = %d' % len( self.coprocs )
	1994	print 'coproc_id = %d' % coproc_id
	1995	print 'nb_periphs = %d' % len( self.periphs )
	1996	print 'periph_id = %d' % periph_id
	1997
	1998	return byte_stream
	1999
	2000	###########################################################################################
[305]	2001	class Vspace( object ):
[319]	2002	###########################################################################################
[406]	2003	def __init__( self,
	2004	name,
[319]	2005	startname ):
	2006
	2007	self.index = 0 # global index ( set by addVspace() )
	2008	self.name = name # vspace name
[305]	2009	self.startname = startname # name of vobj containing the start_vector
[406]	2010	self.vsegs = []
[305]	2011	self.tasks = []
	2012
	2013	return
	2014
[319]	2015	################
	2016	def xml( self ): # xml for one vspace
	2017
[305]	2018	s = ' <vspace name="%s" startname="%s" >\n' % ( self.name, self.startname )
[319]	2019	for vseg in self.vsegs: s += vseg.xml()
[406]	2020	for task in self.tasks: s += task.xml()
[305]	2021	s += ' </vspace>\n'
[319]	2022
[305]	2023	return s
	2024
[319]	2025	#############################################
	2026	def cbin( self, mapping, verbose, expected ): # C binary structure for Vspace
	2027
	2028	if ( verbose ):
	2029	print '*** cbin for vspace %s' % (self.name)
	2030
	2031	# check index
	2032	if (self.index != expected):
[348]	2033	print '[genmap error] in Vspace.cbin() : vspace global index = %d / expected = %d' \
[319]	2034	% (self.index, expected )
	2035	sys.exit(1)
	2036
	2037	# compute global index for vobj containing start_vector
	2038	vobj_start_id = 0xFFFFFFFF
	2039	for vseg in self.vsegs:
	2040	if ( vseg.vobjs[0].name == self.startname ):
	2041	vobj_start_id = vseg.vobjs[0].index
	2042	if ( vobj_start_id == 0xFFFFFFFF ):
[348]	2043	print '[genmap error] in Vspace.cbin() : startname %s not found for vspace %s' \
[319]	2044	% ( self.startname, self.name )
	2045	sys.exit(1)
[406]	2046
[319]	2047	# compute first vseg, vobj, task global index
	2048	first_vseg_id = self.vsegs[0].index
	2049	first_vobj_id = self.vsegs[0].vobjs[0].index
	2050	first_task_id = self.tasks[0].index
[406]	2051
[319]	2052	# compute number of vobjs, tasks, vsegs
	2053	nb_vsegs = len( self.vsegs )
	2054	nb_tasks = len( self.tasks )
	2055	nb_vobjs = 0
	2056	for vseg in self.vsegs:
	2057	nb_vobjs += len( vseg.vobjs )
	2058
	2059	byte_stream = bytearray()
	2060	byte_stream += mapping.str2bytes( 32, self.name ) # vspace name
[406]	2061	byte_stream += mapping.int2bytes( 4, vobj_start_id ) # vobj start_vector
[319]	2062	byte_stream += mapping.int2bytes( 4, nb_vsegs ) # number of vsegs
	2063	byte_stream += mapping.int2bytes( 4, nb_vobjs ) # number of vobjs
	2064	byte_stream += mapping.int2bytes( 4, nb_tasks ) # number of tasks
	2065	byte_stream += mapping.int2bytes( 4, first_vseg_id ) # first vseg global index
	2066	byte_stream += mapping.int2bytes( 4, first_vobj_id ) # first vobj global index
	2067	byte_stream += mapping.int2bytes( 4, first_task_id ) # first task global index
	2068
	2069	if ( verbose ):
	2070	print 'start_id = %d' % vobj_start_id
	2071	print 'nb_vsegs = %d' % nb_vsegs
	2072	print 'nb_vobjs = %d' % nb_vobjs
	2073	print 'nb_tasks = %d' % nb_tasks
	2074	print 'vseg_id = %d' % first_vseg_id
	2075	print 'vobj_id = %d' % first_vobj_id
	2076	print 'task_id = %d' % first_task_id
	2077
	2078	return byte_stream
	2079
	2080	###########################################################################################
[305]	2081	class Task( object ):
[319]	2082	###########################################################################################
[406]	2083	def __init__( self,
	2084	name,
	2085	trdid,
	2086	x,
[319]	2087	y,
[406]	2088	p,
	2089	stackname,
	2090	heapname,
[319]	2091	startid,
[406]	2092	usetty = False,
	2093	usenic = False,
[319]	2094	usecma = False,
[406]	2095	usehba = False,
[319]	2096	usetim = False ):
	2097
	2098	self.index = 0 # global index value set by addTask()
	2099	self.name = name # tsk name
	2100	self.trdid = trdid # task index (unique in vspace)
[406]	2101	self.x = x # cluster x coordinate
	2102	self.y = y # cluster y coordinate
	2103	self.p = p # processor local index
[319]	2104	self.stackname = stackname # name of vobj containing the stack
	2105	self.heapname = heapname # name of vobj containing the heap
	2106	self.startid = startid # index in start_vector
	2107	self.usetty = usetty # request a private TTY channel
	2108	self.usenic = usenic # request a private NIC channel
	2109	self.usecma = usecma # request a private CMA channel
	2110	self.usehba = usehba # request a private HBA channel
	2111	self.usetim = usetim # request a private TIM channel
[305]	2112	return
	2113
[319]	2114	################
	2115	def xml( self ): # xml for one task
	2116
	2117	s = ' <task name="%s"' % self.name
	2118	s += ' trdid="%d"' % self.trdid
	2119	s += ' x="%d"' % self.x
	2120	s += ' y="%d"' % self.y
	2121	s += ' p="%d"' % self.p
	2122	s += ' stackname="%s"' % self.stackname
	2123	s += ' heapname="%s"' % self.heapname
	2124	s += ' startid="%d"' % self.startid
[406]	2125	if self.usetty != 0: s += ' usetty="1"'
	2126	if self.usenic != 0: s += ' usenic="1"'
	2127	if self.usecma != 0: s += ' usehba="1"'
	2128	if self.usehba != 0: s += ' usehba="1"'
	2129	if self.usetim != 0: s += ' usehba="1"'
	2130	s += ' />\n'
[319]	2131
[305]	2132	return s
	2133
[319]	2134	#####################################################
[406]	2135	def cbin( self, mapping, verbose, expected, vspace ): # C binary data structure for Task
[319]	2136
	2137	if ( verbose ):
	2138	print '*** cbin for task %s in vspace %s' % (self.name, vspace.name)
	2139
	2140	# check index
	2141	if (self.index != expected):
[348]	2142	print '[genmap error] in Task.cbin() : task global index = %d / expected = %d' \
[319]	2143	% (self.index, expected )
	2144	sys.exit(1)
	2145
	2146	# compute cluster global index
	2147	cluster_id = (self.x * mapping.y_size) + self.y
	2148
	2149	# compute vobj local index for stack
	2150	vobj_stack_id = 0xFFFFFFFF
	2151	for vseg in vspace.vsegs:
	2152	if ( vseg.vobjs[0].name == self.stackname ):
[406]	2153	vobj_stack_id = vseg.vobjs[0].index
[319]	2154	if ( vobj_stack_id == 0xFFFFFFFF ):
[348]	2155	print '[genmap error] in Task.cbin() : stackname %s not found for task %s in vspace %s' \
[319]	2156	% ( self.stackname, self.name, vspace.name )
	2157	sys.exit(1)
	2158
	2159	# compute vobj local index for heap
	2160	vobj_heap_id = 0xFFFFFFFF
	2161	for vseg in vspace.vsegs:
	2162	if ( vseg.vobjs[0].name == self.heapname ):
	2163	vobj_heap_id = vseg.vobjs[0].index
	2164	if ( vobj_heap_id == 0xFFFFFFFF ):
[348]	2165	print '[genmap error] in Task.cbin() : heapname %s not found for task %s in vspace %s' \
[319]	2166	% ( self.heapname, self.name, vspace.name )
	2167	sys.exit(1)
	2168
	2169	byte_stream = bytearray()
	2170	byte_stream += mapping.str2bytes( 32, self.name ) # task name in vspace
	2171	byte_stream += mapping.int2bytes( 4, cluster_id ) # cluster global index
	2172	byte_stream += mapping.int2bytes( 4, self.p ) # processor local index in cluster
	2173	byte_stream += mapping.int2bytes( 4, self.trdid ) # thread local index in vspace
	2174	byte_stream += mapping.int2bytes( 4, vobj_stack_id ) # stack vobj local index
	2175	byte_stream += mapping.int2bytes( 4, vobj_heap_id ) # heap vobj local index
[406]	2176	byte_stream += mapping.int2bytes( 4, self.startid ) # index in start vector
	2177	byte_stream += mapping.int2bytes( 4, self.usetty ) # TTY channel required
	2178	byte_stream += mapping.int2bytes( 4, self.usenic ) # NIC channel required
	2179	byte_stream += mapping.int2bytes( 4, self.usecma ) # CMA channel required
	2180	byte_stream += mapping.int2bytes( 4, self.usehba ) # IOC channel required
[319]	2181	byte_stream += mapping.int2bytes( 4, self.usetim ) # TIM channel required
	2182
	2183	if ( verbose ):
	2184	print 'clusterid = %d' % cluster_id
	2185	print 'lpid = %d' % self.p
[406]	2186	print 'trdid = %d' % self.trdid
	2187	print 'stackid = %d' % vobj_stack_id
	2188	print 'heapid = %d' % vobj_heap_id
	2189	print 'startid = %d' % self.startid
	2190
[319]	2191	return byte_stream
	2192
	2193	###########################################################################################
[305]	2194	class Vseg( object ):
[319]	2195	###########################################################################################
[406]	2196	def __init__( self,
	2197	name,
	2198	vbase,
	2199	mode,
	2200	x,
	2201	y,
	2202	psegname,
[348]	2203	identity = False,
[411]	2204	local = False,
	2205	big = False ):
[305]	2206
[319]	2207	assert mode in VSEGMODES
	2208
[348]	2209	self.index = 0 # global index ( set by addVseg() )
	2210	self.name = name # vseg name
[406]	2211	self.vbase = vbase & 0xFFFFFFFF # virtual base address in vspace
[348]	2212	self.mode = mode # CXWU access rights
[406]	2213	self.x = x # x coordinate of destination cluster
[348]	2214	self.y = y # y coordinate of destination cluster
	2215	self.psegname = psegname # name of pseg in destination cluster
	2216	self.identity = identity # identity mapping required
[411]	2217	self.local = local # only mapped in local PTAB when true
	2218	self.big = big # to be mapped in a big physical page
[348]	2219	self.vobjs = []
[305]	2220	return
	2221
[319]	2222	################
[406]	2223	def xml( self ): # xml for one vseg
[319]	2224
	2225	s = ' <vseg name="%s" vbase="0x%x" mode="%s" x="%d" y="%d" psegname="%s"' \
	2226	% ( self.name, self.vbase, self.mode, self.x, self.y, self.psegname )
[348]	2227	if ( self.identity ): s += ' ident="1"'
	2228	if ( self.local ): s += ' local="1"'
[411]	2229	if ( self.big ): s += ' big="1"'
[348]	2230	s += ' >\n'
	2231	for vobj in self.vobjs: s += vobj.xml()
[319]	2232	s += ' </vseg>\n'
	2233
[305]	2234	return s
	2235
[319]	2236	#############################################
	2237	def cbin( self, mapping, verbose, expected ): # C binary structure for Vseg
	2238
	2239	if ( verbose ):
	2240	print '*** cbin for vseg[%d] %s' % (self.index, self.name)
	2241
	2242	# check index
	2243	if (self.index != expected):
[348]	2244	print '[genmap error] in Vseg.cbin() : vseg global index = %d / expected = %d' \
[319]	2245	% (self.index, expected )
	2246	sys.exit(1)
	2247
	2248	# compute pseg_id
	2249	pseg_id = 0xFFFFFFFF
	2250	cluster_id = (self.x * mapping.y_size) + self.y
	2251	cluster = mapping.clusters[cluster_id]
	2252	for pseg in cluster.psegs:
	2253	if (self.psegname == pseg.name):
	2254	pseg_id = pseg.index
	2255	if (pseg_id == 0xFFFFFFFF):
[348]	2256	print '[genmap error] in Vseg.cbin() : psegname %s not found for vseg %s in cluster %d' \
[319]	2257	% ( self.psegname, self.name, cluster_id )
	2258	sys.exit(1)
	2259
	2260	# compute numerical value for mode
	2261	mode_id = 0xFFFFFFFF
[406]	2262	for x in xrange( len(VSEGMODES) ):
	2263	if ( self.mode == VSEGMODES[x] ):
[319]	2264	mode_id = x
	2265	if ( mode_id == 0xFFFFFFFF ):
[348]	2266	print '[genmap error] in Vseg.cbin() : undefined vseg mode %s' % self.mode
[319]	2267	sys.exit(1)
	2268
	2269	# compute vobj_id
[406]	2270	vobj_id = self.vobjs[0].index
[319]	2271
	2272	byte_stream = bytearray()
[406]	2273	byte_stream += mapping.str2bytes( 32, self.name ) # vseg name
[319]	2274	byte_stream += mapping.int2bytes( 4, self.vbase ) # virtual base address
	2275	byte_stream += mapping.int2bytes( 8, 0 ) # physical base address
	2276	byte_stream += mapping.int2bytes( 4, 0 ) # vseg size (bytes)
	2277	byte_stream += mapping.int2bytes( 4, pseg_id ) # physical segment global index
	2278	byte_stream += mapping.int2bytes( 4, mode_id ) # CXWU flags
	2279	byte_stream += mapping.int2bytes( 4, len(self.vobjs) ) # number of vobjs in vseg
[406]	2280	byte_stream += mapping.int2bytes( 4, vobj_id ) # first vobj global index
[411]	2281	byte_stream += mapping.int2bytes( 4, 0 ) # linked list of vsegs on pseg
[319]	2282	byte_stream += mapping.int2bytes( 1, 0 ) # mapped when non zero
[411]	2283	byte_stream += mapping.int2bytes( 1, self.identity ) # identity mapping if non zero
	2284	byte_stream += mapping.int2bytes( 1, self.local ) # only mapped in local PTAB
	2285	byte_stream += mapping.int2bytes( 1, self.big ) # to be mapped in big physical page
[319]	2286
	2287	if ( verbose ):
	2288	print 'vbase = %x' % self.vbase
	2289	print 'pseg_id = %d' % pseg_id
	2290	print 'mode = %s' % self.mode
	2291	print 'nb_vobjs = %d' % len(self.vobjs)
[406]	2292	print 'vobj_id = %d' % vobj_id
	2293
[319]	2294	return byte_stream
	2295
	2296	###########################################################################################
[305]	2297	class Vobj( object ):
[319]	2298	###########################################################################################
	2299	def __init__( self,
[406]	2300	name,
	2301	length,
	2302	vtype,
	2303	binpath = '',
	2304	align = 0,
[319]	2305	init = 0 ):
	2306
[305]	2307	assert vtype in ['ELF','BLOB','PTAB','PERI','MWMR','LOCK', \
	2308	'BUFFER','BARRIER','CONST','MEMSPACE','SCHED']
[319]	2309
	2310	assert (vtype != 'ELF') or (binpath != '')
	2311
	2312	self.index = 0 # global index ( set by addVobj() )
	2313	self.name = name # vobj name (unique in vspace)
	2314	self.vtype = vtype # vobj type (defined in mapping_info.h)
	2315	self.length = length # vobj size (bytes)
	2316	self.binpath = binpath # pathname for (ELF type)
	2317	self.align = align # required alignment (logarithm of 2)
	2318	self.init = init # initialisation value (for BARRIER or MWMR types)
	2319
[305]	2320	return
	2321
[319]	2322	################
	2323	def xml( self ): # xml for a vobj
	2324
[305]	2325	s = ' <vobj name="%s" type="%s" length="0x%x"' \
	2326	% ( self.name, self.vtype, self.length )
[319]	2327	if (self.binpath != ''): s += ' binpath="%s"' % (self.binpath)
	2328	if (self.align != 0 ): s += ' align="%d"' % (self.align)
	2329	if (self.init != 0 ): s += ' init="%d"' % (self.init)
[305]	2330	s += ' />\n'
[319]	2331
[305]	2332	return s
	2333
[319]	2334	#############################################
	2335	def cbin( self, mapping, verbose, expected ): # C binary structure for Vobj
[305]	2336
[319]	2337	# check index
	2338	if (self.index != expected):
[348]	2339	print '[genmap error] in Vobj.cbin() : vobj global index = %d / expected = %d' \
[319]	2340	% (self.index, expected )
	2341	sys.exit(1)
	2342	elif ( verbose ):
	2343	print '*** cbin for vobj[%d] %s' % (self.index, self.name)
[305]	2344
[319]	2345	# compute numerical value for vtype
	2346	vtype_int = 0xFFFFFFFF
[406]	2347	for x in xrange( len(VOBJTYPES) ):
	2348	if ( self.vtype == VOBJTYPES[x] ):
[319]	2349	vtype_int = x
	2350	if ( vtype_int == 0xFFFFFFFF ):
[348]	2351	print '[genmap error] in Vobj.cbin() : undefined vobj type %s' % self.vtype
[319]	2352	sys.exit(1)
	2353
	2354	byte_stream = bytearray()
[406]	2355	byte_stream += mapping.str2bytes( 32, self.name ) # vobj name
[319]	2356	byte_stream += mapping.str2bytes( 64, self.binpath ) # pathname for .elf file
	2357	byte_stream += mapping.int2bytes( 4 , vtype_int ) # vobj type
	2358	byte_stream += mapping.int2bytes( 4 , self.length ) # vobj size
	2359	byte_stream += mapping.int2bytes( 4 , self.align ) # required alignment
	2360	byte_stream += mapping.int2bytes( 4 , 0 ) # virtual base address
	2361	byte_stream += mapping.int2bytes( 4 , self.init ) # init value
[406]	2362
[319]	2363	if ( verbose ):
	2364	print 'binpath = %s' % self.binpath
	2365	print 'type = %s' % self.vtype
	2366	print 'length = %x' % self.length
[406]	2367
[319]	2368	return byte_stream
	2369
	2370	###########################################################################################
[305]	2371	class Processor ( object ):
[319]	2372	###########################################################################################
	2373	def __init__( self,
[406]	2374	x,
	2375	y,
[319]	2376	lpid ):
	2377
	2378	self.index = 0 # global index ( set by addProc() )
	2379	self.x = x # x cluster coordinate
	2380	self.y = y # y cluster coordinate
	2381	self.lpid = lpid # processor local index
	2382
[305]	2383	return
	2384
[319]	2385	################
[406]	2386	def xml( self ): # xml for a processor
[305]	2387	return ' <proc index="%d" />\n' % (self.lpid)
	2388
[319]	2389	#############################################
	2390	def cbin( self, mapping, verbose, expected ): # C binary structure for Proc
	2391
	2392	if ( verbose ):
	2393	print '*** cbin for proc %d in cluster (%d,%d)' % (self.lpid, self.x, self.y)
	2394
	2395	# check index
	2396	if (self.index != expected):
[348]	2397	print '[genmap error] in Proc.cbin() : proc global index = %d / expected = %d' \
[319]	2398	% (self.index, expected )
	2399	sys.exit(1)
	2400
	2401	byte_stream = bytearray()
	2402	byte_stream += mapping.int2bytes( 4 , self.lpid ) # local index
[406]	2403
[319]	2404	return byte_stream
	2405
	2406	###########################################################################################
[305]	2407	class Pseg ( object ):
[319]	2408	###########################################################################################
[406]	2409	def __init__( self,
	2410	name,
	2411	base,
	2412	size,
[319]	2413	x,
	2414	y,
	2415	segtype ):
	2416
	2417	assert( segtype in PSEGTYPES )
	2418
	2419	self.index = 0 # global index ( set by addPseg() )
	2420	self.name = name # pseg name (unique in cluster)
	2421	self.base = base # physical base address
	2422	self.size = size # segment size (bytes)
[406]	2423	self.x = x # cluster x coordinate
	2424	self.y = y # cluster y coordinate
[319]	2425	self.segtype = segtype # RAM / PERI (defined in mapping_info.h)
	2426
[305]	2427	return
[406]	2428
[319]	2429	################
	2430	def xml( self ): # xml for a pseg
	2431
[305]	2432	return ' <pseg name="%s" type="%s" base="0x%x" length="0x%x" />\n' \
	2433	% (self.name, self.segtype, self.base, self.size)
	2434
[319]	2435	######################################################
	2436	def cbin( self, mapping, verbose, expected, cluster ): # C binary structure for Pseg
	2437
	2438	if ( verbose ):
	2439	print '*** cbin for pseg[%d] %s in cluster[%d,%d]' \
	2440	% (self.index, self.name, cluster.x, cluster.y)
	2441
	2442	# check index
	2443	if (self.index != expected):
[348]	2444	print '[genmap error] in Pseg.cbin() : pseg global index = %d / expected = %d' \
[319]	2445	% (self.index, expected )
	2446	sys.exit(1)
[406]	2447
[319]	2448	# compute numerical value for segtype
	2449	segtype_int = 0xFFFFFFFF
[406]	2450	for x in xrange( len(PSEGTYPES) ):
	2451	if ( self.segtype == PSEGTYPES[x] ):
[319]	2452	segtype_int = x
	2453	if ( segtype_int == 0xFFFFFFFF ):
[348]	2454	print '[genmap error] in Pseg.cbin() : undefined segment type %s' % self.segtype
[319]	2455	sys.exit(1)
	2456
	2457	byte_stream = bytearray()
[406]	2458	byte_stream += mapping.str2bytes( 32, self.name ) # pseg name
[319]	2459	byte_stream += mapping.int2bytes( 8 , self.base ) # physical base address
	2460	byte_stream += mapping.int2bytes( 8 , self.size ) # segment length
	2461	byte_stream += mapping.int2bytes( 4 , segtype_int ) # segment type
	2462	byte_stream += mapping.int2bytes( 4 , cluster.index ) # cluster global index
[406]	2463	byte_stream += mapping.int2bytes( 4 , 0 ) # linked list of vsegs
[319]	2464
	2465	if ( verbose ):
	2466	print 'pbase = %x' % self.base
	2467	print 'size = %x' % self.size
	2468	print 'type = %s' % self.segtype
[406]	2469
[319]	2470	return byte_stream
	2471
	2472	###########################################################################################
	2473	class Periph ( object ):
	2474	###########################################################################################
[406]	2475	def __init__( self,
[319]	2476	pseg, # associated pseg
	2477	ptype, # peripheral type
	2478	subtype = 'NONE', # peripheral subtype
	2479	channels = 1, # for multi-channels peripherals
	2480	arg = 0 ): # optional argument (semantic depends on ptype)
	2481
	2482	assert ptype in PERIPHTYPES
	2483
	2484	assert subtype in PERIPHSUBTYPES
	2485
	2486	self.index = 0 # global index ( set by addPeriph() )
[406]	2487	self.channels = channels
	2488	self.ptype = ptype
	2489	self.subtype = subtype
[319]	2490	self.arg = arg
	2491	self.pseg = pseg
	2492	self.irqs = []
[305]	2493	return
	2494
[319]	2495	################
	2496	def xml( self ): # xml for a periph
	2497
	2498	s = ' <periph type="%s"' % self.ptype
	2499	s += ' subtype="%s"' % self.subtype
	2500	s += ' psegname="%s"' % self.pseg.name
	2501	s += ' channels="%d"' % self.channels
	2502	s += ' arg="%d" >\n' % self.arg
	2503	if ( (self.ptype == 'PIC') or (self.ptype == 'XCU') or (self.ptype == 'ICU') ):
	2504	for irq in self.irqs: s += irq.xml()
[305]	2505	s += ' </periph>\n'
[319]	2506
[305]	2507	return s
	2508
[319]	2509	#############################################
	2510	def cbin( self, mapping, verbose, expected ): # C binary structure for Periph
[305]	2511
[319]	2512	if ( verbose ):
	2513	print '*** cbin for periph %s in cluster [%d,%d]' \
	2514	% (self.ptype, self.pseg.x, self.pseg.y)
[305]	2515
[319]	2516	# check index
	2517	if (self.index != expected):
[348]	2518	print '[genmap error] in Periph.cbin() : periph global index = %d / expected = %d' \
[319]	2519	% (self.index, expected )
	2520	sys.exit(1)
[305]	2521
[319]	2522	# compute pseg global index
	2523	pseg_id = self.pseg.index
[305]	2524
[319]	2525	# compute first irq global index
	2526	if ( len(self.irqs) > 0 ):
	2527	irq_id = self.irqs[0].index
	2528	else:
	2529	irq_id = 0
[305]	2530
[319]	2531	# compute numerical value for ptype
	2532	ptype_id = 0xFFFFFFFF
[406]	2533	for x in xrange( len(PERIPHTYPES) ):
[319]	2534	if ( self.ptype == PERIPHTYPES[x] ): ptype_id = x
	2535	if ( ptype_id == 0xFFFFFFFF ):
[348]	2536	print '[genmap error] in Periph.cbin() : undefined peripheral type %s' % self.ptype
[319]	2537	sys.exit(1)
[305]	2538
[319]	2539	# compute numerical value for subtype
	2540	subtype_id = 0xFFFFFFFF
[406]	2541	for x in xrange( len(PERIPHSUBTYPES) ):
[319]	2542	if ( self.subtype == PERIPHSUBTYPES[x] ): subtype_id = x
[305]	2543
[319]	2544	# compute
	2545	byte_stream = bytearray()
[406]	2546	byte_stream += mapping.int2bytes( 4 , ptype_id ) # peripheral type
[319]	2547	byte_stream += mapping.int2bytes( 4 , subtype_id ) # peripheral subtype
[406]	2548	byte_stream += mapping.int2bytes( 4 , pseg_id ) # pseg global index
[319]	2549	byte_stream += mapping.int2bytes( 4 , self.channels ) # number of channels
	2550	byte_stream += mapping.int2bytes( 4 , self.arg ) # optionnal argument
[406]	2551	byte_stream += mapping.int2bytes( 4 , len( self.irqs ) ) # number of input irqs
	2552	byte_stream += mapping.int2bytes( 4 , irq_id ) # first irq global index
[305]	2553
[319]	2554	if ( verbose ):
	2555	print 'ptype = %d' % ptype_id
	2556	print 'pseg_id = %d' % pseg_id
	2557	print 'nb_irqs = %d' % len( self.irqs )
[406]	2558	print 'irq_id = %d' % irq_id
[319]	2559	return byte_stream
[305]	2560
[319]	2561	###########################################################################################
	2562	class Irq ( object ):
	2563	###########################################################################################
[406]	2564	def __init__( self,
[319]	2565	irqtype, # input IRQ type : HWI / WTI / PTI (for XCU only)
	2566	srcid, # input IRQ index (for XCU or PIC)
	2567	isrtype, # Type of ISR to be executed
	2568	channel = 0 ): # channel index for multi-channel ISR
[305]	2569
[319]	2570	assert irqtype in IRQTYPES
	2571	assert isrtype in ISRTYPES
	2572	assert srcid < 32
[305]	2573
[319]	2574	self.index = 0 # global index ( set by addIrq() )
[406]	2575	self.irqtype = irqtype # IRQ type
[319]	2576	self.srcid = srcid # source IRQ index
[406]	2577	self.isrtype = isrtype # ISR type
[319]	2578	self.channel = channel # channel index (for multi-channels ISR)
[305]	2579	return
	2580
[319]	2581	################
	2582	def xml( self ): # xml for Irq
[305]	2583
[319]	2584	return ' <irq srctype="%s" srcid="%d" isr="%s" channel="%d" />\n' \
	2585	% ( self.irqtype, self.srcid, self.isrtype, self.channel )
[305]	2586
[319]	2587	#############################################
	2588	def cbin( self, mapping, verbose, expected ): # C binary structure for Irq
[305]	2589
[319]	2590	if ( verbose ):
[406]	2591	print '*** cbin for irq[%d]' % (self.index)
[305]	2592
[319]	2593	# check index
	2594	if (self.index != expected):
[348]	2595	print '[genmap error] in Irq.cbin() : irq global index = %d / expected = %d' \
[319]	2596	% (self.index, expected )
	2597	sys.exit(1)
[305]	2598
[319]	2599	# compute numerical value for irqtype
	2600	irqtype_id = 0xFFFFFFFF
	2601	for x in xrange( len(IRQTYPES) ):
[406]	2602	if ( self.irqtype == IRQTYPES[x] ):
[319]	2603	irqtype_id = x
	2604	if ( irqtype_id == 0xFFFFFFFF ):
[348]	2605	print '[genmap error] in Irq.cbin() : undefined irqtype %s' % self.irqtype
[319]	2606	sys.exit(1)
[305]	2607
[319]	2608	# compute numerical value for isrtype
	2609	isrtype_id = 0xFFFFFFFF
[406]	2610	for x in xrange( len(ISRTYPES) ):
	2611	if ( self.isrtype == ISRTYPES[x] ):
[319]	2612	isrtype_id = x
	2613	if ( isrtype_id == 0xFFFFFFFF ):
[348]	2614	print '[genmap error] in Irq.cbin() : undefined isrtype %s' % self.isrtype
[319]	2615	sys.exit(1)
	2616
	2617	byte_stream = bytearray()
	2618	byte_stream += mapping.int2bytes( 4, irqtype_id )
	2619	byte_stream += mapping.int2bytes( 4, self.srcid )
	2620	byte_stream += mapping.int2bytes( 4, isrtype_id )
	2621	byte_stream += mapping.int2bytes( 4, self.channel )
	2622	byte_stream += mapping.int2bytes( 4, 0 )
	2623	byte_stream += mapping.int2bytes( 4, 0 )
	2624
	2625	if ( verbose ):
	2626	print 'irqtype = %s' % self.irqtype
	2627	print 'srcid = %d' % self.srcid
	2628	print 'isrtype = %s' % self.isrtype
	2629	print 'channel = %d' % self.channel
	2630
	2631	return byte_stream
	2632
	2633	###########################################################################################
	2634	class Coproc ( object ):
	2635	###########################################################################################
[406]	2636	def __init__( self,
	2637	pseg ): # associated pseg
[319]	2638
	2639	self.index = 0 # global index value set by addCoproc()
	2640	self.pseg = pseg
	2641	self.ports = []
	2642
[305]	2643	return
	2644
[319]	2645	################
[406]	2646	def xml( self ): # xml for Coproc
[305]	2647
[348]	2648	print '[genmap error] in Coproc.xml() : not defined yet'
[319]	2649	sys.exit(1)
	2650
[406]	2651	return
[319]	2652
	2653	#############################################
	2654	def cbin( self, mapping, verbose, expected ): # C binary structure for Coproc
	2655
	2656	if ( verbose ):
	2657	print '*** cbin for coproc in cluster (%d,%d)' % (self.pseg.x, self.pseg.y)
	2658
	2659	# check index
	2660	if (self.index != expected):
[348]	2661	print '[genmap error] in Coproc.cbin() : coproc global index = %d / expected = %d' \
[319]	2662	% (self.index, expected )
	2663	sys.exit(1)
	2664
	2665	# compute pseg global index
	2666	pseg_id = self.pseg.index
	2667
	2668	# compute first port global index
	2669	port_id = self.ports[0].index
	2670
	2671	byte_stream = bytearray()
	2672	byte_stream += mapping.str2bytes( 32, self.pseg.name ) # probablement inutile (AG)
[406]	2673	byte_stream += mapping.int2bytes( 4 , pseg_id ) # pseg global index
	2674	byte_stream += mapping.int2bytes( 4 , len( self.ports ) ) # number of input irqs
	2675	byte_stream += mapping.int2bytes( 4 , port_id ) # first port global index
	2676
[319]	2677	if ( verbose ):
	2678	print 'irqtype = %s' % self.irqtype
	2679	print 'pseg_id = %d' % pseg_id
	2680	print 'nb_ports = %d' % len( self.ports )
	2681	print 'port_id %d' % port_id
[406]	2682
[319]	2683	return byte_stream
	2684
	2685	###########################################################################################
	2686	class Cpport ( object ):
	2687	###########################################################################################
[406]	2688	def __init__( self,
	2689	direction,
	2690	vspacename,
[319]	2691	mwmrname ):
	2692
	2693	self.index = 0 # global index ( set by addCpport() )
	2694	self.direction = direction # TO_COPROC / FROM_COPROC
	2695	self.vspacename = vspacename # name of vspace containing mwmr channel
	2696	self.mwmrname = mwmrname # name of vobj defining mwmr channel
	2697
[305]	2698	return
	2699
[319]	2700	################
	2701	def xml( self ): # xml for Cpport
[305]	2702
[348]	2703	print '[genmap error] in Cpport.xml() : not defined yet'
[319]	2704	sys.exit(1)
[305]	2705
[406]	2706	return
[319]	2707
	2708	#############################################
	2709	def cbin( self, mapping, verbose, expected ): # C binary structure for Cpport
	2710
	2711	if ( verbose ):
	2712	print '*** cbin for cpport[%d]' % (self.index)
	2713
	2714	# check index
	2715	if ( self.index != expected ):
[348]	2716	print '[genmap error] in Cpport.cbin() : port global index = %d / expected = %d' \
[319]	2717	% ( self.index, expected )
	2718	sys.exit(1)
	2719
	2720	# compute numerical value for direction
	2721	if ( self.direction == 'TO_COPROC' ):
	2722	dir_int = 0
	2723	else:
	2724	dir_int = 1
	2725
	2726	# compute vspace global index
	2727	vspace_id = 0xFFFFFFFF
	2728	for vspace in mapping.vspaces:
[406]	2729	if ( self.vspacename == vspace.name ):
[319]	2730	vspace_id = vspace.index
	2731	if (vspace_id == 0xFFFFFFFF):
[348]	2732	print '[genmap error] in Cpport.cbin() : vspace name %s not found' \
[319]	2733	% ( self.vspacename )
	2734	sys.exit(1)
	2735
	2736	# compute mwmr global index
	2737	mwmr_id = 0xFFFFFFFF
	2738	for vseg in mapping.vspace[vspace_id].vsegs:
	2739	for vobj in vseg.vobjs:
[406]	2740	if (self.mwmrname == vobj.name):
[319]	2741	mwmr_id = vobj.index
	2742	if (mwmr_id == 0xFFFFFFFF):
[348]	2743	print '[genmap error] in Cpport.cbin() : mwmr vobj name %s not found in vspace %s' \
[319]	2744	% ( self.mwmrname, self.vspacename )
	2745	sys.exit(1)
	2746
	2747	byte_stream = bytearray()
[406]	2748	byte_stream += mapping.int2bytes( 4 , dir_int ) # pseg global index
	2749	byte_stream += mapping.int2bytes( 4 , vspace_id ) # vspace global index
	2750	byte_stream += mapping.int2bytes( 4 , mwmr_id ) # mwmr vobj global index
	2751
[319]	2752	if ( verbose ):
	2753	print 'direction = %s' % self.direction
	2754	print 'vspace_id = %d' % vspace_id
	2755	print 'mwmr_id = %d' % mwmr_id
	2756
	2757	return byte_stream
	2758
	2759
[305]	2760	# Local Variables:
	2761	# tab-width: 4;
	2762	# c-basic-offset: 4;
	2763	# c-file-offsets:((innamespace . 0)(inline-open . 0));
	2764	# indent-tabs-mode: nil;
	2765	# End:
	2766	#
	2767	# vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
	2768

Note: See TracBrowser for help on using the repository browser.

Download in other formats: