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source: soft/giet_vm/giet_python/mapping.py @ 519

Last change on this file since 519 was 517, checked in by porquet, 10 years ago
genmap: the vci_block_device is tsar specific
Property svn:executable set to ``*
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Rev	Line
[425]	1	#!/usr/bin/env python
[305]	2
[319]	3	import sys
	4
[512]	5	########################################################################################
[305]	6	# file : giet_mapping.py
	7	# date : april 2014
	8	# author : Alain Greiner
[512]	9	########################################################################################
[319]	10	# This file contains the classes required to define a mapping for the GIET_VM.
	11	# - A 'Mapping' contains a set of 'Cluster' (hardware architecture)
[512]	12	# a set of 'Vseg' (kernel virtual segments, called globals)
	13	# a set of 'Vspace' (one or several user applications).
	14	# - A 'Cluster' contains a set of 'Pseg' (physical segments in cluster)
[319]	15	# a set of 'Proc' (processors in cluster)
	16	# a set of 'Periph' (peripherals in cluster)
	17	# a set of 'Coproc' (coprocessors in cluster)
[512]	18	# - A 'Vspace' contains a set of 'Vseg' (user virtual segments)
	19	# a set of 'Task' (user parallel tasks)
[441]	20	# - A 'Periph' contains a set of 'Irq' (only for XCU and PIC types )
[319]	21	# - A 'Coproc' contains a set of 'Cpports' (one port per MWMR channel)
[512]	22	########################################################################################
[319]	23	# Implementation Note
[512]	24	# The objects used to describe a mapping are distributed in the PYTHON structure:
[319]	25	# For example the psegs set is split in several subsets (one subset per cluster),
	26	# or the tasks set is split in several subsets (one subset per vspace), etc...
	27	# In the C binary data structure used by the giet_vm, all objects of same type
[406]	28	# are stored in a linear array (one single array for all psegs for example).
[512]	29	# For all objects, we compute and store in the PYTHON object itself a "global index"
[406]	30	# corresponding to the index in this global array, and this index can be used as
[319]	31	# a pseudo-pointer to identify a specific object of a given type.
[512]	32	########################################################################################
[305]	33
[512]	34	########################################################################################
[411]	35	# Various constants
[512]	36	########################################################################################
[411]	37
	38	PADDR_WIDTH = 40 # number of bits for physical address
	39	X_WIDTH = 4 # number of bits encoding x coordinate
	40	Y_WIDTH = 4 # number of bits encoding y coordinate
	41	P_WIDTH = 4 # number of bits encoding local proc_id
	42	VPN_ANTI_MASK = 0x00000FFF # mask virtual address to get offset in a small page
	43	BPN_MASK = 0xFFE00000 # mask virtual address to get the BPN (big page)
	44	PERI_INCREMENT = 0x10000 # virtual address increment for replicated global vsegs
	45	RESET_ADDRESS = 0xBFC00000 # Processor wired boot_address
	46	MAPPING_SIGNATURE = 0xDACE2014 # Magic number indicating a valid C binary struture
	47
[512]	48	########################################################################################
[411]	49	# These global lists must be consistent with enums in mapping_info.h or irq_handler.
[512]	50	########################################################################################
[319]	51	PERIPHTYPES = [
	52	'CMA',
	53	'DMA',
	54	'FBF',
	55	'IOB',
	56	'IOC',
	57	'MMC',
	58	'MWR',
	59	'NIC',
	60	'ROM',
	61	'SIM',
	62	'TIM',
	63	'TTY',
	64	'XCU',
	65	'PIC',
[491]	66	'DROM',
[319]	67	]
	68
	69	PERIPHSUBTYPES = [
	70	'BDV',
	71	'HBA',
	72	'SPI',
	73	'NONE',
	74	]
	75
	76	IRQTYPES = [
	77	'HWI',
	78	'WTI',
	79	'PTI',
	80	]
	81
	82	ISRTYPES = [
	83	'ISR_DEFAULT',
	84	'ISR_TICK',
	85	'ISR_TTY_RX',
	86	'ISR_TTY_TX',
	87	'ISR_BDV',
	88	'ISR_TIMER',
	89	'ISR_WAKUP',
	90	'ISR_NIC_RX',
	91	'ISR_NIC_TX',
	92	'ISR_CMA',
	93	'ISR_MMC',
	94	'ISR_DMA',
	95	'ISR_SPI',
	96	]
	97
[512]	98	VSEGTYPES = [
[319]	99	'ELF',
	100	'BLOB',
	101	'PTAB',
	102	'PERI',
[512]	103	'MWMR', # deprecated
	104	'LOCK', # deprecated
[319]	105	'BUFFER',
[512]	106	'BARRIER', # deprecated
	107	'CONST', # deprecated
	108	'MEMSPACE', # deprecated
	109	'SCHED',
[471]	110	'HEAP',
[319]	111	]
	112
	113	VSEGMODES = [
	114	'____',
	115	'___U',
	116	'__W_',
	117	'__WU',
	118	'_X__',
	119	'_X_U',
	120	'_XW_',
	121	'_XWU',
	122	'C___',
	123	'C__U',
	124	'C_W_',
	125	'C_WU',
	126	'CX__',
	127	'CX_U',
	128	'CXW_',
	129	'CXWU',
	130	]
	131
	132	PSEGTYPES = [
	133	'RAM',
	134	'ROM', # deprecated => use PERI
	135	'PERI',
	136	]
	137
	138	CP_PORT_DIRS = [
	139	'TO_COPROC',
	140	'FROM_COPROC',
	141	]
	142
[512]	143	#######################################################################################
[305]	144	class Mapping( object ):
[512]	145	#######################################################################################
[305]	146	def __init__( self,
[411]	147	name, # mapping name
	148	x_size, # number of clusters in a row
	149	y_size, # number of clusters in a column
[421]	150	nprocs, # max number of processors per cluster
[411]	151	x_width = X_WIDTH, # number of bits encoding x coordinate
	152	y_width = Y_WIDTH, # number of bits encoding y coordinate
[512]	153	p_width = P_WIDTH, # number of bits encoding lpid
[411]	154	paddr_width = PADDR_WIDTH, # number of bits for physical address
[512]	155	coherence = 1, # hardware cache coherence if non-zero
[411]	156	irq_per_proc = 1, # number or IRQs from XCU to processor
	157	use_ramdisk = False, # use ramdisk when true
	158	x_io = 0, # cluster_io x coordinate
	159	y_io = 0, # cluster_io y coordinate
	160	peri_increment = PERI_INCREMENT, # address increment for globals
	161	reset_address = RESET_ADDRESS, # Processor wired boot_address
	162	ram_base = 0, # RAM physical base in cluster[0,0]
	163	ram_size = 0 ): # RAM size in each cluster (bytes)
[305]	164
[411]	165	assert ( x_size <= (1<<X_WIDTH) )
	166	assert ( y_size <= (1<<Y_WIDTH) )
	167	assert ( nprocs <= (1<<P_WIDTH) )
[406]	168
[411]	169	self.signature = MAPPING_SIGNATURE
[319]	170	self.name = name
[497]	171	self.name = name
[406]	172	self.paddr_width = paddr_width
[319]	173	self.coherence = coherence
	174	self.x_size = x_size
	175	self.y_size = y_size
[441]	176	self.nprocs = nprocs
[319]	177	self.x_width = x_width
	178	self.y_width = y_width
[406]	179	self.p_width = p_width
[319]	180	self.irq_per_proc = irq_per_proc
	181	self.use_ramdisk = use_ramdisk
	182	self.x_io = x_io
	183	self.y_io = y_io
[328]	184	self.peri_increment = peri_increment
[319]	185	self.reset_address = reset_address
[356]	186	self.ram_base = ram_base
	187	self.ram_size = ram_size
[305]	188
[319]	189	self.total_vspaces = 0
	190	self.total_globals = 0
	191	self.total_psegs = 0
	192	self.total_vsegs = 0
	193	self.total_tasks = 0
	194	self.total_procs = 0
	195	self.total_irqs = 0
	196	self.total_coprocs = 0
	197	self.total_cpports = 0
	198	self.total_periphs = 0
[305]	199
[319]	200	self.clusters = []
	201	self.globs = []
	202	self.vspaces = []
[305]	203
[319]	204	for x in xrange( self.x_size ):
	205	for y in xrange( self.y_size ):
	206	cluster = Cluster( x , y )
[406]	207	cluster.index = (x * self.y_size) + y
[319]	208	self.clusters.append( cluster )
[305]	209
	210	return
	211
[319]	212	########################## add a ram pseg in a cluster
[406]	213	def addRam( self,
[319]	214	name, # pseg name
	215	base, # pseg base address
	216	size ): # pseg length (bytes)
[406]	217
[497]	218	# computes cluster index and coordinates from the base address
[356]	219	paddr_lsb_width = self.paddr_width - self.x_width - self.y_width
	220	cluster_xy = base >> paddr_lsb_width
[497]	221	x = cluster_xy >> (self.y_width);
	222	y = cluster_xy & ((1 << self.y_width) - 1)
	223	cluster_id = (x * self.y_size) + y
[305]	224
[411]	225	assert (base & VPN_ANTI_MASK) == 0
[319]	226
	227	assert (x < self.x_size) and (y < self.y_size)
[406]	228
[356]	229	assert ( (base & ((1<<paddr_lsb_width)-1)) == self.ram_base )
	230
	231	assert ( size == self.ram_size )
	232
[319]	233	# add one pseg in the mapping
	234	pseg = Pseg( name, base, size, x, y, 'RAM' )
	235	self.clusters[cluster_id].psegs.append( pseg )
	236	pseg.index = self.total_psegs
	237	self.total_psegs += 1
	238
	239	return pseg
	240
[512]	241	########################## add a peripheral and the associated pseg in a cluster
[406]	242	def addPeriph( self,
[319]	243	name, # associated pseg name
	244	base, # associated pseg base address
	245	size, # associated pseg length (bytes)
[406]	246	ptype, # peripheral type
[319]	247	subtype = 'NONE', # peripheral subtype
	248	channels = 1, # number of channels
	249	arg = 0 ): # optional argument (semantic depends on ptype)
	250
[497]	251	# computes cluster index and coordinates from the base address
[319]	252	cluster_xy = base >> (self.paddr_width - self.x_width - self.y_width)
[497]	253	x = cluster_xy >> (self.y_width);
	254	y = cluster_xy & ((1 << self.y_width) - 1)
	255	cluster_id = (x * self.y_size) + y
[305]	256
[319]	257	assert (x < self.x_size) and (y < self.y_size)
	258
[411]	259	assert (base & VPN_ANTI_MASK) == 0
[319]	260
	261	assert ptype in PERIPHTYPES
	262
	263	assert subtype in PERIPHSUBTYPES
	264
	265	# add one pseg into mapping
	266	pseg = Pseg( name, base, size, x, y, 'PERI' )
	267	self.clusters[cluster_id].psegs.append( pseg )
	268	pseg.index = self.total_psegs
	269	self.total_psegs += 1
	270
	271	# add one periph into mapping
[406]	272	periph = Periph( pseg, ptype, subtype, channels, arg )
[319]	273	self.clusters[cluster_id].periphs.append( periph )
	274	periph.index = self.total_periphs
	275	self.total_periphs += 1
	276
	277	return periph
	278
	279	################################ add an IRQ in a peripheral
	280	def addIrq( self,
	281	periph, # peripheral containing IRQ (PIC or XCU)
	282	index, # peripheral input port index
	283	isrtype, # ISR type
	284	channel = 0 ): # channel for multi-channels ISR
	285
	286	assert isrtype in ISRTYPES
	287
	288	assert index < 32
	289
[406]	290	# add one irq into mapping
[319]	291	irq = Irq( 'HWI', index , isrtype, channel )
	292	periph.irqs.append( irq )
	293	irq.index = self.total_irqs
	294	self.total_irqs += 1
	295
	296	return irq
	297
	298	########################## add a processor in a cluster
[406]	299	def addProc( self,
[319]	300	x, # cluster x coordinate
	301	y, # cluster y coordinate
	302	p ): # processor local index
	303
	304	assert (x < self.x_size) and (y < self.y_size)
	305
	306	cluster_id = (x * self.y_size) + y
	307
[406]	308	# add one proc into mapping
[319]	309	proc = Processor( x, y, p )
	310	self.clusters[cluster_id].procs.append( proc )
	311	proc.index = self.total_procs
[305]	312	self.total_procs += 1
	313
[319]	314	return proc
	315
	316	############################## add a coprocessor in a cluster
[406]	317	def addCoproc( self,
[319]	318	name, # associated pseg name
	319	base, # associated pseg base address
	320	size ): # associated pseg length
[406]	321
[319]	322	# check cluster coordinates (obtained from the base address)
	323	cluster_xy = base >> (self.paddr_width - self.x_width - self.y_width)
	324	x = cluster_xy >> (self.y_width);
[406]	325	y = cluster_xy & ((1 << self.y_width) - 1)
[319]	326
	327	assert (x < self.x_size) and (y < self.y_size)
	328
	329	cluster_id = (x * self.y_size) + y
	330
	331	# add one pseg into mapping
	332	pseg = Pseg( name, base, size, x, y, 'PERI' )
	333	self.clusters[cluster_id].psegs.append( pseg )
	334	pseg.index = self.total_psegs
	335	self.total_psegs += 1
	336
	337	# add one coproc into mapping
[406]	338	periph = Coproc( pseg )
[319]	339	self.clusters[cluster_id].coprocs.append( coproc )
	340	periph.index = self.total_coprocs
	341	self.total_coprocs += 1
	342
	343	return coproc
	344
[406]	345	################################## add a port in a coprocessor
	346	def addPort( self,
[319]	347	coproc, # coprocessor containing the port
	348	direction, # direction (TO_COPROC / FROM_COPROC)
	349	vspacename, # name of vspace using the coproc
[512]	350	mwmrname ): # name of the vseg containing the MWMR channel
[319]	351
	352	assert direction in CP_PORT_DIRS
	353
	354	# add one cpport into mapping
	355	port = Cpport( direction, vspacename, mwmrname )
	356	coproc.ports.append( port )
	357	port.index = self.total_cpports
	358	self.total_cpports += 1
	359
	360	return port
	361
[411]	362	############################ add one global vseg into mapping
	363	def addGlobal( self,
	364	name, # vseg name
	365	vbase, # virtual base address
[512]	366	length, # vseg length (bytes)
[411]	367	mode, # CXWU flags
[512]	368	vtype, # vseg type
[411]	369	x, # destination x coordinate
	370	y, # destination y coordinate
	371	pseg, # destination pseg name
	372	identity = False, # identity mapping required if true
	373	local = False, # only mapped in local PTAB if true
[512]	374	big = False, # to be mapped in a big physical page
	375	binpath = '' ): # pathname for binary code if required
[319]	376
[411]	377	# two global vsegs must not overlap if they have different names
	378	for prev in self.globs:
[512]	379	if ( ((prev.vbase + prev.length) > vbase ) and
	380	((vbase + length) > prev.vbase) and
[411]	381	(prev.name != name) ):
[512]	382	print '[genmap error] in addGlobal()'
	383	print ' global vseg %s overlap %s' % (name, prev.name)
	384	print ' %s : base = %x / size = %x' %( name, vbase, size )
	385	print ' %s : base = %x / size = %x' %( prev.name, prev.vbase, prev.size )
[411]	386	sys.exit(1)
	387
[328]	388	# add one vseg into mapping
[512]	389	vseg = Vseg( name, vbase, length, mode, vtype, x, y, pseg,
	390	identity = identity, local = local, big = big, binpath = binpath )
[348]	391
[328]	392	self.globs.append( vseg )
	393	self.total_globals += 1
[406]	394	vseg.index = self.total_vsegs
[328]	395	self.total_vsegs += 1
[406]	396
[305]	397	return
	398
[319]	399	################################ add a vspace into mapping
[406]	400	def addVspace( self,
[319]	401	name, # vspace name
[512]	402	startname ): # name of vseg containing start_vector
[319]	403
	404	# add one vspace into mapping
	405	vspace = Vspace( name, startname )
[305]	406	self.vspaces.append( vspace )
[319]	407	vspace.index = self.total_vspaces
	408	self.total_vspaces += 1
	409
	410	return vspace
[406]	411
[512]	412	################################# add a private vseg in a vspace
[319]	413	def addVseg( self,
[406]	414	vspace, # vspace containing the vseg
[319]	415	name, # vseg name
	416	vbase, # virtual base address
[512]	417	length, # vseg length (bytes)
[319]	418	mode, # CXWU flags
[512]	419	vtype, # vseg type
[319]	420	x, # destination x coordinate
	421	y, # destination y coordinate
	422	pseg, # destination pseg name
[411]	423	local = False, # only mapped in local PTAB if true
[512]	424	big = False, # to be mapped in a big physical page
	425	binpath = '' ): # pathname for binary code
[319]	426
	427	assert mode in VSEGMODES
	428
[512]	429	assert vtype in VSEGTYPES
[319]	430
	431	assert (x < self.x_size) and (y < self.y_size)
	432
	433	# add one vseg into mapping
[512]	434	vseg = Vseg( name, vbase, length, mode, vtype, x, y, pseg,
	435	identity = False, local = local, big = big, binpath = binpath )
[319]	436	vspace.vsegs.append( vseg )
	437	vseg.index = self.total_vsegs
	438	self.total_vsegs += 1
	439
	440	return vseg
	441
[406]	442	################################ add a task in a vspace
	443	def addTask( self,
[319]	444	vspace, # vspace containing task
	445	name, # task name
	446	trdid, # task index in vspace
	447	x, # destination x coordinate
	448	y, # destination y coordinate
	449	lpid, # destination processor local index
[512]	450	stackname, # name of vseg containing stack
	451	heapname, # name of vseg containing heap
[441]	452	startid ): # index in start_vector
[406]	453
[319]	454	assert (x < self.x_size) and (y < self.y_size)
[411]	455	assert lpid < self.nprocs
[319]	456
[406]	457	# add one task into mapping
[441]	458	task = Task( name, trdid, x, y, lpid, stackname, heapname, startid )
[319]	459	vspace.tasks.append( task )
	460	task.index = self.total_tasks
	461	self.total_tasks += 1
	462
	463	return task
	464
	465	#################################
	466	def str2bytes( self, nbytes, s ): # string => nbytes_packed byte array
	467
	468	byte_stream = bytearray()
	469	length = len( s )
	470	if length < (nbytes - 1):
	471	for b in s:
	472	byte_stream.append( b )
	473	for x in xrange(nbytes-length):
	474	byte_stream.append( '\0' )
	475	else:
[512]	476	print '[genmap error] in str2bytes()'
	477	print ' string %s too long' % s
[319]	478	sys.exit(1)
	479
	480	return byte_stream
	481
	482	###################################
[406]	483	def int2bytes( self, nbytes, val ): # integer => nbytes litle endian byte array
[319]	484
	485	byte_stream = bytearray()
	486	for n in xrange( nbytes ):
	487	byte_stream.append( (val >> (n<<3)) & 0xFF )
	488
	489	return byte_stream
	490
[512]	491	################
[411]	492	def xml( self ): # compute string for map.xml file generation
[319]	493
[305]	494	s = '<?xml version="1.0"?>\n\n'
[319]	495	s += '<mapping_info signature = "0x%x"\n' % (self.signature)
[305]	496	s += ' name = "%s"\n' % (self.name)
	497	s += ' x_size = "%d"\n' % (self.x_size)
	498	s += ' y_size = "%d"\n' % (self.y_size)
	499	s += ' x_width = "%d"\n' % (self.x_width)
	500	s += ' y_width = "%d"\n' % (self.y_width)
	501	s += ' irq_per_proc = "%d"\n' % (self.irq_per_proc)
[319]	502	s += ' use_ramdisk = "%d"\n' % (self.use_ramdisk)
[305]	503	s += ' x_io = "%d"\n' % (self.x_io)
	504	s += ' y_io = "%d" >\n' % (self.y_io)
[319]	505	s += '\n'
	506
[305]	507	s += ' <clusterset>\n'
	508	for x in xrange ( self.x_size ):
	509	for y in xrange ( self.y_size ):
[406]	510	cluster_id = (x * self.y_size) + y
[319]	511	s += self.clusters[cluster_id].xml()
[305]	512	s += ' </clusterset>\n'
[319]	513	s += '\n'
	514
[305]	515	s += ' <globalset>\n'
[319]	516	for vseg in self.globs: s += vseg.xml()
[305]	517	s += ' </globalset>\n'
[319]	518	s += '\n'
	519
[305]	520	s += ' <vspaceset>\n'
[319]	521	for vspace in self.vspaces: s += vspace.xml()
[305]	522	s += ' </vspaceset>\n'
[319]	523
[305]	524	s += '</mapping_info>\n'
	525	return s
[319]	526
[512]	527	##########################
[411]	528	def cbin( self, verbose ): # C binary structure for map.bin file generation
[319]	529
	530	byte_stream = bytearray()
	531
	532	# header
	533	byte_stream += self.int2bytes(4, self.signature)
[406]	534	byte_stream += self.int2bytes(4, self.x_size)
	535	byte_stream += self.int2bytes(4, self.y_size)
	536	byte_stream += self.int2bytes(4, self.x_width)
	537	byte_stream += self.int2bytes(4, self.y_width)
	538	byte_stream += self.int2bytes(4, self.x_io)
	539	byte_stream += self.int2bytes(4, self.y_io)
	540	byte_stream += self.int2bytes(4, self.irq_per_proc)
	541	byte_stream += self.int2bytes(4, self.use_ramdisk)
	542	byte_stream += self.int2bytes(4, self.total_globals)
	543	byte_stream += self.int2bytes(4, self.total_vspaces)
	544	byte_stream += self.int2bytes(4, self.total_psegs)
	545	byte_stream += self.int2bytes(4, self.total_vsegs)
	546	byte_stream += self.int2bytes(4, self.total_tasks)
	547	byte_stream += self.int2bytes(4, self.total_procs)
	548	byte_stream += self.int2bytes(4, self.total_irqs)
	549	byte_stream += self.int2bytes(4, self.total_coprocs)
	550	byte_stream += self.int2bytes(4, self.total_cpports)
	551	byte_stream += self.int2bytes(4, self.total_periphs)
[319]	552	byte_stream += self.str2bytes(32, self.name)
	553
	554	if ( verbose ):
[406]	555	print '\n'
[319]	556	print 'name = %s' % self.name
	557	print 'signature = %x' % self.signature
	558	print 'x_size = %d' % self.x_size
	559	print 'y_size = %d' % self.y_size
	560	print 'x_width = %d' % self.x_width
	561	print 'y_width = %d' % self.y_width
[406]	562	print 'x_io = %d' % self.x_io
	563	print 'y_io = %d' % self.y_io
[319]	564	print 'irq_per_proc = %d' % self.irq_per_proc
	565	print 'use_ramdisk = %d' % self.use_ramdisk
	566	print 'total_globals = %d' % self.total_globals
[406]	567	print 'total_psegs = %d' % self.total_psegs
	568	print 'total_vsegs = %d' % self.total_vsegs
	569	print 'total_tasks = %d' % self.total_tasks
	570	print 'total_procs = %d' % self.total_procs
	571	print 'total_irqs = %d' % self.total_irqs
[319]	572	print 'total_coprocs = %d' % self.total_coprocs
	573	print 'total_cpports = %d' % self.total_cpports
	574	print 'total_periphs = %d' % self.total_periphs
[406]	575	print '\n'
[319]	576
	577	# clusters array
	578	index = 0
	579	for cluster in self.clusters:
	580	byte_stream += cluster.cbin( self, verbose, index )
	581	index += 1
	582
	583	if ( verbose ): print '\n'
	584
	585	# psegs array
	586	index = 0
	587	for cluster in self.clusters:
[406]	588	for pseg in cluster.psegs:
[319]	589	byte_stream += pseg.cbin( self, verbose, index, cluster )
	590	index += 1
	591
	592	if ( verbose ): print '\n'
	593
	594	# vspaces array
	595	index = 0
[406]	596	for vspace in self.vspaces:
	597	byte_stream += vspace.cbin( self, verbose, index )
[319]	598	index += 1
	599
	600	if ( verbose ): print '\n'
	601
	602	# vsegs array
	603	index = 0
	604	for vseg in self.globs:
	605	byte_stream += vseg.cbin( self, verbose, index )
	606	index += 1
	607	for vspace in self.vspaces:
[406]	608	for vseg in vspace.vsegs:
[319]	609	byte_stream += vseg.cbin( self, verbose, index )
	610	index += 1
	611
	612	if ( verbose ): print '\n'
	613
	614	# tasks array
	615	index = 0
	616	for vspace in self.vspaces:
[406]	617	for task in vspace.tasks:
[319]	618	byte_stream += task.cbin( self, verbose, index, vspace )
	619	index += 1
	620
	621	if ( verbose ): print '\n'
	622
	623	# procs array
	624	index = 0
	625	for cluster in self.clusters:
[406]	626	for proc in cluster.procs:
[319]	627	byte_stream += proc.cbin( self, verbose, index )
	628	index += 1
[406]	629
[319]	630	if ( verbose ): print '\n'
	631
	632	# irqs array
[406]	633	index = 0
[319]	634	for cluster in self.clusters:
	635	for periph in cluster.periphs:
	636	for irq in periph.irqs:
	637	byte_stream += irq.cbin( self, verbose, index )
	638	index += 1
	639
	640	if ( verbose ): print '\n'
	641
	642	# coprocs array
	643	index = 0
	644	for cluster in self.clusters:
[406]	645	for coproc in cluster.coprocs:
	646	byte_stream += coproc.cbin( self, verbose, index )
[319]	647	index += 1
	648
	649	if ( verbose ): print '\n'
	650
	651	# cpports array
	652	index = 0
	653	for cluster in self.clusters:
[406]	654	for coproc in cluster.coprocs:
[319]	655	for port in coproc.ports:
	656	byte_stream += port.cbin( self, verbose, index )
	657	index += 1
	658
	659	if ( verbose ): print '\n'
	660
	661	# periphs array
	662	index = 0
	663	for cluster in self.clusters:
[406]	664	for periph in cluster.periphs:
[319]	665	byte_stream += periph.cbin( self, verbose, index )
	666	index += 1
	667
	668	return byte_stream
	669	# end of cbin()
[406]	670
[411]	671	##################################################################################
	672	def giet_vsegs( self ): # compute string for giet_vsegs.ld file generation
[319]	673	# required by giet_vm compilation
	674
[406]	675	# search the vsegs required for the giet_vsegs.ld
[319]	676	boot_code_found = False
	677	boot_data_found = False
	678	kernel_uncdata_found = False
	679	kernel_data_found = False
	680	kernel_code_found = False
	681	kernel_init_found = False
	682	for vseg in self.globs:
[348]	683
[319]	684	if ( vseg.name == 'seg_boot_code' ):
[406]	685	boot_code_vbase = vseg.vbase
[512]	686	boot_code_size = vseg.length
[319]	687	boot_code_found = True
	688
[406]	689	if ( vseg.name == 'seg_boot_data' ):
	690	boot_data_vbase = vseg.vbase
[512]	691	boot_data_size = vseg.length
[319]	692	boot_data_found = True
	693
	694	if ( vseg.name == 'seg_kernel_data' ):
[406]	695	kernel_data_vbase = vseg.vbase
[512]	696	kernel_data_size = vseg.length
[319]	697	kernel_data_found = True
	698
	699	if ( vseg.name == 'seg_kernel_code' ):
[406]	700	kernel_code_vbase = vseg.vbase
[512]	701	kernel_code_size = vseg.length
[319]	702	kernel_code_found = True
	703
	704	if ( vseg.name == 'seg_kernel_init' ):
[406]	705	kernel_init_vbase = vseg.vbase
[512]	706	kernel_init_size = vseg.length
[319]	707	kernel_init_found = True
	708
	709	# check if all required vsegs have been found
[406]	710	if ( boot_code_found == False ):
[512]	711	print '[genmap error] in giet_vsegs()'
	712	print ' seg_boot_code vseg missing'
[319]	713	sys.exit()
	714
[406]	715	if ( boot_data_found == False ):
[512]	716	print '[genmap error] in giet_vsegs()'
	717	print ' seg_boot_data vseg missing'
[319]	718	sys.exit()
	719
[406]	720	if ( kernel_data_found == False ):
[512]	721	print '[genmap error] in giet_vsegs()'
	722	print ' seg_kernel_data vseg missing'
[319]	723	sys.exit()
	724
	725	if ( kernel_code_found == False ):
[512]	726	print '[genmap error] in giet_vsegs()'
	727	print ' seg_kernel_code vseg missing'
[319]	728	sys.exit()
	729
	730	if ( kernel_init_found == False ):
[512]	731	print '[genmap error] in giet_vsegs()'
	732	print ' seg_kernel_init vseg missing'
[319]	733	sys.exit()
	734
	735	# build string
[406]	736	s = '/* Generated by genmap for %s */\n' % self.name
[319]	737	s += '\n'
	738
[406]	739	s += 'boot_code_vbase = 0x%x;\n' % boot_code_vbase
	740	s += 'boot_code_size = 0x%x;\n' % boot_code_size
[319]	741	s += '\n'
[406]	742	s += 'boot_data_vbase = 0x%x;\n' % boot_data_vbase
	743	s += 'boot_data_size = 0x%x;\n' % boot_data_size
[319]	744	s += '\n'
[406]	745	s += 'kernel_code_vbase = 0x%x;\n' % kernel_code_vbase
	746	s += 'kernel_code_size = 0x%x;\n' % kernel_code_size
[319]	747	s += '\n'
[406]	748	s += 'kernel_data_vbase = 0x%x;\n' % kernel_data_vbase
	749	s += 'kernel_data_size = 0x%x;\n' % kernel_data_size
[319]	750	s += '\n'
[406]	751	s += 'kernel_init_vbase = 0x%x;\n' % kernel_init_vbase
	752	s += 'kernel_init_size = 0x%x;\n' % kernel_init_size
[319]	753	s += '\n'
	754
	755	return s
[406]	756
[411]	757	###################################################################################
	758	def hard_config( self ): # compute string for hard_config.h file generation,
	759	# required by
[319]	760	# - top.cpp compilation
	761	# - giet_vm compilation
	762	# - tsar_preloader compilation
	763
	764	nb_total_procs = 0
	765
	766	# for each peripheral type, define default values
[406]	767	# for pbase address, size, number of components, and channels
[319]	768	nb_cma = 0
	769	cma_channels = 0
	770	seg_cma_base = 0xFFFFFFFF
	771	seg_cma_size = 0
	772
	773	nb_dma = 0
	774	dma_channels = 0
	775	seg_dma_base = 0xFFFFFFFF
	776	seg_dma_size = 0
	777
	778	nb_fbf = 0
	779	fbf_channels = 0
[328]	780	fbf_arg = 0
[319]	781	seg_fbf_base = 0xFFFFFFFF
	782	seg_fbf_size = 0
	783
	784	nb_iob = 0
	785	iob_channels = 0
	786	seg_iob_base = 0xFFFFFFFF
	787	seg_iob_size = 0
	788
	789	nb_ioc = 0
	790	ioc_channels = 0
	791	seg_ioc_base = 0xFFFFFFFF
	792	seg_ioc_size = 0
	793
	794	nb_mmc = 0
	795	mmc_channels = 0
	796	seg_mmc_base = 0xFFFFFFFF
	797	seg_mmc_size = 0
	798
	799	nb_mwr = 0
	800	mwr_channels = 0
	801	seg_mwr_base = 0xFFFFFFFF
	802	seg_mwr_size = 0
	803
	804	nb_nic = 0
	805	nic_channels = 0
	806	seg_nic_base = 0xFFFFFFFF
	807	seg_nic_size = 0
	808
	809	nb_pic = 0
	810	pic_channels = 0
	811	seg_pic_base = 0xFFFFFFFF
	812	seg_pic_size = 0
	813
	814	nb_rom = 0
	815	rom_channels = 0
	816	seg_rom_base = 0xFFFFFFFF
	817	seg_rom_size = 0
	818
	819	nb_sim = 0
	820	sim_channels = 0
	821	seg_sim_base = 0xFFFFFFFF
	822	seg_sim_size = 0
	823
	824	nb_tim = 0
	825	tim_channels = 0
	826	seg_tim_base = 0xFFFFFFFF
	827	seg_tim_size = 0
	828
	829	nb_tty = 0
	830	tty_channels = 0
	831	seg_tty_base = 0xFFFFFFFF
	832	seg_tty_size = 0
	833
	834	nb_xcu = 0
	835	xcu_channels = 0
[328]	836	xcu_arg = 0
[319]	837	seg_xcu_base = 0xFFFFFFFF
	838	seg_xcu_size = 0
	839
[491]	840	nb_drom = 0
	841	drom_channels = 0
	842	seg_drom_base = 0xFFFFFFFF
	843	seg_drom_size = 0
	844
[319]	845	use_bdv = False
	846	use_spi = False
	847	use_hba = False
	848
	849	# get peripherals attributes
	850	for cluster in self.clusters:
	851	for periph in cluster.periphs:
[406]	852	if ( periph.ptype == 'CMA' ):
[319]	853	seg_cma_base = periph.pseg.base & 0xFFFFFFFF
	854	seg_cma_size = periph.pseg.size
	855	cma_channels = periph.channels
	856	nb_cma +=1
	857
[406]	858	elif ( periph.ptype == 'DMA' ):
	859	seg_dma_base = periph.pseg.base & 0xFFFFFFFF
[319]	860	seg_dma_size = periph.pseg.size
	861	dma_channels = periph.channels
	862	nb_dma +=1
	863
[406]	864	elif ( periph.ptype == 'FBF' ):
[319]	865	seg_fbf_base = periph.pseg.base & 0xFFFFFFFF
	866	seg_fbf_size = periph.pseg.size
	867	fbf_channels = periph.channels
[328]	868	fbf_arg = periph.arg
[319]	869	nb_fbf +=1
	870
	871	elif ( periph.ptype == 'IOB' ):
	872	seg_iob_base = periph.pseg.base & 0xFFFFFFFF
	873	seg_iob_size = periph.pseg.size
	874	iob_channels = periph.channels
	875	nb_iob +=1
	876
[406]	877	elif ( periph.ptype == 'IOC' ):
[319]	878	seg_ioc_base = periph.pseg.base & 0xFFFFFFFF
	879	seg_ioc_size = periph.pseg.size
	880	ioc_channels = periph.channels
	881	nb_ioc += 1
[404]	882
	883	if self.use_ramdisk: continue
	884
[319]	885	if ( periph.subtype == 'BDV' ): use_bdv = True
	886	elif ( periph.subtype == 'HBA' ): use_hba = True
	887	elif ( periph.subtype == 'SPI' ): use_spi = True
	888
	889	elif ( periph.ptype == 'MMC' ):
	890	seg_mmc_base = periph.pseg.base & 0xFFFFFFFF
	891	seg_mmc_size = periph.pseg.size
	892	mmc_channels = periph.channels
	893	nb_mmc +=1
	894
	895	elif ( periph.ptype == 'MWR' ):
	896	seg_mwr_base = periph.pseg.base & 0xFFFFFFFF
	897	seg_wmr_size = periph.pseg.size
	898	mwr_channels = periph.channels
	899	nb_mwr +=1
	900
	901	elif ( periph.ptype == 'ROM' ):
	902	seg_rom_base = periph.pseg.base & 0xFFFFFFFF
	903	seg_rom_size = periph.pseg.size
	904	rom_channels = periph.channels
	905	nb_rom +=1
	906
[491]	907	elif ( periph.ptype == 'DROM' ):
	908	seg_drom_base = periph.pseg.base & 0xFFFFFFFF
	909	seg_drom_size = periph.pseg.size
	910	drom_channels = periph.channels
	911	nb_drom +=1
	912
[319]	913	elif ( periph.ptype == 'SIM' ):
	914	seg_sim_base = periph.pseg.base & 0xFFFFFFFF
	915	seg_sim_size = periph.pseg.size
	916	sim_channels = periph.channels
	917	nb_sim +=1
	918
[406]	919	elif ( periph.ptype == 'NIC' ):
[319]	920	seg_nic_base = periph.pseg.base & 0xFFFFFFFF
	921	seg_nic_size = periph.pseg.size
	922	nic_channels = periph.channels
	923	nb_nic +=1
	924
[406]	925	elif ( periph.ptype == 'PIC' ):
[319]	926	seg_pic_base = periph.pseg.base & 0xFFFFFFFF
	927	seg_pic_size = periph.pseg.size
	928	pic_channels = periph.channels
	929	nb_pic +=1
[406]	930
	931	elif ( periph.ptype == 'TIM' ):
[319]	932	seg_tim_base = periph.pseg.base & 0xFFFFFFFF
	933	seg_tim_size = periph.pseg.size
	934	tim_channels = periph.channels
	935	nb_tim +=1
[406]	936
[319]	937	elif ( periph.ptype == 'TTY' ):
	938	seg_tty_base = periph.pseg.base & 0xFFFFFFFF
	939	seg_tty_size = periph.pseg.size
	940	tty_channels = periph.channels
	941	nb_tty +=1
[406]	942
	943	elif ( periph.ptype == 'XCU' ):
[319]	944	seg_xcu_base = periph.pseg.base & 0xFFFFFFFF
	945	seg_xcu_size = periph.pseg.size
	946	xcu_channels = periph.channels
[328]	947	xcu_arg = periph.arg
[319]	948	nb_xcu +=1
[406]	949
[319]	950	# no more than two access to external peripherals
[406]	951	assert ( nb_fbf <= 2 )
	952	assert ( nb_cma <= 2 )
	953	assert ( nb_ioc <= 2 )
	954	assert ( nb_nic <= 2 )
	955	assert ( nb_tim <= 2 )
	956	assert ( nb_tty <= 2 )
[319]	957	assert ( nb_pic <= 2 )
	958
	959	# one and only one type of IOC controller
[403]	960	nb_iocs = 0
	961	if use_hba : nb_iocs += 1
	962	if use_bdv : nb_iocs += 1
	963	if use_spi : nb_iocs += 1
	964	if self.use_ramdisk: nb_iocs += 1
	965	assert ( nb_iocs == 1 )
[404]	966
[319]	967	# Compute total number of processors
	968	for cluster in self.clusters:
	969	nb_total_procs += len( cluster.procs )
	970
	971	# Compute physical addresses for BOOT vsegs
	972	boot_mapping_found = False
	973	boot_code_found = False
	974	boot_data_found = False
	975	boot_stack_found = False
	976
	977	for vseg in self.globs:
	978	if ( vseg.name == 'seg_boot_mapping' ):
[406]	979	boot_mapping_base = vseg.vbase
[512]	980	boot_mapping_size = vseg.length
[348]	981	boot_mapping_identity = vseg.identity
[319]	982	boot_mapping_found = True
	983
	984	if ( vseg.name == 'seg_boot_code' ):
[406]	985	boot_code_base = vseg.vbase
[512]	986	boot_code_size = vseg.length
[348]	987	boot_code_identity = vseg.identity
[319]	988	boot_code_found = True
	989
[406]	990	if ( vseg.name == 'seg_boot_data' ):
	991	boot_data_base = vseg.vbase
[512]	992	boot_data_size = vseg.length
[348]	993	boot_data_identity = vseg.identity
[319]	994	boot_data_found = True
	995
	996	if ( vseg.name == 'seg_boot_stack' ):
[406]	997	boot_stack_base = vseg.vbase
[512]	998	boot_stack_size = vseg.length
[348]	999	boot_stack_identity = vseg.identity
[319]	1000	boot_stack_found = True
	1001
[328]	1002	# check that BOOT vsegs are found and identity mapping
[348]	1003	if ( (boot_mapping_found == False) or (boot_mapping_identity == False) ):
[512]	1004	print '[genmap error] in hard_config()'
	1005	print ' seg_boot_mapping missing or not identity mapping'
[319]	1006	sys.exit()
	1007
[406]	1008	if ( (boot_code_found == False) or (boot_code_identity == False) ):
[512]	1009	print '[genmap error] in hard_config()'
	1010	print ' seg_boot_code missing or not identity mapping'
[319]	1011	sys.exit()
	1012
[406]	1013	if ( (boot_data_found == False) or (boot_data_identity == False) ):
[512]	1014	print '[genmap error] in hard_config()'
	1015	print ' seg_boot_data missing or not identity mapping'
[319]	1016	sys.exit()
	1017
[348]	1018	if ( (boot_stack_found == False) or (boot_stack_identity == False) ):
[512]	1019	print '[genmap error] in giet_vsegs()'
	1020	print ' seg_boot_stask missing or not identity mapping'
[319]	1021	sys.exit()
	1022
	1023	# Search RAMDISK global vseg if required
	1024	seg_rdk_base = 0xFFFFFFFF
	1025	seg_rdk_size = 0
	1026	seg_rdk_found = False
	1027
	1028	if self.use_ramdisk:
	1029	for vseg in self.globs:
[497]	1030	if ( vseg.name == 'seg_ramdisk' ):
[319]	1031	seg_rdk_base = vseg.vbase
[512]	1032	seg_rdk_size = vseg.length
[319]	1033	seg_rdk_found = True
	1034
	1035	if ( seg_rdk_found == False ):
	1036	print 'Error in hard_config() "seg_ramdisk" not found'
	1037	sys.exit(1)
	1038
	1039	# build string
[406]	1040	s = '/* Generated by genmap for %s */\n' % self.name
[319]	1041	s += '\n'
	1042	s += '#ifndef HARD_CONFIG_H\n'
	1043	s += '#define HARD_CONFIG_H\n'
	1044	s += '\n'
	1045
[406]	1046	s += '/* General platform parameters */\n'
[319]	1047	s += '\n'
	1048	s += '#define X_SIZE %d\n' % self.x_size
	1049	s += '#define Y_SIZE %d\n' % self.y_size
	1050	s += '#define X_WIDTH %d\n' % self.x_width
	1051	s += '#define Y_WIDTH %d\n' % self.y_width
[406]	1052	s += '#define P_WIDTH %d\n' % self.p_width
[319]	1053	s += '#define X_IO %d\n' % self.x_io
[406]	1054	s += '#define Y_IO %d\n' % self.y_io
[411]	1055	s += '#define NB_PROCS_MAX %d\n' % self.nprocs
[319]	1056	s += '#define IRQ_PER_PROCESSOR %d\n' % self.irq_per_proc
	1057	s += '#define RESET_ADDRESS 0x%x\n' % self.reset_address
	1058	s += '#define NB_TOTAL_PROCS %d\n' % nb_total_procs
	1059	s += '\n'
	1060
[406]	1061	s += '/* Peripherals */\n'
[319]	1062	s += '\n'
	1063	s += '#define NB_TTY_CHANNELS %d\n' % tty_channels
	1064	s += '#define NB_IOC_CHANNELS %d\n' % ioc_channels
	1065	s += '#define NB_NIC_CHANNELS %d\n' % nic_channels
	1066	s += '#define NB_CMA_CHANNELS %d\n' % cma_channels
	1067	s += '#define NB_TIM_CHANNELS %d\n' % tim_channels
	1068	s += '#define NB_DMA_CHANNELS %d\n' % dma_channels
	1069	s += '\n'
	1070	s += '#define USE_XCU %d\n' % ( nb_xcu != 0 )
	1071	s += '#define USE_IOB %d\n' % ( nb_iob != 0 )
	1072	s += '#define USE_PIC %d\n' % ( nb_pic != 0 )
	1073	s += '#define USE_FBF %d\n' % ( nb_fbf != 0 )
	1074	s += '\n'
	1075	s += '#define USE_IOC_BDV %d\n' % use_bdv
	1076	s += '#define USE_IOC_SPI %d\n' % use_spi
	1077	s += '#define USE_IOC_HBA %d\n' % use_hba
[403]	1078	s += '#define USE_IOC_RDK %d\n' % self.use_ramdisk
[319]	1079	s += '\n'
[328]	1080	s += '#define FBUF_X_SIZE %d\n' % fbf_arg
	1081	s += '#define FBUF_Y_SIZE %d\n' % fbf_arg
	1082	s += '\n'
	1083	s += '#define XCU_NB_INPUTS %d\n' % xcu_arg
	1084	s += '\n'
[319]	1085
[356]	1086	s += '/* base addresses and sizes for physical segments */\n'
[319]	1087	s += '\n'
[406]	1088	s += '#define SEG_RAM_BASE 0x%x\n' % self.ram_base
	1089	s += '#define SEG_RAM_SIZE 0x%x\n' % self.ram_size
[356]	1090	s += '\n'
[406]	1091	s += '#define SEG_CMA_BASE 0x%x\n' % seg_cma_base
	1092	s += '#define SEG_CMA_SIZE 0x%x\n' % seg_cma_size
[319]	1093	s += '\n'
[406]	1094	s += '#define SEG_DMA_BASE 0x%x\n' % seg_dma_base
	1095	s += '#define SEG_DMA_SIZE 0x%x\n' % seg_dma_size
[319]	1096	s += '\n'
[406]	1097	s += '#define SEG_FBF_BASE 0x%x\n' % seg_fbf_base
	1098	s += '#define SEG_FBF_SIZE 0x%x\n' % seg_fbf_size
[319]	1099	s += '\n'
[406]	1100	s += '#define SEG_IOB_BASE 0x%x\n' % seg_iob_base
	1101	s += '#define SEG_IOB_SIZE 0x%x\n' % seg_iob_size
[319]	1102	s += '\n'
[406]	1103	s += '#define SEG_IOC_BASE 0x%x\n' % seg_ioc_base
	1104	s += '#define SEG_IOC_SIZE 0x%x\n' % seg_ioc_size
[319]	1105	s += '\n'
[406]	1106	s += '#define SEG_MMC_BASE 0x%x\n' % seg_mmc_base
	1107	s += '#define SEG_MMC_SIZE 0x%x\n' % seg_mmc_size
[319]	1108	s += '\n'
[406]	1109	s += '#define SEG_MWR_BASE 0x%x\n' % seg_mwr_base
	1110	s += '#define SEG_MWR_SIZE 0x%x\n' % seg_mwr_size
[319]	1111	s += '\n'
[406]	1112	s += '#define SEG_ROM_BASE 0x%x\n' % seg_rom_base
	1113	s += '#define SEG_ROM_SIZE 0x%x\n' % seg_rom_size
[319]	1114	s += '\n'
[406]	1115	s += '#define SEG_SIM_BASE 0x%x\n' % seg_sim_base
	1116	s += '#define SEG_SIM_SIZE 0x%x\n' % seg_sim_size
[319]	1117	s += '\n'
[406]	1118	s += '#define SEG_NIC_BASE 0x%x\n' % seg_nic_base
	1119	s += '#define SEG_NIC_SIZE 0x%x\n' % seg_nic_size
[319]	1120	s += '\n'
[406]	1121	s += '#define SEG_PIC_BASE 0x%x\n' % seg_pic_base
	1122	s += '#define SEG_PIC_SIZE 0x%x\n' % seg_pic_size
[319]	1123	s += '\n'
[406]	1124	s += '#define SEG_TIM_BASE 0x%x\n' % seg_tim_base
	1125	s += '#define SEG_TIM_SIZE 0x%x\n' % seg_tim_size
[319]	1126	s += '\n'
[406]	1127	s += '#define SEG_TTY_BASE 0x%x\n' % seg_tty_base
	1128	s += '#define SEG_TTY_SIZE 0x%x\n' % seg_tty_size
[319]	1129	s += '\n'
[406]	1130	s += '#define SEG_XCU_BASE 0x%x\n' % seg_xcu_base
	1131	s += '#define SEG_XCU_SIZE 0x%x\n' % seg_xcu_size
[319]	1132	s += '\n'
	1133	s += '#define SEG_RDK_BASE 0x%x\n' % seg_rdk_base
	1134	s += '#define SEG_RDK_SIZE 0x%x\n' % seg_rdk_size
	1135	s += '\n'
[491]	1136	s += '#define SEG_DROM_BASE 0x%x\n' % seg_drom_base
	1137	s += '#define SEG_DROM_SIZE 0x%x\n' % seg_drom_size
	1138	s += '\n'
[328]	1139	s += '#define PERI_CLUSTER_INCREMENT 0x%x\n' % self.peri_increment
[319]	1140	s += '\n'
	1141
[326]	1142	s += '/* physical base addresses for identity mapped vsegs */\n'
	1143	s += '/* used by the GietVM OS */\n'
[319]	1144	s += '\n'
	1145	s += '#define SEG_BOOT_MAPPING_BASE 0x%x\n' % boot_mapping_base
	1146	s += '#define SEG_BOOT_MAPPING_SIZE 0x%x\n' % boot_mapping_size
	1147	s += '\n'
	1148	s += '#define SEG_BOOT_CODE_BASE 0x%x\n' % boot_code_base
	1149	s += '#define SEG_BOOT_CODE_SIZE 0x%x\n' % boot_code_size
	1150	s += '\n'
	1151	s += '#define SEG_BOOT_DATA_BASE 0x%x\n' % boot_data_base
	1152	s += '#define SEG_BOOT_DATA_SIZE 0x%x\n' % boot_data_size
	1153	s += '\n'
	1154	s += '#define SEG_BOOT_STACK_BASE 0x%x\n' % boot_stack_base
	1155	s += '#define SEG_BOOT_STACK_SIZE 0x%x\n' % boot_stack_size
	1156	s += '#endif\n'
[406]	1157
[319]	1158	return s
	1159
	1160	# end of hard_config()
	1161
[411]	1162	################################################################################
	1163	def linux_dts( self ): # compute string for linux.dts file generation
[424]	1164	# used for linux configuration
[411]	1165	# header
	1166	s = '/dts-v1/;\n'
	1167	s += '\n'
	1168	s += '/{\n'
[421]	1169	s += ' compatible = "tsar,%s";\n' % self.name
[411]	1170	s += ' #address-cells = <2>;\n' # physical address on 64 bits
	1171	s += ' #size-cells = <1>;\n' # segment size on 32 bits
	1172	s += ' model = "%s";\n' % self.name
	1173	s += '\n'
	1174
	1175	# linux globals arguments
	1176	s += ' chosen {\n'
	1177	s += ' linux,stdout-path = &tty;\n'
	1178	s += ' bootargs = "console=tty0 console=ttyVTTY0 earlyprintk";\n'
[424]	1179	s += ' };\n\n'
[411]	1180
	1181	# cpus (for each cluster)
	1182	s += ' cpus {\n'
	1183	s += ' #address-cells = <1>;\n'
	1184	s += ' #size-cells = <0>;\n'
	1185
	1186	for cluster in self.clusters:
	1187	for proc in cluster.procs:
	1188	x = cluster.x
	1189	y = cluster.y
	1190	l = proc.lpid
[421]	1191	proc_id = (((x << self.y_width) + y) << self.p_width) + l
[411]	1192	s += ' cpu@%d_%d_%d {\n' %(x,y,l)
	1193	s += ' device_type = "cpu";\n'
	1194	s += ' compatible = "soclib,mips32el";\n'
	1195	s += ' reg = <0x%x>;\n' % proc_id
	1196	s += ' };\n'
	1197	s += '\n'
	1198
	1199	s += ' };\n\n'
	1200
	1201	# devices (ram or peripheral) are grouped per cluster
[424]	1202	# the "compatible" attribute links a peripheral device
[411]	1203	# to one or several drivers identified by ("major","minor")
	1204
	1205	for cluster in self.clusters:
	1206	x = cluster.x
	1207	y = cluster.y
	1208	found_xcu = False
	1209	found_pic = False
	1210
	1211	s += ' /* cluster[%d,%d] */\n\n' % (x,y)
	1212
	1213	# scan all psegs to find RAM in current cluster
	1214	for pseg in cluster.psegs:
	1215	if ( pseg.segtype == 'RAM' ):
	1216	msb = pseg.base >> 32
	1217	lsb = pseg.base & 0xFFFFFFFF
	1218	size = pseg.size
	1219
[424]	1220	s += ' ram_%d_%d: ram@0x%x {\n' % (x, y, pseg.base)
[411]	1221	s += ' device_type = "memory";\n'
	1222	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1223	s += ' };\n\n'
	1224
	1225	# scan all periphs to find XCU or PIC in current cluster
	1226	for periph in cluster.periphs:
	1227	msb = periph.pseg.base >> 32
	1228	lsb = periph.pseg.base & 0xFFFFFFFF
	1229	size = periph.pseg.size
	1230
	1231	# search XCU (can be replicated)
[424]	1232	if ( (periph.ptype == 'XCU') ):
[411]	1233	found_xcu = True
	1234	xcu = periph
[424]	1235	irq_ctrl_name = 'xcu_%d_%d' % (x, y)
[411]	1236
[424]	1237	s += ' %s: xcu@0x%x {\n' % (irq_ctrl_name, periph.pseg.base)
[421]	1238	s += ' compatible = "soclib,vci_xicu","soclib,vci_xicu_timer";\n'
[411]	1239	s += ' interrupt-controller;\n'
	1240	s += ' #interrupt-cells = <1>;\n'
[512]	1241	s += ' clocks = <&freq>;\n' # XCU contains a timer
[424]	1242	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[411]	1243	s += ' };\n\n'
	1244
	1245	# search PIC (non replicated)
[424]	1246	if ( periph.ptype == 'PIC' ):
[411]	1247	found_pic = True
	1248	pic = periph
	1249	irq_ctrl_name = 'pic'
	1250
[424]	1251	s += ' %s: pic@0x%x {\n' % (irq_ctrl_name, periph.pseg.base)
[421]	1252	s += ' compatible = "soclib,vci_iopic";\n'
[411]	1253	s += ' interrupt-controller;\n'
	1254	s += ' #interrupt-cells = <1>;\n'
	1255	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1256	s += ' };\n\n'
	1257
	1258	# we need one interrupt controler in any cluster containing peripherals
[512]	1259	if ( (found_xcu == False) and
	1260	(found_pic == False) and
	1261	(len(cluster.periphs) > 0) ):
	1262	print '[genmap error] in linux_dts()'
	1263	print ' No XCU/PIC in cluster(%d,%d)' % (x,y)
[424]	1264	sys.exit(1)
[411]	1265
	1266	if ( found_pic == True ): irq_ctrl = pic
	1267	else: irq_ctrl = xcu
[424]	1268
[411]	1269	# scan all periphs to find TTY and IOC in current cluster
	1270	for periph in cluster.periphs:
	1271	msb = periph.pseg.base >> 32
	1272	lsb = periph.pseg.base & 0xFFFFFFFF
	1273	size = periph.pseg.size
	1274
	1275	# search TTY (non replicated)
[424]	1276	if ( periph.ptype == 'TTY' ):
[411]	1277
	1278	# get HWI index to XCU or PIC (only TTY channel 0 is used by Linux)
	1279	hwi_id = 0xFFFFFFFF
	1280	for irq in irq_ctrl.irqs:
[512]	1281	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == 0) ):
	1282	hwi_id = irq.srcid
	1283
[411]	1284	if ( hwi_id == 0xFFFFFFFF ):
[512]	1285	print '[genmap error] in linux.dts()'
	1286	print ' IRQ_TTY_RX not found'
[411]	1287	sys.exit(1)
	1288
	1289	s += ' tty: tty {\n'
[421]	1290	s += ' compatible = "soclib,vci_multi_tty";\n'
[411]	1291	s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name)
[424]	1292	s += ' interrupts = <%d>;\n' % hwi_id
[411]	1293	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1294	s += ' };\n\n'
	1295
	1296	# search IOC (non replicated)
[424]	1297	elif ( periph.ptype == 'IOC' ):
[411]	1298
	1299	if ( periph.subtype == 'BDV' ):
	1300
	1301	# get irq line index associated to bdv
	1302	hwi_id = 0xFFFFFFFF
	1303	for irq in irq_ctrl.irqs:
	1304	if ( irq.isrtype == 'ISR_BDV' ): hwi_id = irq.srcid
[512]	1305
[411]	1306	if ( hwi_id == 0xFFFFFFFF ):
[512]	1307	print '[genmap error] in linux.dts()'
	1308	print ' ISR_BDV not found'
[411]	1309	sys.exit(1)
	1310
	1311	s += ' bdv: bdv {\n'
[517]	1312	s += ' compatible = "tsar,vci_block_device";\n'
[411]	1313	s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name)
[424]	1314	s += ' interrupts = <%d>;\n' % hwi_id
[411]	1315	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1316	s += ' };\n\n'
	1317
	1318	elif ( periph.subtype == 'HBA' ):
	1319
[512]	1320	print '[genmap error] in linux_dts()'
	1321	print ' HBA peripheral not supported by LINUX'
[411]	1322	sys.exit(1)
	1323
	1324	elif ( periph.subtype == 'SPI' ):
	1325
[512]	1326	print '[genmap error] in linux_dts()'
	1327	print ' SPI peripheral not supported by LINUX'
[411]	1328	sys.exit(1)
	1329
[465]	1330	# XCU or PIC have been already parsed
	1331	elif ( periph.ptype == 'XCU' ) or ( periph.ptype == 'PIC' ):
	1332	pass
	1333
[411]	1334	# other peripherals
[424]	1335	else:
[512]	1336	print '[genmap warning] in linux_dts()'
	1337	print ' %s peripheral not supported by LINUX' % (periph.ptype)
[424]	1338
	1339	# clocks
[411]	1340	s += ' /* clocks */\n\n'
	1341	s += ' clocks {\n'
[424]	1342	s += ' freq: freq@50MHZ {\n'
[411]	1343	s += ' #clock-cells = <0>;\n'
	1344	s += ' compatible = "fixed-clock";\n'
	1345	s += ' clock-frequency = <50000000>;\n'
	1346	s += ' };\n'
	1347	s += ' };\n\n'
	1348	s += ' cpuclk {\n'
[421]	1349	s += ' compatible = "soclib,mips32_clksrc";\n'
[424]	1350	s += ' clocks = <&freq>;\n'
[411]	1351	s += ' };\n'
	1352	s += '};\n'
	1353
	1354	return s
	1355	# end linux_dts()
	1356
	1357
	1358	#############################################################################
[319]	1359	def netbsd_dts( self ): # compute string for netbsd.dts file generation,
[406]	1360	# used for netbsd configuration
[319]	1361	# header
	1362	s = '/dts-v1/;\n'
	1363	s += '\n'
	1364	s += '/{\n'
[406]	1365	s += ' #address-cells = <2>;\n'
	1366	s += ' #size-cells = <1>;\n'
[319]	1367
	1368	# cpus (for each cluster)
	1369	s += ' cpus {\n'
	1370	s += ' #address-cells = <1>;\n'
	1371	s += ' #size-cells = <0>;\n'
	1372
	1373	for cluster in self.clusters:
	1374	for proc in cluster.procs:
[406]	1375	proc_id = (((cluster.x << self.y_width) + cluster.y) << self.p_width) + proc.lpid
[319]	1376
	1377	s += ' Mips,32@0x%x {\n' % proc_id
	1378	s += ' device_type = "cpu";\n'
	1379	s += ' icudev_type = "cpu:mips";\n'
	1380	s += ' name = "Mips,32";\n'
	1381	s += ' reg = <0x%x>;\n' % proc_id
	1382	s += ' };\n'
	1383	s += '\n'
	1384
	1385	s += ' };\n'
	1386
[411]	1387	# physical memory banks (for each cluster)
[319]	1388	for cluster in self.clusters:
	1389	for pseg in cluster.psegs:
	1390
	1391	if ( pseg.segtype == 'RAM' ):
	1392	msb = pseg.base >> 32
	1393	lsb = pseg.base & 0xFFFFFFFF
	1394	size = pseg.size
	1395
	1396	s += ' %s@0x%x {\n' % (pseg.name, pseg.base)
	1397	s += ' cached = <1>;\n'
	1398	s += ' device_type = "memory";\n'
	1399	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1400	s += ' };\n'
	1401
	1402	# peripherals (for each cluster)
	1403	for cluster in self.clusters:
[411]	1404	x = cluster.x
	1405	y = cluster.y
[319]	1406
[406]	1407	# research XCU component
[319]	1408	found_xcu = False
	1409	for periph in cluster.periphs:
[406]	1410	if ( (periph.ptype == 'XCU') ):
[319]	1411	found_xcu = True
	1412	xcu = periph
	1413	msb = periph.pseg.base >> 32
	1414	lsb = periph.pseg.base & 0xFFFFFFFF
	1415	size = periph.pseg.size
	1416
	1417	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1418	s += ' device_type = "soclib:xicu:root";\n'
	1419	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[400]	1420	s += ' input_lines = <%d>;\n' % periph.arg
	1421	s += ' ipis = <%d>;\n' % periph.arg
	1422	s += ' timers = <%d>;\n' % periph.arg
[319]	1423
	1424	output_id = 0 # output index from XCU
	1425	for lpid in xrange ( len(cluster.procs) ): # destination processor index
	1426	for itid in xrange ( self.irq_per_proc ): # input irq index on processor
[406]	1427	cluster_xy = (cluster.x << self.y_width) + cluster.y
	1428	proc_id = (cluster_xy << self.p_width) + lpid
[319]	1429	s += ' out@%d {\n' % output_id
	1430	s += ' device_type = "soclib:xicu:filter";\n'
[411]	1431	s += ' irq = <&{/cpus/Mips,32@0x%x} %d>;\n' % (proc_id, itid)
[406]	1432	s += ' output_line = <%d>;\n' % output_id
[411]	1433	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1434	s += ' };\n'
	1435
	1436	output_id += 1
	1437
	1438	s += ' };\n'
	1439
	1440	# research PIC component
	1441	found_pic = False
	1442	for periph in cluster.periphs:
[406]	1443	if ( periph.ptype == 'PIC' ):
[319]	1444	found_pic = True
	1445	pic = periph
	1446	msb = periph.pseg.base >> 32
	1447	lsb = periph.pseg.base & 0xFFFFFFFF
	1448	size = periph.pseg.size
	1449
	1450	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1451	s += ' device_type = "soclib:pic:root";\n'
	1452	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[406]	1453	s += ' input_lines = <%d>;\n' % periph.channels
[319]	1454	s += ' };\n'
	1455
[411]	1456	# at least one interrupt controller
[319]	1457	if ( (found_xcu == False) and (found_pic == False) and (len(cluster.periphs) > 0) ):
[512]	1458	print '[genmap error] in netbsd_dts()'
	1459	print ' No XCU/PIC in cluster(%d,%d)' % (x,y)
[406]	1460	sys.exit(1)
	1461
[319]	1462	if ( found_pic == True ): irq_tgt = pic
	1463	else: irq_tgt = xcu
[406]	1464
[319]	1465	# get all others peripherals in cluster
	1466	for periph in cluster.periphs:
	1467	msb = periph.pseg.base >> 32
	1468	lsb = periph.pseg.base & 0xFFFFFFFF
	1469	size = periph.pseg.size
	1470
	1471	# research DMA component
	1472	if ( periph.ptype == 'DMA' ):
	1473
	1474	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[411]	1475	s += ' device_type = "soclib:dma";\n'
	1476	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1477	s += ' channel_count = <%d>;\n' % periph.channels
	1478
	1479	# multi-channels : get HWI index (to XCU) for each channel
	1480	for channel in xrange( periph.channels ):
	1481	hwi_id = 0xFFFFFFFF
	1482	for irq in xcu.irqs:
[406]	1483	if ( (irq.isrtype == 'ISR_DMA') and (irq.channel == channel) ):
[319]	1484	hwi_id = irq.srcid
[512]	1485
[319]	1486	if ( hwi_id == 0xFFFFFFFF ):
[512]	1487	print '[genmap error] in netbsd.dts()'
	1488	print ' ISR_DMA channel %d not found' % channel
[319]	1489	sys.exit(1)
	1490
	1491	name = '%s@0x%x' % (xcu.pseg.name, xcu.pseg.base)
	1492	s += ' irq@%d{\n' % channel
	1493	s += ' device_type = "soclib:periph:irq";\n'
	1494	s += ' output_line = <%d>;\n' % channel
[411]	1495	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1496	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1497	s += ' };\n'
	1498
[406]	1499	s += ' };\n'
[319]	1500
	1501	# research MMC component
	1502	elif ( periph.ptype == 'MMC' ):
	1503
	1504	# get irq line index associated to MMC in XCU
	1505	irq_in = 0xFFFFFFFF
	1506	for irq in xcu.irqs:
	1507	if ( irq.isrtype == 'ISR_MMC' ): irq_in = irq.srcid
[512]	1508
[319]	1509	if ( irq_in == 0xFFFFFFFF ):
[512]	1510	print '[genmap error] in netbsd.dts()'
	1511	print ' ISR_MMC not found'
[319]	1512	sys.exit(1)
	1513
	1514	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1515	s += ' device_type = "soclib:mmc";\n'
[411]	1516	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name, irq_tgt.pseg.base, irq_in)
	1517	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[406]	1518	s += ' };\n'
[319]	1519
	1520	# research FBF component
[406]	1521	elif ( periph.ptype == 'FBF' ):
[319]	1522
[411]	1523	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1524	s += ' device_type = "soclib:framebuffer";\n'
	1525	s += ' mode = <32>;\n' # bits par pixel
[400]	1526	s += ' width = <%d>;\n' % periph.arg
	1527	s += ' height = <%d>;\n' % periph.arg
[319]	1528	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1529	s += ' };\n'
	1530
	1531	# research IOC component
[406]	1532	elif ( periph.ptype == 'IOC' ):
[319]	1533
	1534	if ( periph.subtype == 'BDV' ):
	1535
	1536	# get irq line index associated to bdv
	1537	irq_in = 0xFFFFFFFF
	1538	for irq in irq_tgt.irqs:
	1539	if ( irq.isrtype == 'ISR_BDV' ): irq_in = irq.srcid
	1540	if ( irq_in == 0xFFFFFFFF ):
[512]	1541	print '[genmap error] in netbsd.dts()'
	1542	print ' ISR_BDV not found'
[319]	1543	sys.exit(1)
	1544
[411]	1545	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1546	s += ' device_type = "soclib:blockdevice";\n'
[411]	1547	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in)
	1548	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1549	s += ' };\n'
	1550
	1551	elif ( periph.subtype == 'HBA' ):
[512]	1552	print '[genmap error] in netbsd_dts()'
	1553	print ' HBA peripheral not supported by NetBSD'
[319]	1554	sys.exit(1)
	1555
	1556	elif ( periph.subtype == 'SPI' ):
	1557
	1558	# get irq line index associated to spi
	1559	irq_in = 0xFFFFFFFF
	1560	for irq in irq_tgt.irqs:
	1561	if ( irq.isrtype == 'ISR_SPI' ): irq_in = irq.srcid
	1562	if ( irq_in == 0xFFFFFFFF ):
[512]	1563	print '[genmap error] in netbsd.dts()'
	1564	print ' ISR_SPI not found'
[319]	1565	sys.exit(1)
	1566
	1567	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1568	s += ' device_type = "soclib:spi";\n'
[411]	1569	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in)
	1570	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1571	s += ' };\n'
	1572
	1573	# research ROM component
	1574	elif ( periph.ptype == 'ROM' ):
	1575
[411]	1576	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1577	s += ' device_type = "rom";\n'
[411]	1578	s += ' cached = <1>;\n'
	1579	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1580	s += ' };\n'
	1581
	1582	# research SIM component
	1583	elif ( periph.ptype == 'SIM' ):
	1584
	1585	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1586	s += ' device_type = "soclib:simhelper";\n'
	1587	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1588	s += ' };\n'
	1589
	1590	# research TTY component
	1591	elif ( periph.ptype == 'TTY' ):
	1592
[411]	1593	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1594	s += ' device_type = "soclib:tty";\n'
[406]	1595	s += ' channel_count = < %d >;\n' % periph.channels
[411]	1596	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1597
	1598	# multi-channels : get HWI index (to XCU or PIC) for each channel
	1599	for channel in xrange( periph.channels ):
	1600	hwi_id = 0xFFFFFFFF
	1601	for irq in irq_tgt.irqs:
[406]	1602	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == channel) ):
[319]	1603	hwi_id = irq.srcid
	1604	if ( hwi_id == 0xFFFFFFFF ):
[512]	1605	print '[genmap error] in netbsd.dts()'
	1606	print ' ISR_TTY_RX channel %d not found' % channel
[319]	1607	sys.exit(1)
	1608
	1609	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1610	s += ' irq@%d{\n' % channel
	1611	s += ' device_type = "soclib:periph:irq";\n'
	1612	s += ' output_line = <%d>;\n' % channel
[411]	1613	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1614	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1615	s += ' };\n'
	1616
	1617	s += ' };\n'
[406]	1618
[319]	1619	# research IOB component
	1620	elif ( periph.ptype == 'IOB' ):
	1621
	1622	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1623	s += ' device_type = "soclib:iob";\n'
	1624	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1625	s += ' };\n'
	1626
	1627	# research NIC component
[406]	1628	elif ( periph.ptype == 'NIC' ):
[319]	1629
	1630	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1631	s += ' device_type = "soclib:nic";\n'
	1632	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1633	s += ' channel_count = < %d >;\n' % periph.channels
	1634
	1635	# multi-channels : get HWI index (to XCU or PIC) for RX & TX IRQs
	1636	# RX IRQ : (2channel) / TX IRQs : (2channel + 1)
	1637	for channel in xrange( periph.channels ):
	1638	hwi_id = 0xFFFFFFFF
	1639	for irq in irq_tgt.irqs:
[406]	1640	if ( (irq.isrtype == 'ISR_NIC_RX') and (irq.channel == channel) ):
[319]	1641	hwi_id = irq.srcid
	1642	if ( hwi_id == 0xFFFFFFFF ):
[512]	1643	print '[genmap error] in netbsd.dts()'
	1644	print ' ISR_NIC_RX channel %d not found' % channel
[319]	1645	sys.exit(1)
	1646
	1647	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1648	s += ' irq_rx@%d{\n' % channel
	1649	s += ' device_type = "soclib:periph:irq";\n'
	1650	s += ' output_line = <%d>;\n' % (2*channel)
	1651	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1652	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
	1653	s += ' };\n'
	1654
	1655	hwi_id = 0xFFFFFFFF
	1656	for irq in irq_tgt.irqs:
[406]	1657	if ( (irq.isrtype == 'ISR_NIC_TX') and (irq.channel == channel) ):
[319]	1658	hwi_id = irq.srcid
	1659	if ( hwi_id == 0xFFFFFFFF ):
[512]	1660	print '[genmap error] in netbsd.dts()'
	1661	print ' ISR_NIC_TX channel %d not found' % channel
[319]	1662	sys.exit(1)
	1663
	1664	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1665	s += ' irq_tx@%d{\n' % channel
	1666	s += ' device_type = "soclib:periph:irq";\n'
	1667	s += ' output_line = <%d>;\n' % (2*channel + 1)
	1668	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1669	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
	1670	s += ' };\n'
[406]	1671
[319]	1672	s += ' };\n'
	1673
	1674	# research CMA component
[406]	1675	elif ( periph.ptype == 'CMA' ):
[319]	1676
	1677	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1678	s += ' device_type = "soclib:cma";\n'
	1679	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1680	s += ' channel_count = < %d >;\n' % periph.channels
	1681
	1682	# multi-channels : get HWI index (to XCU or PIC) for each channel
	1683	for channel in xrange( periph.channels ):
	1684	hwi_id = 0xFFFFFFFF
	1685	for irq in irq_tgt.irqs:
[406]	1686	if ( (irq.isrtype == 'ISR_CMA') and (irq.channel == channel) ):
[319]	1687	hwi_id = irq.srcid
[512]	1688
[319]	1689	if ( hwi_id == 0xFFFFFFFF ):
[512]	1690	print '[genmap error] in netbsd.dts()'
	1691	print ' ISR_CMA channel %d not found' % channel
[319]	1692	sys.exit(1)
	1693
	1694	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
	1695	s += ' irq@%d{\n' % channel
	1696	s += ' device_type = "soclib:periph:irq";\n'
	1697	s += ' output_line = <%d>;\n' % channel
[411]	1698	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1699	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1700	s += ' };\n'
	1701
	1702	s += ' };\n'
	1703
	1704	# research TIM component
[406]	1705	elif ( periph.ptype == 'TIM' ):
[319]	1706
[512]	1707	print '[genmap error] in netbsd_dts()'
	1708	print ' TIM peripheral not supported by NetBSD'
[319]	1709	sys.exit(1)
	1710
	1711	# research MWR component
	1712	elif ( periph.ptype == 'MWR' ):
	1713
[512]	1714	print '[genmap error] in netbsd_dts()'
	1715	print ' MWR peripheral not supported by NetBSD'
[319]	1716	sys.exit(1)
	1717
	1718	# topology
	1719	s += '\n'
	1720	s += ' topology {\n'
	1721	s += ' #address-cells = <2>;\n'
	1722	s += ' #size-cells = <0>;\n'
	1723	for cluster in self.clusters:
[406]	1724	s += ' cluster@%d,%d {\n' % (cluster.x, cluster.y)
[319]	1725	s += ' reg = <%d %d>;\n' % (cluster.x, cluster.y)
	1726	s += ' devices = <\n'
	1727
[406]	1728	offset = ((cluster.x << self.y_width) + cluster.y) << self.p_width
[319]	1729	for proc in cluster.procs:
	1730	s += ' &{/cpus/Mips,32@0x%x}\n' % (offset + proc.lpid)
	1731	for periph in cluster.periphs:
	1732	s += ' &{/%s@0x%x}\n' % (periph.pseg.name, periph.pseg.base)
[492]	1733	for pseg in cluster.psegs:
	1734	if ( pseg.segtype == 'RAM' ):
	1735	s += ' &{/%s@0x%x}\n' % (pseg.name, pseg.base)
[319]	1736
	1737	s += ' >;\n'
	1738	s += ' };\n'
	1739	s += ' };\n'
	1740	s += '};\n'
	1741
	1742	return s
[411]	1743	# end netbsd_dts()
[319]	1744
	1745	###########################
	1746	def almos_archinfo( self ): # compute string for arch.info file generation,
[406]	1747	# used for almos configuration
[319]	1748	# header
[327]	1749	s = '# arch.info file generated by genmap for %s\n' % self.name
[319]	1750	s += '\n'
	1751	s += '[HEADER]\n'
	1752	s += ' REVISION=1\n'
	1753	s += ' ARCH=%s\n' % self.name
	1754	s += ' XMAX=%d\n' % self.x_size
	1755	s += ' YMAX=%d\n' % self.y_size
[411]	1756	s += ' CPU_NR=%d\n' % self.nprocs
[319]	1757	s += '\n'
	1758
	1759	# clusters
	1760	cluster_id = 0
	1761	for cluster in self.clusters:
	1762
	1763	ram = None
	1764	nb_cpus = len( cluster.procs )
	1765	nb_devs = len( cluster.periphs )
	1766	if ( len( cluster.coprocs ) != 0 ):
	1767	print 'Error in almos_archinfo() coprocessors not supported yet'
	1768	sys.exit(1)
	1769
	1770	# search a RAM
	1771	for pseg in cluster.psegs:
[406]	1772	if ( pseg.segtype == 'RAM' ):
[319]	1773	ram = pseg
	1774	nb_devs += 1
	1775
	1776	# search XCU to get IRQs indexes if cluster contains peripherals
	1777	if ( len( cluster.periphs ) != 0 ):
	1778	tty_irq_id = None
	1779	bdv_irq_id = None
	1780	dma_irq_id = None
	1781
	1782	for periph in cluster.periphs:
[406]	1783	if ( periph.ptype == 'XCU' ):
[319]	1784	# scan irqs
	1785	for irq in periph.irqs:
	1786	if ( irq.isrtype == 'ISR_TTY_RX' ) : tty_irq_id = irq.srcid
	1787	if ( irq.isrtype == 'ISR_BDV' ) : bdv_irq_id = irq.srcid
	1788	if ( irq.isrtype == 'ISR_DMA' ) : dma_irq_id = irq.srcid
	1789
	1790	# Build the cluster description
	1791	s += '[CLUSTER]\n'
[406]	1792	s += ' CID=%d\n' % cluster_id
	1793	s += ' ARCH_CID=0x%x\n' % ((cluster.x << self.y_width) + cluster.y)
[319]	1794	s += ' CPU_NR=%d\n' % nb_cpus
	1795	s += ' DEV_NR=%d\n' % nb_devs
	1796
[406]	1797
[319]	1798	# Handling RAM when cluster contain a RAM
	1799	if (ram != None ):
	1800	base = ram.base
	1801	size = ram.size
	1802	irqid = -1
[406]	1803	s += ' DEVID=RAM'
[319]	1804	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
	1805
	1806	# Handling peripherals
	1807	for periph in cluster.periphs:
	1808	base = periph.pseg.base
	1809	size = periph.pseg.size
	1810
[406]	1811	if ( periph.ptype == 'XCU' ):
[319]	1812
[406]	1813	s += ' DEVID=XICU'
[319]	1814	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
	1815
[406]	1816	elif ( (periph.ptype == 'TTY')
[319]	1817	and (tty_irq_id != None) ):
	1818
[406]	1819	s += ' DEVID=TTY'
[319]	1820	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, tty_irq_id )
	1821
[406]	1822	elif ( (periph.ptype == 'DMA')
[319]	1823	and (dma_irq_id != None) ):
	1824
	1825	s += ' DEVID=DMA'
	1826	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, dma_irq_id )
	1827
	1828	elif ( periph.ptype == 'FBF' ):
	1829
	1830	s += ' DEVID=FB'
	1831	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
	1832
	1833	elif ( (periph.ptype == 'IOC') and (periph.subtype == 'BDV')
	1834	and (bdv_irq_id != None) ):
	1835
[406]	1836	s += ' DEVID=BLKDEV'
[319]	1837	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, bdv_irq_id )
	1838
	1839	elif ( periph.ptype == 'PIC' ):
	1840
[406]	1841	s += ' DEVID=IOPIC'
[319]	1842	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
	1843
	1844	else:
	1845	print '# Warning from almos_archinfo() in cluster[%d,%d]' \
	1846	% (cluster.x, cluster.y)
	1847	print '# peripheral type %s/%s not supported yet\n' \
	1848	% ( periph.ptype, periph.subtype )
[406]	1849
[319]	1850	cluster_id += 1
	1851
	1852	return s
	1853
	1854	# end of almos_archinfo()
	1855
	1856
	1857
	1858
	1859
	1860
	1861
	1862
	1863	###########################################################################################
	1864	class Cluster ( object ):
	1865	###########################################################################################
	1866	def __init__( self,
[406]	1867	x,
[319]	1868	y ):
[406]	1869
[319]	1870	self.index = 0 # global index (set by Mapping constructor)
	1871	self.x = x # x coordinate
	1872	self.y = y # y coordinate
	1873	self.psegs = [] # filled by addRam() or addPeriph()
	1874	self.procs = [] # filled by addProc()
	1875	self.coprocs = [] # filled by addCoproc()
	1876	self.periphs = [] # filled by addPeriph()
	1877
	1878	return
	1879
	1880	################
	1881	def xml( self ): # xml for a cluster
	1882
	1883	s = ' <cluster x="%d" y="%d" >\n' % (self.x, self.y)
[406]	1884	for pseg in self.psegs: s += pseg.xml()
[319]	1885	for proc in self.procs: s += proc.xml()
[406]	1886	for copr in self.coprocs: s += copr.xml()
	1887	for peri in self.periphs: s += peri.xml()
[319]	1888	s += ' </cluster>\n'
	1889
	1890	return s
	1891
	1892	#############################################
	1893	def cbin( self, mapping, verbose, expected ): # C binary structure for Cluster
	1894
	1895	if ( verbose ):
	1896	print '*** cbin for cluster [%d,%d]' % (self.x, self.y)
	1897
	1898	# check index
	1899	if (self.index != expected):
[512]	1900	print '[genmap error] in Cluster.cbin()'
	1901	print ' cluster global index = %d / expected = %d' % (self.index,expected)
[319]	1902	sys.exit(1)
	1903
[406]	1904	# compute global index for first pseg
[319]	1905	if ( len(self.psegs) > 0 ):
	1906	pseg_id = self.psegs[0].index
	1907	else:
	1908	pseg_id = 0
	1909
[406]	1910	# compute global index for first proc
[319]	1911	if ( len(self.procs) > 0 ):
	1912	proc_id = self.procs[0].index
	1913	else:
	1914	proc_id = 0
	1915
[406]	1916	# compute global index for first coproc
[319]	1917	if ( len(self.coprocs) > 0 ):
	1918	coproc_id = self.coprocs[0].index
	1919	else:
	1920	coproc_id = 0
	1921
[406]	1922	# compute global index for first periph
[319]	1923	if ( len(self.periphs) > 0 ):
	1924	periph_id = self.periphs[0].index
	1925	else:
	1926	periph_id = 0
	1927
	1928	byte_stream = bytearray()
[512]	1929	byte_stream += mapping.int2bytes( 4 , self.x ) # x coordinate
	1930	byte_stream += mapping.int2bytes( 4 , self.y ) # x coordinate
	1931	byte_stream += mapping.int2bytes( 4 , len( self.psegs ) ) # number psegs in cluster
	1932	byte_stream += mapping.int2bytes( 4 , pseg_id ) # first pseg global index
	1933	byte_stream += mapping.int2bytes( 4 , len( self.procs ) ) # number procs in cluster
	1934	byte_stream += mapping.int2bytes( 4 , proc_id ) # first proc global index
	1935	byte_stream += mapping.int2bytes( 4 , len( self.coprocs ) ) # number coprocs in cluster
	1936	byte_stream += mapping.int2bytes( 4 , coproc_id ) # first coproc global index
	1937	byte_stream += mapping.int2bytes( 4 , len( self.periphs ) ) # number periphs in cluster
	1938	byte_stream += mapping.int2bytes( 4 , periph_id ) # first periph global index
[406]	1939
[319]	1940	if ( verbose ):
	1941	print 'nb_psegs = %d' % len( self.psegs )
	1942	print 'pseg_id = %d' % pseg_id
	1943	print 'nb_procs = %d' % len( self.procs )
	1944	print 'proc_id = %d' % proc_id
	1945	print 'nb_coprocs = %d' % len( self.coprocs )
	1946	print 'coproc_id = %d' % coproc_id
	1947	print 'nb_periphs = %d' % len( self.periphs )
	1948	print 'periph_id = %d' % periph_id
	1949
	1950	return byte_stream
	1951
[512]	1952	########################################################################################
[305]	1953	class Vspace( object ):
[512]	1954	########################################################################################
[406]	1955	def __init__( self,
	1956	name,
[319]	1957	startname ):
	1958
	1959	self.index = 0 # global index ( set by addVspace() )
	1960	self.name = name # vspace name
[512]	1961	self.startname = startname # name of vseg containing the start_vector
[406]	1962	self.vsegs = []
[305]	1963	self.tasks = []
	1964
	1965	return
	1966
[319]	1967	################
	1968	def xml( self ): # xml for one vspace
	1969
[305]	1970	s = ' <vspace name="%s" startname="%s" >\n' % ( self.name, self.startname )
[319]	1971	for vseg in self.vsegs: s += vseg.xml()
[406]	1972	for task in self.tasks: s += task.xml()
[305]	1973	s += ' </vspace>\n'
[319]	1974
[305]	1975	return s
	1976
[319]	1977	#############################################
	1978	def cbin( self, mapping, verbose, expected ): # C binary structure for Vspace
	1979
	1980	if ( verbose ):
	1981	print '*** cbin for vspace %s' % (self.name)
	1982
	1983	# check index
	1984	if (self.index != expected):
[512]	1985	print '[genmap error] in Vspace.cbin()'
	1986	print ' vspace global index = %d / expected = %d' %(self.index,expected)
[319]	1987	sys.exit(1)
	1988
[512]	1989	# compute global index for vseg containing start_vector
	1990	vseg_start_id = 0xFFFFFFFF
[319]	1991	for vseg in self.vsegs:
[512]	1992	if ( vseg.name == self.startname ): vseg_start_id = vseg.index
	1993
	1994	if ( vseg_start_id == 0xFFFFFFFF ):
	1995	print '[genmap error] in Vspace.cbin()'
	1996	print ' startname %s not found for vspace %s' %(self.startname,self.name)
[319]	1997	sys.exit(1)
[406]	1998
[512]	1999	# compute first vseg and first task global index
[319]	2000	first_vseg_id = self.vsegs[0].index
	2001	first_task_id = self.tasks[0].index
[406]	2002
[512]	2003	# compute number of tasks and number of vsegs
[319]	2004	nb_vsegs = len( self.vsegs )
	2005	nb_tasks = len( self.tasks )
	2006
	2007	byte_stream = bytearray()
	2008	byte_stream += mapping.str2bytes( 32, self.name ) # vspace name
[512]	2009	byte_stream += mapping.int2bytes( 4, vseg_start_id ) # vseg start_vector
[319]	2010	byte_stream += mapping.int2bytes( 4, nb_vsegs ) # number of vsegs
	2011	byte_stream += mapping.int2bytes( 4, nb_tasks ) # number of tasks
	2012	byte_stream += mapping.int2bytes( 4, first_vseg_id ) # first vseg global index
	2013	byte_stream += mapping.int2bytes( 4, first_task_id ) # first task global index
	2014
	2015	if ( verbose ):
[512]	2016	print 'start_id = %d' % vseg_start_id
[319]	2017	print 'nb_vsegs = %d' % nb_vsegs
	2018	print 'nb_tasks = %d' % nb_tasks
	2019	print 'vseg_id = %d' % first_vseg_id
	2020	print 'task_id = %d' % first_task_id
	2021
	2022	return byte_stream
	2023
[512]	2024	########################################################################################
[305]	2025	class Task( object ):
[512]	2026	########################################################################################
[406]	2027	def __init__( self,
	2028	name,
	2029	trdid,
	2030	x,
[319]	2031	y,
[406]	2032	p,
	2033	stackname,
	2034	heapname,
[441]	2035	startid ):
[319]	2036
	2037	self.index = 0 # global index value set by addTask()
	2038	self.name = name # tsk name
	2039	self.trdid = trdid # task index (unique in vspace)
[406]	2040	self.x = x # cluster x coordinate
	2041	self.y = y # cluster y coordinate
	2042	self.p = p # processor local index
[512]	2043	self.stackname = stackname # name of vseg containing the stack
	2044	self.heapname = heapname # name of vseg containing the heap
[319]	2045	self.startid = startid # index in start_vector
[305]	2046	return
	2047
[319]	2048	################
	2049	def xml( self ): # xml for one task
	2050
	2051	s = ' <task name="%s"' % self.name
	2052	s += ' trdid="%d"' % self.trdid
	2053	s += ' x="%d"' % self.x
	2054	s += ' y="%d"' % self.y
	2055	s += ' p="%d"' % self.p
[512]	2056	s += '\n '
[319]	2057	s += ' stackname="%s"' % self.stackname
	2058	s += ' heapname="%s"' % self.heapname
	2059	s += ' startid="%d"' % self.startid
[406]	2060	s += ' />\n'
[319]	2061
[305]	2062	return s
	2063
[319]	2064	#####################################################
[406]	2065	def cbin( self, mapping, verbose, expected, vspace ): # C binary data structure for Task
[319]	2066
	2067	if ( verbose ):
	2068	print '*** cbin for task %s in vspace %s' % (self.name, vspace.name)
	2069
	2070	# check index
	2071	if (self.index != expected):
[512]	2072	print '[genmap error] in Task.cbin()'
	2073	print ' task global index = %d / expected = %d' %(self.index,expected)
[319]	2074	sys.exit(1)
	2075
	2076	# compute cluster global index
	2077	cluster_id = (self.x * mapping.y_size) + self.y
	2078
[512]	2079	# compute vseg index for stack
	2080	vseg_stack_id = 0xFFFFFFFF
[319]	2081	for vseg in vspace.vsegs:
[512]	2082	if ( vseg.name == self.stackname ): vseg_stack_id = vseg.index
	2083
	2084	if ( vseg_stack_id == 0xFFFFFFFF ):
	2085	print '[genmap error] in Task.cbin()'
	2086	print ' stackname %s not found for task %s in vspace %s' \
[319]	2087	% ( self.stackname, self.name, vspace.name )
	2088	sys.exit(1)
	2089
[512]	2090	# compute vseg index for heap
[453]	2091	if ( self.heapname == '' ):
[512]	2092	vseg_heap_id = 0
[453]	2093	else:
[512]	2094	vseg_heap_id = 0xFFFFFFFF
[453]	2095	for vseg in vspace.vsegs:
[512]	2096	if ( vseg.name == self.heapname ): vseg_heap_id = vseg.index
	2097
	2098	if ( vseg_heap_id == 0xFFFFFFFF ):
	2099	print '[genmap error] in Task.cbin()'
	2100	print ' heapname %s not found for task %s in vspace %s' \
[453]	2101	% ( self.heapname, self.name, vspace.name )
	2102	sys.exit(1)
[319]	2103
	2104	byte_stream = bytearray()
	2105	byte_stream += mapping.str2bytes( 32, self.name ) # task name in vspace
	2106	byte_stream += mapping.int2bytes( 4, cluster_id ) # cluster global index
[512]	2107	byte_stream += mapping.int2bytes( 4, self.p ) # processor local index
[319]	2108	byte_stream += mapping.int2bytes( 4, self.trdid ) # thread local index in vspace
[512]	2109	byte_stream += mapping.int2bytes( 4, vseg_stack_id ) # stack vseg local index
	2110	byte_stream += mapping.int2bytes( 4, vseg_heap_id ) # heap vseg local index
[406]	2111	byte_stream += mapping.int2bytes( 4, self.startid ) # index in start vector
[319]	2112
	2113	if ( verbose ):
	2114	print 'clusterid = %d' % cluster_id
	2115	print 'lpid = %d' % self.p
[406]	2116	print 'trdid = %d' % self.trdid
[512]	2117	print 'stackid = %d' % vseg_stack_id
	2118	print 'heapid = %d' % vseg_heap_id
[406]	2119	print 'startid = %d' % self.startid
	2120
[319]	2121	return byte_stream
	2122
[512]	2123	########################################################################################
[305]	2124	class Vseg( object ):
[512]	2125	########################################################################################
[406]	2126	def __init__( self,
	2127	name,
	2128	vbase,
[512]	2129	length,
[406]	2130	mode,
[512]	2131	vtype,
[406]	2132	x,
	2133	y,
[512]	2134	pseg,
[348]	2135	identity = False,
[411]	2136	local = False,
[512]	2137	big = False,
	2138	binpath = '' ):
[305]	2139
[512]	2140	assert (vbase & 0xFFFFFFFF) == vbase
	2141
	2142	assert (length & 0xFFFFFFFF) == length
	2143
[319]	2144	assert mode in VSEGMODES
	2145
[512]	2146	assert vtype in VSEGTYPES
	2147
	2148	assert (vtype != 'ELF') or (binpath != '')
	2149
[348]	2150	self.index = 0 # global index ( set by addVseg() )
[512]	2151	self.name = name # vseg name (unique in vspace)
	2152	self.vbase = vbase # virtual base address in vspace
	2153	self.length = length # vseg length (bytes)
	2154	self.vtype = vtype # vseg type (defined in VSEGTYPES)
[348]	2155	self.mode = mode # CXWU access rights
[406]	2156	self.x = x # x coordinate of destination cluster
[348]	2157	self.y = y # y coordinate of destination cluster
[512]	2158	self.psegname = pseg # name of pseg in destination cluster
[348]	2159	self.identity = identity # identity mapping required
[411]	2160	self.local = local # only mapped in local PTAB when true
	2161	self.big = big # to be mapped in a big physical page
[512]	2162	self.binpath = binpath # path name for binary file (ELF or BLOB)
	2163
[305]	2164	return
	2165
[319]	2166	################
[406]	2167	def xml( self ): # xml for one vseg
[319]	2168
[512]	2169	s = ' <vseg name="%s"' %(self.name)
	2170	s += ' vbase="0x%x"' %(self.vbase)
	2171	s += ' length="0x%x"' %(self.length)
	2172	s += ' type="%s"' %(self.vtype)
	2173	s += ' mode="%s"' %(self.mode)
	2174	s += '\n '
	2175	s += ' x="%d"' %(self.x)
	2176	s += ' y="%d"' %(self.y)
	2177	s += ' psegname="%s"' %(self.psegname)
	2178	if ( self.identity ): s += ' ident="1"'
	2179	if ( self.local ): s += ' local="1"'
	2180	if ( self.big ): s += ' big="1"'
	2181	if ( self.binpath != '' ): s += ' binpath="%s"' %(self.binpath)
	2182	s += ' />\n'
[319]	2183
[305]	2184	return s
	2185
[319]	2186	#############################################
	2187	def cbin( self, mapping, verbose, expected ): # C binary structure for Vseg
	2188
	2189	if ( verbose ):
	2190	print '*** cbin for vseg[%d] %s' % (self.index, self.name)
	2191
	2192	# check index
	2193	if (self.index != expected):
[512]	2194	print '[genmap error] in Vseg.cbin()'
	2195	print ' vseg global index = %d / expected = %d' \
[319]	2196	% (self.index, expected )
	2197	sys.exit(1)
	2198
	2199	# compute pseg_id
	2200	pseg_id = 0xFFFFFFFF
	2201	cluster_id = (self.x * mapping.y_size) + self.y
	2202	cluster = mapping.clusters[cluster_id]
	2203	for pseg in cluster.psegs:
	2204	if (self.psegname == pseg.name):
	2205	pseg_id = pseg.index
	2206	if (pseg_id == 0xFFFFFFFF):
[512]	2207	print '[genmap error] in Vseg.cbin() : '
	2208	print ' psegname %s not found for vseg %s in cluster %d' \
[319]	2209	% ( self.psegname, self.name, cluster_id )
	2210	sys.exit(1)
	2211
	2212	# compute numerical value for mode
	2213	mode_id = 0xFFFFFFFF
[406]	2214	for x in xrange( len(VSEGMODES) ):
	2215	if ( self.mode == VSEGMODES[x] ):
[319]	2216	mode_id = x
	2217	if ( mode_id == 0xFFFFFFFF ):
[512]	2218	print '[genmap error] in Vseg.cbin() : '
	2219	print ' undefined vseg mode %s' % self.mode
[319]	2220	sys.exit(1)
	2221
[512]	2222	# compute numerical value for vtype
	2223	vtype_id = 0xFFFFFFFF
	2224	for x in xrange( len(VSEGTYPES) ):
	2225	if ( self.vtype == VSEGTYPES[x] ):
	2226	vtype_id = x
	2227	if ( vtype_id == 0xFFFFFFFF ):
	2228	print '[genmap error] in Vseg.cbin()'
	2229	print ' undefined vseg type %s' % self.vtype
	2230	sys.exit(1)
[319]	2231
	2232	byte_stream = bytearray()
[406]	2233	byte_stream += mapping.str2bytes( 32, self.name ) # vseg name
[512]	2234	byte_stream += mapping.str2bytes( 64, self.binpath ) # binpath
[319]	2235	byte_stream += mapping.int2bytes( 4, self.vbase ) # virtual base address
	2236	byte_stream += mapping.int2bytes( 8, 0 ) # physical base address
[512]	2237	byte_stream += mapping.int2bytes( 4, self.length ) # vseg size (bytes)
	2238	byte_stream += mapping.int2bytes( 4, pseg_id ) # pseg global index
[319]	2239	byte_stream += mapping.int2bytes( 4, mode_id ) # CXWU flags
[512]	2240	byte_stream += mapping.int2bytes( 4, vtype_id ) # vseg type
[319]	2241	byte_stream += mapping.int2bytes( 1, 0 ) # mapped when non zero
[512]	2242	byte_stream += mapping.int2bytes( 1, self.identity ) # identity mapping
[411]	2243	byte_stream += mapping.int2bytes( 1, self.local ) # only mapped in local PTAB
[512]	2244	byte_stream += mapping.int2bytes( 1, self.big ) # to be mapped in BPP
[319]	2245
	2246	if ( verbose ):
[512]	2247	print 'binpath = %s' % self.binpath
[319]	2248	print 'vbase = %x' % self.vbase
[512]	2249	print 'pbase = 0'
	2250	print 'length = %x' % self.length
[319]	2251	print 'pseg_id = %d' % pseg_id
[512]	2252	print 'mode = %d' % mode_id
	2253	print 'type = %d' % vtype_id
	2254	print 'mapped = 0'
	2255	print 'ident = %d' % self.identity
	2256	print 'local = %d' % self.local
	2257	print 'big = %d' % self.big
[406]	2258
[319]	2259	return byte_stream
	2260
[512]	2261	######################################################################################
[305]	2262	class Processor ( object ):
[512]	2263	######################################################################################
[319]	2264	def __init__( self,
[406]	2265	x,
	2266	y,
[319]	2267	lpid ):
	2268
	2269	self.index = 0 # global index ( set by addProc() )
	2270	self.x = x # x cluster coordinate
	2271	self.y = y # y cluster coordinate
	2272	self.lpid = lpid # processor local index
	2273
[305]	2274	return
	2275
[319]	2276	################
[406]	2277	def xml( self ): # xml for a processor
[305]	2278	return ' <proc index="%d" />\n' % (self.lpid)
	2279
[319]	2280	#############################################
	2281	def cbin( self, mapping, verbose, expected ): # C binary structure for Proc
	2282
	2283	if ( verbose ):
	2284	print '*** cbin for proc %d in cluster (%d,%d)' % (self.lpid, self.x, self.y)
	2285
	2286	# check index
	2287	if (self.index != expected):
[512]	2288	print '[genmap error] in Proc.cbin()'
	2289	print ' proc global index = %d / expected = %d' % (self.index,expected)
[319]	2290	sys.exit(1)
	2291
	2292	byte_stream = bytearray()
	2293	byte_stream += mapping.int2bytes( 4 , self.lpid ) # local index
[406]	2294
[319]	2295	return byte_stream
	2296
[512]	2297	######################################################################################
[305]	2298	class Pseg ( object ):
[512]	2299	######################################################################################
[406]	2300	def __init__( self,
	2301	name,
	2302	base,
	2303	size,
[319]	2304	x,
	2305	y,
	2306	segtype ):
	2307
	2308	assert( segtype in PSEGTYPES )
	2309
	2310	self.index = 0 # global index ( set by addPseg() )
	2311	self.name = name # pseg name (unique in cluster)
	2312	self.base = base # physical base address
	2313	self.size = size # segment size (bytes)
[406]	2314	self.x = x # cluster x coordinate
	2315	self.y = y # cluster y coordinate
[319]	2316	self.segtype = segtype # RAM / PERI (defined in mapping_info.h)
	2317
[305]	2318	return
[406]	2319
[319]	2320	################
	2321	def xml( self ): # xml for a pseg
	2322
[305]	2323	return ' <pseg name="%s" type="%s" base="0x%x" length="0x%x" />\n' \
	2324	% (self.name, self.segtype, self.base, self.size)
	2325
[319]	2326	######################################################
	2327	def cbin( self, mapping, verbose, expected, cluster ): # C binary structure for Pseg
	2328
	2329	if ( verbose ):
	2330	print '*** cbin for pseg[%d] %s in cluster[%d,%d]' \
	2331	% (self.index, self.name, cluster.x, cluster.y)
	2332
	2333	# check index
	2334	if (self.index != expected):
[512]	2335	print '[genmap error] in Pseg.cbin()'
	2336	print ' pseg global index = %d / expected = %d' % (self.index,expected)
[319]	2337	sys.exit(1)
[406]	2338
[319]	2339	# compute numerical value for segtype
	2340	segtype_int = 0xFFFFFFFF
[406]	2341	for x in xrange( len(PSEGTYPES) ):
[512]	2342	if ( self.segtype == PSEGTYPES[x] ): segtype_int = x
	2343
[319]	2344	if ( segtype_int == 0xFFFFFFFF ):
[512]	2345	print '[genmap error] in Pseg.cbin()'
	2346	print ' undefined segment type %s' % self.segtype
[319]	2347	sys.exit(1)
	2348
	2349	byte_stream = bytearray()
[406]	2350	byte_stream += mapping.str2bytes( 32, self.name ) # pseg name
[319]	2351	byte_stream += mapping.int2bytes( 8 , self.base ) # physical base address
	2352	byte_stream += mapping.int2bytes( 8 , self.size ) # segment length
	2353	byte_stream += mapping.int2bytes( 4 , segtype_int ) # segment type
	2354	byte_stream += mapping.int2bytes( 4 , cluster.index ) # cluster global index
[406]	2355	byte_stream += mapping.int2bytes( 4 , 0 ) # linked list of vsegs
[319]	2356
	2357	if ( verbose ):
	2358	print 'pbase = %x' % self.base
	2359	print 'size = %x' % self.size
	2360	print 'type = %s' % self.segtype
[406]	2361
[319]	2362	return byte_stream
	2363
[512]	2364	######################################################################################
[319]	2365	class Periph ( object ):
[512]	2366	######################################################################################
[406]	2367	def __init__( self,
[319]	2368	pseg, # associated pseg
	2369	ptype, # peripheral type
	2370	subtype = 'NONE', # peripheral subtype
	2371	channels = 1, # for multi-channels peripherals
	2372	arg = 0 ): # optional argument (semantic depends on ptype)
	2373
	2374	assert ptype in PERIPHTYPES
	2375
	2376	assert subtype in PERIPHSUBTYPES
	2377
	2378	self.index = 0 # global index ( set by addPeriph() )
[406]	2379	self.channels = channels
	2380	self.ptype = ptype
	2381	self.subtype = subtype
[319]	2382	self.arg = arg
	2383	self.pseg = pseg
	2384	self.irqs = []
[305]	2385	return
	2386
[319]	2387	################
	2388	def xml( self ): # xml for a periph
	2389
	2390	s = ' <periph type="%s"' % self.ptype
	2391	s += ' subtype="%s"' % self.subtype
	2392	s += ' psegname="%s"' % self.pseg.name
	2393	s += ' channels="%d"' % self.channels
	2394	s += ' arg="%d" >\n' % self.arg
[441]	2395	if ( (self.ptype == 'PIC') or (self.ptype == 'XCU') ):
[319]	2396	for irq in self.irqs: s += irq.xml()
[305]	2397	s += ' </periph>\n'
[319]	2398
[305]	2399	return s
	2400
[319]	2401	#############################################
	2402	def cbin( self, mapping, verbose, expected ): # C binary structure for Periph
[305]	2403
[319]	2404	if ( verbose ):
	2405	print '*** cbin for periph %s in cluster [%d,%d]' \
	2406	% (self.ptype, self.pseg.x, self.pseg.y)
[305]	2407
[319]	2408	# check index
	2409	if (self.index != expected):
[512]	2410	print '[genmap error] in Periph.cbin()'
	2411	print ' periph global index = %d / expected = %d' % (self.index,expected)
[319]	2412	sys.exit(1)
[305]	2413
[319]	2414	# compute pseg global index
	2415	pseg_id = self.pseg.index
[305]	2416
[319]	2417	# compute first irq global index
	2418	if ( len(self.irqs) > 0 ):
	2419	irq_id = self.irqs[0].index
	2420	else:
	2421	irq_id = 0
[305]	2422
[319]	2423	# compute numerical value for ptype
	2424	ptype_id = 0xFFFFFFFF
[406]	2425	for x in xrange( len(PERIPHTYPES) ):
[319]	2426	if ( self.ptype == PERIPHTYPES[x] ): ptype_id = x
[512]	2427
[319]	2428	if ( ptype_id == 0xFFFFFFFF ):
[512]	2429	print '[genmap error] in Periph.cbin()'
	2430	print ' undefined peripheral type %s' % self.ptype
[319]	2431	sys.exit(1)
[305]	2432
[319]	2433	# compute numerical value for subtype
	2434	subtype_id = 0xFFFFFFFF
[406]	2435	for x in xrange( len(PERIPHSUBTYPES) ):
[319]	2436	if ( self.subtype == PERIPHSUBTYPES[x] ): subtype_id = x
[305]	2437
[319]	2438	# compute
	2439	byte_stream = bytearray()
[406]	2440	byte_stream += mapping.int2bytes( 4 , ptype_id ) # peripheral type
[319]	2441	byte_stream += mapping.int2bytes( 4 , subtype_id ) # peripheral subtype
[406]	2442	byte_stream += mapping.int2bytes( 4 , pseg_id ) # pseg global index
[319]	2443	byte_stream += mapping.int2bytes( 4 , self.channels ) # number of channels
	2444	byte_stream += mapping.int2bytes( 4 , self.arg ) # optionnal argument
[406]	2445	byte_stream += mapping.int2bytes( 4 , len( self.irqs ) ) # number of input irqs
	2446	byte_stream += mapping.int2bytes( 4 , irq_id ) # first irq global index
[305]	2447
[319]	2448	if ( verbose ):
	2449	print 'ptype = %d' % ptype_id
	2450	print 'pseg_id = %d' % pseg_id
	2451	print 'nb_irqs = %d' % len( self.irqs )
[406]	2452	print 'irq_id = %d' % irq_id
[319]	2453	return byte_stream
[305]	2454
[512]	2455	######################################################################################
[319]	2456	class Irq ( object ):
[512]	2457	######################################################################################
[406]	2458	def __init__( self,
[319]	2459	irqtype, # input IRQ type : HWI / WTI / PTI (for XCU only)
	2460	srcid, # input IRQ index (for XCU or PIC)
	2461	isrtype, # Type of ISR to be executed
	2462	channel = 0 ): # channel index for multi-channel ISR
[305]	2463
[319]	2464	assert irqtype in IRQTYPES
	2465	assert isrtype in ISRTYPES
	2466	assert srcid < 32
[305]	2467
[319]	2468	self.index = 0 # global index ( set by addIrq() )
[406]	2469	self.irqtype = irqtype # IRQ type
[319]	2470	self.srcid = srcid # source IRQ index
[406]	2471	self.isrtype = isrtype # ISR type
[319]	2472	self.channel = channel # channel index (for multi-channels ISR)
[305]	2473	return
	2474
[319]	2475	################
	2476	def xml( self ): # xml for Irq
[305]	2477
[319]	2478	return ' <irq srctype="%s" srcid="%d" isr="%s" channel="%d" />\n' \
	2479	% ( self.irqtype, self.srcid, self.isrtype, self.channel )
[305]	2480
[319]	2481	#############################################
	2482	def cbin( self, mapping, verbose, expected ): # C binary structure for Irq
[305]	2483
[319]	2484	if ( verbose ):
[406]	2485	print '*** cbin for irq[%d]' % (self.index)
[305]	2486
[319]	2487	# check index
	2488	if (self.index != expected):
[512]	2489	print '[genmap error] in Irq.cbin()'
	2490	print ' irq global index = %d / expected = %d' % (self.index,expected)
[319]	2491	sys.exit(1)
[305]	2492
[319]	2493	# compute numerical value for irqtype
	2494	irqtype_id = 0xFFFFFFFF
	2495	for x in xrange( len(IRQTYPES) ):
[512]	2496	if ( self.irqtype == IRQTYPES[x] ): irqtype_id = x
	2497
[319]	2498	if ( irqtype_id == 0xFFFFFFFF ):
[512]	2499	print '[genmap error] in Irq.cbin()'
	2500	print ' undefined irqtype %s' % self.irqtype
[319]	2501	sys.exit(1)
[305]	2502
[319]	2503	# compute numerical value for isrtype
	2504	isrtype_id = 0xFFFFFFFF
[406]	2505	for x in xrange( len(ISRTYPES) ):
[512]	2506	if ( self.isrtype == ISRTYPES[x] ): isrtype_id = x
	2507
[319]	2508	if ( isrtype_id == 0xFFFFFFFF ):
[512]	2509	print '[genmap error] in Irq.cbin()'
	2510	print ' undefined isrtype %s' % self.isrtype
[319]	2511	sys.exit(1)
	2512
	2513	byte_stream = bytearray()
	2514	byte_stream += mapping.int2bytes( 4, irqtype_id )
	2515	byte_stream += mapping.int2bytes( 4, self.srcid )
	2516	byte_stream += mapping.int2bytes( 4, isrtype_id )
	2517	byte_stream += mapping.int2bytes( 4, self.channel )
	2518	byte_stream += mapping.int2bytes( 4, 0 )
	2519	byte_stream += mapping.int2bytes( 4, 0 )
	2520
	2521	if ( verbose ):
	2522	print 'irqtype = %s' % self.irqtype
	2523	print 'srcid = %d' % self.srcid
	2524	print 'isrtype = %s' % self.isrtype
	2525	print 'channel = %d' % self.channel
	2526
	2527	return byte_stream
	2528
[512]	2529	######################################################################################
[319]	2530	class Coproc ( object ):
[512]	2531	######################################################################################
[406]	2532	def __init__( self,
	2533	pseg ): # associated pseg
[319]	2534
	2535	self.index = 0 # global index value set by addCoproc()
	2536	self.pseg = pseg
	2537	self.ports = []
	2538
[305]	2539	return
	2540
[319]	2541	################
[406]	2542	def xml( self ): # xml for Coproc
[305]	2543
[348]	2544	print '[genmap error] in Coproc.xml() : not defined yet'
[319]	2545	sys.exit(1)
	2546
[406]	2547	return
[319]	2548
	2549	#############################################
	2550	def cbin( self, mapping, verbose, expected ): # C binary structure for Coproc
	2551
	2552	if ( verbose ):
	2553	print '*** cbin for coproc in cluster (%d,%d)' % (self.pseg.x, self.pseg.y)
	2554
	2555	# check index
	2556	if (self.index != expected):
[512]	2557	print '[genmap error] in Coproc.cbin()'
	2558	print ' coproc global index = %d / expected = %d' % (self.index,expected)
[319]	2559	sys.exit(1)
	2560
	2561	# compute pseg global index
	2562	pseg_id = self.pseg.index
	2563
	2564	# compute first port global index
	2565	port_id = self.ports[0].index
	2566
	2567	byte_stream = bytearray()
	2568	byte_stream += mapping.str2bytes( 32, self.pseg.name ) # probablement inutile (AG)
[406]	2569	byte_stream += mapping.int2bytes( 4 , pseg_id ) # pseg global index
	2570	byte_stream += mapping.int2bytes( 4 , len( self.ports ) ) # number of input irqs
	2571	byte_stream += mapping.int2bytes( 4 , port_id ) # first port global index
	2572
[319]	2573	if ( verbose ):
	2574	print 'irqtype = %s' % self.irqtype
	2575	print 'pseg_id = %d' % pseg_id
	2576	print 'nb_ports = %d' % len( self.ports )
	2577	print 'port_id %d' % port_id
[406]	2578
[319]	2579	return byte_stream
	2580
[512]	2581	######################################################################################
[319]	2582	class Cpport ( object ):
[512]	2583	######################################################################################
[406]	2584	def __init__( self,
	2585	direction,
	2586	vspacename,
[319]	2587	mwmrname ):
	2588
	2589	self.index = 0 # global index ( set by addCpport() )
	2590	self.direction = direction # TO_COPROC / FROM_COPROC
	2591	self.vspacename = vspacename # name of vspace containing mwmr channel
[512]	2592	self.mwmrname = mwmrname # name of vseg defining mwmr channel
[319]	2593
[305]	2594	return
	2595
[319]	2596	################
	2597	def xml( self ): # xml for Cpport
[305]	2598
[348]	2599	print '[genmap error] in Cpport.xml() : not defined yet'
[319]	2600	sys.exit(1)
[305]	2601
[406]	2602	return
[319]	2603
	2604	#############################################
	2605	def cbin( self, mapping, verbose, expected ): # C binary structure for Cpport
	2606
	2607	if ( verbose ):
	2608	print '*** cbin for cpport[%d]' % (self.index)
	2609
	2610	# check index
	2611	if ( self.index != expected ):
[512]	2612	print '[genmap error] in Cpport.cbin()'
	2613	print ' port global index = %d / expected = %d' % (self.index,expected)
[319]	2614	sys.exit(1)
	2615
	2616	# compute numerical value for direction
	2617	if ( self.direction == 'TO_COPROC' ):
	2618	dir_int = 0
	2619	else:
	2620	dir_int = 1
	2621
	2622	# compute vspace global index
	2623	vspace_id = 0xFFFFFFFF
	2624	for vspace in mapping.vspaces:
[512]	2625	if ( self.vspacename == vspace.name ): vspace_id = vspace.index
	2626
[319]	2627	if (vspace_id == 0xFFFFFFFF):
[512]	2628	print '[genmap error] in Cpport.cbin()'
	2629	print ' vspace name %s not found' % ( self.vspacename )
[319]	2630	sys.exit(1)
	2631
[512]	2632	# compute mwmr vseg global index
[319]	2633	mwmr_id = 0xFFFFFFFF
	2634	for vseg in mapping.vspace[vspace_id].vsegs:
[512]	2635	if (self.mwmrname == vseg.name): mwmr_id = vseg.index
	2636
[319]	2637	if (mwmr_id == 0xFFFFFFFF):
[512]	2638	print '[genmap error] in Cpport.cbin()'
	2639	print ' mwmr vseg name %s not found in vspace %s' \
[319]	2640	% ( self.mwmrname, self.vspacename )
	2641	sys.exit(1)
	2642
	2643	byte_stream = bytearray()
[406]	2644	byte_stream += mapping.int2bytes( 4 , dir_int ) # pseg global index
	2645	byte_stream += mapping.int2bytes( 4 , vspace_id ) # vspace global index
[512]	2646	byte_stream += mapping.int2bytes( 4 , mwmr_id ) # mwmr vseg global index
[406]	2647
[319]	2648	if ( verbose ):
	2649	print 'direction = %s' % self.direction
	2650	print 'vspace_id = %d' % vspace_id
	2651	print 'mwmr_id = %d' % mwmr_id
	2652
	2653	return byte_stream
	2654
	2655
[305]	2656	# Local Variables:
	2657	# tab-width: 4;
	2658	# c-basic-offset: 4;
	2659	# c-file-offsets:((innamespace . 0)(inline-open . 0));
	2660	# indent-tabs-mode: nil;
	2661	# End:
	2662	#
	2663	# vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
	2664

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