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source: soft/giet_vm/giet_python/mapping.py @ 755

Last change on this file since 755 was 742, checked in by alain, 9 years ago
Remove the seg_kernel_init vseg: All the kernel code is now packed in one single seg_kernel_code vseg. The entry point for the _kernel_init() function (from the boot code is now at vaddr = 0x80000000. The goal is to use only one BPP per cluster for the replicated kernel code.
Property svn:executable set to ``*
File size: 101.3 KB

Rev	Line
[425]	1	#!/usr/bin/env python
[305]	2
[319]	3	import sys
	4
[539]	5	###################################################################################
[305]	6	# file : giet_mapping.py
	7	# date : april 2014
	8	# author : Alain Greiner
[539]	9	###################################################################################
[319]	10	# This file contains the classes required to define a mapping for the GIET_VM.
	11	# - A 'Mapping' contains a set of 'Cluster' (hardware architecture)
[709]	12	# a set of 'Vseg' (kernel global virtual segments)
[520]	13	# a set of 'Vspace' (one or several user applications)
[512]	14	# - A 'Cluster' contains a set of 'Pseg' (physical segments in cluster)
[319]	15	# a set of 'Proc' (processors in cluster)
	16	# a set of 'Periph' (peripherals in cluster)
[512]	17	# - A 'Vspace' contains a set of 'Vseg' (user virtual segments)
[709]	18	# a set of 'Thread' (POSIX thread)
[441]	19	# - A 'Periph' contains a set of 'Irq' (only for XCU and PIC types )
[539]	20	###################################################################################
[319]	21	# Implementation Note
[512]	22	# The objects used to describe a mapping are distributed in the PYTHON structure:
[319]	23	# For example the psegs set is split in several subsets (one subset per cluster),
[709]	24	# or the threads set is split in several subsets (one subset per vspace), etc...
[319]	25	# In the C binary data structure used by the giet_vm, all objects of same type
[406]	26	# are stored in a linear array (one single array for all psegs for example).
[539]	27	# For all objects, we compute and store in the PYTHON object a "global index"
[406]	28	# corresponding to the index in this global array, and this index can be used as
[319]	29	# a pseudo-pointer to identify a specific object of a given type.
[539]	30	###################################################################################
[305]	31
[539]	32	###################################################################################
[411]	33	# Various constants
[539]	34	###################################################################################
[411]	35
	36	PADDR_WIDTH = 40 # number of bits for physical address
	37	X_WIDTH = 4 # number of bits encoding x coordinate
	38	Y_WIDTH = 4 # number of bits encoding y coordinate
	39	P_WIDTH = 4 # number of bits encoding local proc_id
[539]	40	VPN_ANTI_MASK = 0x00000FFF # mask vaddr to get offset in small page
	41	BPN_MASK = 0xFFE00000 # mask vaddr to get the BPN in big page
	42	PERI_INCREMENT = 0x10000 # virtual address increment for replicated vsegs
[411]	43	RESET_ADDRESS = 0xBFC00000 # Processor wired boot_address
[539]	44	MAPPING_SIGNATURE = 0xDACE2014 # Magic number indicating a valid C BLOB
[411]	45
[539]	46	###################################################################################
[520]	47	# These lists must be consistent with values defined in
	48	# mapping_info.h / xml_driver.c /xml_parser.c
[539]	49	###################################################################################
[319]	50	PERIPHTYPES = [
	51	'CMA',
	52	'DMA',
	53	'FBF',
	54	'IOB',
	55	'IOC',
	56	'MMC',
	57	'MWR',
	58	'NIC',
	59	'ROM',
	60	'SIM',
	61	'TIM',
	62	'TTY',
	63	'XCU',
	64	'PIC',
[491]	65	'DROM',
[319]	66	]
	67
[520]	68	IOCSUBTYPES = [
[319]	69	'BDV',
	70	'HBA',
[546]	71	'SDC',
[565]	72	'SPI',
[319]	73	]
	74
[520]	75	MWRSUBTYPES = [
[737]	76	'CPY',
[520]	77	'GCD',
	78	'DCT',
	79	]
	80
[539]	81	###################################################################################
[520]	82	# These lists must be consistent with values defined in
	83	# irq_handler.c / irq_handler.h / xml_driver.c / xml_parser.c
[539]	84	###################################################################################
[319]	85	IRQTYPES = [
	86	'HWI',
	87	'WTI',
	88	'PTI',
	89	]
	90
	91	ISRTYPES = [
	92	'ISR_DEFAULT',
	93	'ISR_TICK',
	94	'ISR_TTY_RX',
	95	'ISR_TTY_TX',
	96	'ISR_BDV',
	97	'ISR_TIMER',
	98	'ISR_WAKUP',
	99	'ISR_NIC_RX',
	100	'ISR_NIC_TX',
	101	'ISR_CMA',
	102	'ISR_MMC',
	103	'ISR_DMA',
[546]	104	'ISR_SDC',
[532]	105	'ISR_MWR',
	106	'ISR_HBA',
[565]	107	'ISR_SPI',
[319]	108	]
	109
[512]	110	VSEGTYPES = [
[319]	111	'ELF',
	112	'BLOB',
	113	'PTAB',
	114	'PERI',
	115	'BUFFER',
[512]	116	'SCHED',
[471]	117	'HEAP',
[319]	118	]
	119
	120	VSEGMODES = [
	121	'____',
	122	'___U',
	123	'__W_',
	124	'__WU',
	125	'_X__',
	126	'_X_U',
	127	'_XW_',
	128	'_XWU',
	129	'C___',
	130	'C__U',
	131	'C_W_',
	132	'C_WU',
	133	'CX__',
	134	'CX_U',
	135	'CXW_',
	136	'CXWU',
	137	]
	138
	139	PSEGTYPES = [
	140	'RAM',
	141	'PERI',
	142	]
	143
[539]	144	###################################################################################
[305]	145	class Mapping( object ):
[539]	146	###################################################################################
[305]	147	def __init__( self,
[411]	148	name, # mapping name
	149	x_size, # number of clusters in a row
	150	y_size, # number of clusters in a column
[421]	151	nprocs, # max number of processors per cluster
[411]	152	x_width = X_WIDTH, # number of bits encoding x coordinate
	153	y_width = Y_WIDTH, # number of bits encoding y coordinate
[512]	154	p_width = P_WIDTH, # number of bits encoding lpid
[411]	155	paddr_width = PADDR_WIDTH, # number of bits for physical address
[512]	156	coherence = 1, # hardware cache coherence if non-zero
[411]	157	irq_per_proc = 1, # number or IRQs from XCU to processor
	158	use_ramdisk = False, # use ramdisk when true
	159	x_io = 0, # cluster_io x coordinate
	160	y_io = 0, # cluster_io y coordinate
	161	peri_increment = PERI_INCREMENT, # address increment for globals
	162	reset_address = RESET_ADDRESS, # Processor wired boot_address
	163	ram_base = 0, # RAM physical base in cluster[0,0]
[539]	164	ram_size = 0 ): # RAM size per cluster (bytes)
[305]	165
[411]	166	assert ( x_size <= (1<<X_WIDTH) )
	167	assert ( y_size <= (1<<Y_WIDTH) )
	168	assert ( nprocs <= (1<<P_WIDTH) )
[406]	169
[411]	170	self.signature = MAPPING_SIGNATURE
[319]	171	self.name = name
[497]	172	self.name = name
[406]	173	self.paddr_width = paddr_width
[319]	174	self.coherence = coherence
	175	self.x_size = x_size
	176	self.y_size = y_size
[441]	177	self.nprocs = nprocs
[319]	178	self.x_width = x_width
	179	self.y_width = y_width
[406]	180	self.p_width = p_width
[319]	181	self.irq_per_proc = irq_per_proc
	182	self.use_ramdisk = use_ramdisk
	183	self.x_io = x_io
	184	self.y_io = y_io
[328]	185	self.peri_increment = peri_increment
[319]	186	self.reset_address = reset_address
[356]	187	self.ram_base = ram_base
	188	self.ram_size = ram_size
[305]	189
[319]	190	self.total_vspaces = 0
	191	self.total_globals = 0
	192	self.total_psegs = 0
	193	self.total_vsegs = 0
[709]	194	self.total_threads = 0
[319]	195	self.total_procs = 0
	196	self.total_irqs = 0
	197	self.total_periphs = 0
[305]	198
[319]	199	self.clusters = []
	200	self.globs = []
	201	self.vspaces = []
[305]	202
[319]	203	for x in xrange( self.x_size ):
	204	for y in xrange( self.y_size ):
	205	cluster = Cluster( x , y )
[406]	206	cluster.index = (x * self.y_size) + y
[319]	207	self.clusters.append( cluster )
[305]	208
	209	return
	210
[319]	211	########################## add a ram pseg in a cluster
[406]	212	def addRam( self,
[319]	213	name, # pseg name
	214	base, # pseg base address
	215	size ): # pseg length (bytes)
[406]	216
[497]	217	# computes cluster index and coordinates from the base address
[356]	218	paddr_lsb_width = self.paddr_width - self.x_width - self.y_width
	219	cluster_xy = base >> paddr_lsb_width
[497]	220	x = cluster_xy >> (self.y_width);
	221	y = cluster_xy & ((1 << self.y_width) - 1)
	222	cluster_id = (x * self.y_size) + y
[305]	223
[411]	224	assert (base & VPN_ANTI_MASK) == 0
[319]	225
	226	assert (x < self.x_size) and (y < self.y_size)
[406]	227
[356]	228	assert ( (base & ((1<<paddr_lsb_width)-1)) == self.ram_base )
	229
	230	assert ( size == self.ram_size )
	231
[319]	232	# add one pseg in the mapping
	233	pseg = Pseg( name, base, size, x, y, 'RAM' )
	234	self.clusters[cluster_id].psegs.append( pseg )
	235	pseg.index = self.total_psegs
	236	self.total_psegs += 1
	237
	238	return pseg
	239
[512]	240	########################## add a peripheral and the associated pseg in a cluster
[406]	241	def addPeriph( self,
[319]	242	name, # associated pseg name
	243	base, # associated pseg base address
	244	size, # associated pseg length (bytes)
[406]	245	ptype, # peripheral type
[319]	246	subtype = 'NONE', # peripheral subtype
	247	channels = 1, # number of channels
[520]	248	arg0 = 0, # optional argument (semantic depends on ptype)
	249	arg1 = 0, # optional argument (semantic depends on ptype)
	250	arg2 = 0, # optional argument (semantic depends on ptype)
	251	arg3 = 0 ): # optional argument (semantic depends on ptype)
[319]	252
[497]	253	# computes cluster index and coordinates from the base address
[319]	254	cluster_xy = base >> (self.paddr_width - self.x_width - self.y_width)
[497]	255	x = cluster_xy >> (self.y_width);
	256	y = cluster_xy & ((1 << self.y_width) - 1)
	257	cluster_id = (x * self.y_size) + y
[305]	258
[319]	259	assert (x < self.x_size) and (y < self.y_size)
	260
[411]	261	assert (base & VPN_ANTI_MASK) == 0
[319]	262
	263	assert ptype in PERIPHTYPES
	264
[520]	265	if (ptype == 'IOC'): assert subtype in IOCSUBTYPES
	266	if (ptype == 'MWR'): assert subtype in MWRSUBTYPES
[319]	267
	268	# add one pseg into mapping
	269	pseg = Pseg( name, base, size, x, y, 'PERI' )
	270	self.clusters[cluster_id].psegs.append( pseg )
	271	pseg.index = self.total_psegs
	272	self.total_psegs += 1
	273
	274	# add one periph into mapping
[520]	275	periph = Periph( pseg, ptype, subtype, channels, arg0, arg1, arg2, arg3 )
[319]	276	self.clusters[cluster_id].periphs.append( periph )
	277	periph.index = self.total_periphs
	278	self.total_periphs += 1
	279
	280	return periph
	281
	282	################################ add an IRQ in a peripheral
	283	def addIrq( self,
	284	periph, # peripheral containing IRQ (PIC or XCU)
	285	index, # peripheral input port index
[562]	286	src, # interrupt source peripheral
[319]	287	isrtype, # ISR type
	288	channel = 0 ): # channel for multi-channels ISR
	289
	290	assert isrtype in ISRTYPES
	291
	292	assert index < 32
	293
[406]	294	# add one irq into mapping
[319]	295	irq = Irq( 'HWI', index , isrtype, channel )
	296	periph.irqs.append( irq )
	297	irq.index = self.total_irqs
	298	self.total_irqs += 1
	299
[562]	300	# pointer from the source to the interrupt controller peripheral
	301	if src.irq_ctrl == None: src.irq_ctrl = periph
	302	if src.irq_ctrl != periph:
	303	print '[genmap error] in addIrq():'
	304	print ' two different interrupt controller for the same peripheral'
	305	sys.exit(1)
	306
[319]	307	return irq
	308
	309	########################## add a processor in a cluster
[406]	310	def addProc( self,
[319]	311	x, # cluster x coordinate
	312	y, # cluster y coordinate
[520]	313	lpid ): # processor local index
[319]	314
	315	assert (x < self.x_size) and (y < self.y_size)
	316
	317	cluster_id = (x * self.y_size) + y
	318
[406]	319	# add one proc into mapping
[520]	320	proc = Processor( x, y, lpid )
[319]	321	self.clusters[cluster_id].procs.append( proc )
	322	proc.index = self.total_procs
[305]	323	self.total_procs += 1
	324
[319]	325	return proc
	326
[411]	327	############################ add one global vseg into mapping
	328	def addGlobal( self,
	329	name, # vseg name
	330	vbase, # virtual base address
[512]	331	length, # vseg length (bytes)
[411]	332	mode, # CXWU flags
[512]	333	vtype, # vseg type
[411]	334	x, # destination x coordinate
	335	y, # destination y coordinate
	336	pseg, # destination pseg name
	337	identity = False, # identity mapping required if true
	338	local = False, # only mapped in local PTAB if true
[512]	339	big = False, # to be mapped in a big physical page
	340	binpath = '' ): # pathname for binary code if required
[319]	341
[411]	342	# two global vsegs must not overlap if they have different names
	343	for prev in self.globs:
[512]	344	if ( ((prev.vbase + prev.length) > vbase ) and
	345	((vbase + length) > prev.vbase) and
[546]	346	(prev.name[0:15] != name[0:15]) ):
[512]	347	print '[genmap error] in addGlobal()'
	348	print ' global vseg %s overlap %s' % (name, prev.name)
[546]	349	print ' %s : base = %x / size = %x' %(name, vbase, length)
	350	print ' %s : base = %x / size = %x' %(prev.name, prev.vbase, prev.length)
[411]	351	sys.exit(1)
	352
[328]	353	# add one vseg into mapping
[512]	354	vseg = Vseg( name, vbase, length, mode, vtype, x, y, pseg,
	355	identity = identity, local = local, big = big, binpath = binpath )
[348]	356
[328]	357	self.globs.append( vseg )
	358	self.total_globals += 1
[406]	359	vseg.index = self.total_vsegs
[328]	360	self.total_vsegs += 1
[406]	361
[305]	362	return
	363
[319]	364	################################ add a vspace into mapping
[406]	365	def addVspace( self,
[319]	366	name, # vspace name
[642]	367	startname, # name of vseg containing start_vector
	368	active = False ): # default value is not active at boot
[319]	369
	370	# add one vspace into mapping
[642]	371	vspace = Vspace( name, startname, active )
[305]	372	self.vspaces.append( vspace )
[319]	373	vspace.index = self.total_vspaces
	374	self.total_vspaces += 1
	375
	376	return vspace
[406]	377
[512]	378	################################# add a private vseg in a vspace
[319]	379	def addVseg( self,
[406]	380	vspace, # vspace containing the vseg
[319]	381	name, # vseg name
	382	vbase, # virtual base address
[512]	383	length, # vseg length (bytes)
[319]	384	mode, # CXWU flags
[512]	385	vtype, # vseg type
[319]	386	x, # destination x coordinate
	387	y, # destination y coordinate
	388	pseg, # destination pseg name
[411]	389	local = False, # only mapped in local PTAB if true
[512]	390	big = False, # to be mapped in a big physical page
	391	binpath = '' ): # pathname for binary code
[319]	392
	393	assert mode in VSEGMODES
	394
[512]	395	assert vtype in VSEGTYPES
[319]	396
	397	assert (x < self.x_size) and (y < self.y_size)
	398
	399	# add one vseg into mapping
[512]	400	vseg = Vseg( name, vbase, length, mode, vtype, x, y, pseg,
	401	identity = False, local = local, big = big, binpath = binpath )
[319]	402	vspace.vsegs.append( vseg )
	403	vseg.index = self.total_vsegs
	404	self.total_vsegs += 1
	405
	406	return vseg
	407
[709]	408	################################ add a thread in a vspace
	409	def addThread( self,
	410	vspace, # vspace containing thread
	411	name, # thread name
	412	is_main, # Boolean (one thread per vspace)
	413	x, # destination x coordinate
	414	y, # destination y coordinate
	415	p, # destination processor local index
	416	stackname, # name of vseg containing stack
	417	heapname, # name of vseg containing heap
	418	startid ): # index in start_vector
[406]	419
[709]	420	assert x < self.x_size
	421	assert y < self.y_size
	422	assert p < self.nprocs
[319]	423
[709]	424	# add one thread into mapping
	425	thread = Thread( name, is_main, x, y, p, stackname, heapname, startid )
	426	vspace.threads.append( thread )
	427	thread.index = self.total_threads
	428	self.total_threads += 1
[319]	429
[709]	430	return thread
[319]	431
	432	#################################
	433	def str2bytes( self, nbytes, s ): # string => nbytes_packed byte array
	434
	435	byte_stream = bytearray()
	436	length = len( s )
	437	if length < (nbytes - 1):
	438	for b in s:
	439	byte_stream.append( b )
	440	for x in xrange(nbytes-length):
	441	byte_stream.append( '\0' )
	442	else:
[512]	443	print '[genmap error] in str2bytes()'
	444	print ' string %s too long' % s
[319]	445	sys.exit(1)
	446
	447	return byte_stream
	448
	449	###################################
[406]	450	def int2bytes( self, nbytes, val ): # integer => nbytes litle endian byte array
[319]	451
	452	byte_stream = bytearray()
	453	for n in xrange( nbytes ):
	454	byte_stream.append( (val >> (n<<3)) & 0xFF )
	455
	456	return byte_stream
	457
[512]	458	################
[411]	459	def xml( self ): # compute string for map.xml file generation
[319]	460
[305]	461	s = '<?xml version="1.0"?>\n\n'
[319]	462	s += '<mapping_info signature = "0x%x"\n' % (self.signature)
[305]	463	s += ' name = "%s"\n' % (self.name)
	464	s += ' x_size = "%d"\n' % (self.x_size)
	465	s += ' y_size = "%d"\n' % (self.y_size)
	466	s += ' x_width = "%d"\n' % (self.x_width)
	467	s += ' y_width = "%d"\n' % (self.y_width)
	468	s += ' irq_per_proc = "%d"\n' % (self.irq_per_proc)
[319]	469	s += ' use_ramdisk = "%d"\n' % (self.use_ramdisk)
[305]	470	s += ' x_io = "%d"\n' % (self.x_io)
	471	s += ' y_io = "%d" >\n' % (self.y_io)
[319]	472	s += '\n'
	473
[305]	474	s += ' <clusterset>\n'
	475	for x in xrange ( self.x_size ):
	476	for y in xrange ( self.y_size ):
[406]	477	cluster_id = (x * self.y_size) + y
[319]	478	s += self.clusters[cluster_id].xml()
[305]	479	s += ' </clusterset>\n'
[319]	480	s += '\n'
	481
[305]	482	s += ' <globalset>\n'
[319]	483	for vseg in self.globs: s += vseg.xml()
[305]	484	s += ' </globalset>\n'
[319]	485	s += '\n'
	486
[305]	487	s += ' <vspaceset>\n'
[319]	488	for vspace in self.vspaces: s += vspace.xml()
[305]	489	s += ' </vspaceset>\n'
[319]	490
[305]	491	s += '</mapping_info>\n'
	492	return s
[319]	493
[512]	494	##########################
[411]	495	def cbin( self, verbose ): # C binary structure for map.bin file generation
[319]	496
	497	byte_stream = bytearray()
	498
	499	# header
[709]	500	byte_stream += self.int2bytes(4, self.signature)
	501	byte_stream += self.int2bytes(4, self.x_size)
	502	byte_stream += self.int2bytes(4, self.y_size)
	503	byte_stream += self.int2bytes(4, self.x_width)
	504	byte_stream += self.int2bytes(4, self.y_width)
	505	byte_stream += self.int2bytes(4, self.x_io)
	506	byte_stream += self.int2bytes(4, self.y_io)
	507	byte_stream += self.int2bytes(4, self.irq_per_proc)
	508	byte_stream += self.int2bytes(4, self.use_ramdisk)
	509	byte_stream += self.int2bytes(4, self.total_globals)
	510	byte_stream += self.int2bytes(4, self.total_vspaces)
	511	byte_stream += self.int2bytes(4, self.total_psegs)
	512	byte_stream += self.int2bytes(4, self.total_vsegs)
	513	byte_stream += self.int2bytes(4, self.total_threads)
	514	byte_stream += self.int2bytes(4, self.total_procs)
	515	byte_stream += self.int2bytes(4, self.total_irqs)
	516	byte_stream += self.int2bytes(4, self.total_periphs)
	517	byte_stream += self.str2bytes(256, self.name)
[319]	518
	519	if ( verbose ):
[406]	520	print '\n'
[319]	521	print 'name = %s' % self.name
	522	print 'signature = %x' % self.signature
	523	print 'x_size = %d' % self.x_size
	524	print 'y_size = %d' % self.y_size
	525	print 'x_width = %d' % self.x_width
	526	print 'y_width = %d' % self.y_width
[406]	527	print 'x_io = %d' % self.x_io
	528	print 'y_io = %d' % self.y_io
[319]	529	print 'irq_per_proc = %d' % self.irq_per_proc
	530	print 'use_ramdisk = %d' % self.use_ramdisk
	531	print 'total_globals = %d' % self.total_globals
[406]	532	print 'total_psegs = %d' % self.total_psegs
	533	print 'total_vsegs = %d' % self.total_vsegs
[709]	534	print 'total_threads = %d' % self.total_threads
[406]	535	print 'total_procs = %d' % self.total_procs
	536	print 'total_irqs = %d' % self.total_irqs
[319]	537	print 'total_periphs = %d' % self.total_periphs
[406]	538	print '\n'
[319]	539
	540	# clusters array
	541	index = 0
	542	for cluster in self.clusters:
	543	byte_stream += cluster.cbin( self, verbose, index )
	544	index += 1
	545
	546	if ( verbose ): print '\n'
	547
	548	# psegs array
	549	index = 0
	550	for cluster in self.clusters:
[406]	551	for pseg in cluster.psegs:
[319]	552	byte_stream += pseg.cbin( self, verbose, index, cluster )
	553	index += 1
	554
	555	if ( verbose ): print '\n'
	556
	557	# vspaces array
	558	index = 0
[406]	559	for vspace in self.vspaces:
	560	byte_stream += vspace.cbin( self, verbose, index )
[319]	561	index += 1
	562
	563	if ( verbose ): print '\n'
	564
	565	# vsegs array
	566	index = 0
	567	for vseg in self.globs:
	568	byte_stream += vseg.cbin( self, verbose, index )
	569	index += 1
	570	for vspace in self.vspaces:
[406]	571	for vseg in vspace.vsegs:
[319]	572	byte_stream += vseg.cbin( self, verbose, index )
	573	index += 1
	574
	575	if ( verbose ): print '\n'
	576
[709]	577	# threads array
[319]	578	index = 0
	579	for vspace in self.vspaces:
[709]	580	for thread in vspace.threads:
	581	byte_stream += thread.cbin( self, verbose, index, vspace )
[319]	582	index += 1
	583
	584	if ( verbose ): print '\n'
	585
	586	# procs array
	587	index = 0
	588	for cluster in self.clusters:
[406]	589	for proc in cluster.procs:
[319]	590	byte_stream += proc.cbin( self, verbose, index )
	591	index += 1
[406]	592
[319]	593	if ( verbose ): print '\n'
	594
	595	# irqs array
[406]	596	index = 0
[319]	597	for cluster in self.clusters:
	598	for periph in cluster.periphs:
	599	for irq in periph.irqs:
	600	byte_stream += irq.cbin( self, verbose, index )
	601	index += 1
	602
	603	if ( verbose ): print '\n'
	604
	605	# periphs array
	606	index = 0
	607	for cluster in self.clusters:
[406]	608	for periph in cluster.periphs:
[319]	609	byte_stream += periph.cbin( self, verbose, index )
	610	index += 1
	611
	612	return byte_stream
	613	# end of cbin()
[406]	614
[539]	615	#######################################################################
	616	def giet_vsegs( self ): # compute string for giet_vsegs.ld file
[319]	617	# required by giet_vm compilation
	618
[406]	619	# search the vsegs required for the giet_vsegs.ld
[319]	620	boot_code_found = False
	621	boot_data_found = False
	622	kernel_uncdata_found = False
	623	kernel_data_found = False
	624	kernel_code_found = False
	625	for vseg in self.globs:
[348]	626
[539]	627	if ( vseg.name[0:13] == 'seg_boot_code' ):
[406]	628	boot_code_vbase = vseg.vbase
[512]	629	boot_code_size = vseg.length
[319]	630	boot_code_found = True
	631
[539]	632	if ( vseg.name[0:13] == 'seg_boot_data' ):
[406]	633	boot_data_vbase = vseg.vbase
[512]	634	boot_data_size = vseg.length
[319]	635	boot_data_found = True
	636
[539]	637	if ( vseg.name[0:15] == 'seg_kernel_data' ):
[406]	638	kernel_data_vbase = vseg.vbase
[512]	639	kernel_data_size = vseg.length
[319]	640	kernel_data_found = True
	641
[539]	642	if ( vseg.name[0:15] == 'seg_kernel_code' ):
[406]	643	kernel_code_vbase = vseg.vbase
[512]	644	kernel_code_size = vseg.length
[319]	645	kernel_code_found = True
	646
	647	# check if all required vsegs have been found
[406]	648	if ( boot_code_found == False ):
[512]	649	print '[genmap error] in giet_vsegs()'
	650	print ' seg_boot_code vseg missing'
[319]	651	sys.exit()
	652
[406]	653	if ( boot_data_found == False ):
[512]	654	print '[genmap error] in giet_vsegs()'
	655	print ' seg_boot_data vseg missing'
[319]	656	sys.exit()
	657
[406]	658	if ( kernel_data_found == False ):
[512]	659	print '[genmap error] in giet_vsegs()'
	660	print ' seg_kernel_data vseg missing'
[319]	661	sys.exit()
	662
	663	if ( kernel_code_found == False ):
[512]	664	print '[genmap error] in giet_vsegs()'
	665	print ' seg_kernel_code vseg missing'
[319]	666	sys.exit()
	667
	668	# build string
[406]	669	s = '/* Generated by genmap for %s */\n' % self.name
[319]	670	s += '\n'
	671
[406]	672	s += 'boot_code_vbase = 0x%x;\n' % boot_code_vbase
	673	s += 'boot_code_size = 0x%x;\n' % boot_code_size
[319]	674	s += '\n'
[406]	675	s += 'boot_data_vbase = 0x%x;\n' % boot_data_vbase
	676	s += 'boot_data_size = 0x%x;\n' % boot_data_size
[319]	677	s += '\n'
[406]	678	s += 'kernel_code_vbase = 0x%x;\n' % kernel_code_vbase
	679	s += 'kernel_code_size = 0x%x;\n' % kernel_code_size
[319]	680	s += '\n'
[406]	681	s += 'kernel_data_vbase = 0x%x;\n' % kernel_data_vbase
	682	s += 'kernel_data_size = 0x%x;\n' % kernel_data_size
[319]	683	s += '\n'
	684
	685	return s
[406]	686
[539]	687	######################################################################
	688	def hard_config( self ): # compute string for hard_config.h file
[411]	689	# required by
[319]	690	# - top.cpp compilation
	691	# - giet_vm compilation
	692	# - tsar_preloader compilation
	693
	694	nb_total_procs = 0
	695
	696	# for each peripheral type, define default values
[406]	697	# for pbase address, size, number of components, and channels
[319]	698	nb_cma = 0
	699	cma_channels = 0
	700	seg_cma_base = 0xFFFFFFFF
	701	seg_cma_size = 0
	702
	703	nb_dma = 0
	704	dma_channels = 0
	705	seg_dma_base = 0xFFFFFFFF
	706	seg_dma_size = 0
	707
	708	nb_fbf = 0
	709	fbf_channels = 0
	710	seg_fbf_base = 0xFFFFFFFF
	711	seg_fbf_size = 0
[520]	712	fbf_arg0 = 0
	713	fbf_arg1 = 0
[319]	714
	715	nb_iob = 0
	716	iob_channels = 0
	717	seg_iob_base = 0xFFFFFFFF
	718	seg_iob_size = 0
	719
	720	nb_ioc = 0
	721	ioc_channels = 0
	722	seg_ioc_base = 0xFFFFFFFF
	723	seg_ioc_size = 0
[560]	724	use_ioc_bdv = False
	725	use_ioc_sdc = False
	726	use_ioc_hba = False
[565]	727	use_ioc_spi = False
[319]	728
	729	nb_mmc = 0
	730	mmc_channels = 0
	731	seg_mmc_base = 0xFFFFFFFF
	732	seg_mmc_size = 0
	733
	734	nb_mwr = 0
	735	mwr_channels = 0
	736	seg_mwr_base = 0xFFFFFFFF
	737	seg_mwr_size = 0
[520]	738	mwr_arg0 = 0
	739	mwr_arg1 = 0
	740	mwr_arg2 = 0
	741	mwr_arg3 = 0
[560]	742	use_mwr_gcd = False
	743	use_mwr_dct = False
	744	use_mwr_cpy = False
[319]	745
	746	nb_nic = 0
	747	nic_channels = 0
	748	seg_nic_base = 0xFFFFFFFF
	749	seg_nic_size = 0
	750
	751	nb_pic = 0
	752	pic_channels = 0
	753	seg_pic_base = 0xFFFFFFFF
	754	seg_pic_size = 0
	755
	756	nb_rom = 0
	757	rom_channels = 0
	758	seg_rom_base = 0xFFFFFFFF
	759	seg_rom_size = 0
	760
	761	nb_sim = 0
	762	sim_channels = 0
	763	seg_sim_base = 0xFFFFFFFF
	764	seg_sim_size = 0
	765
	766	nb_tim = 0
	767	tim_channels = 0
	768	seg_tim_base = 0xFFFFFFFF
	769	seg_tim_size = 0
	770
	771	nb_tty = 0
	772	tty_channels = 0
	773	seg_tty_base = 0xFFFFFFFF
	774	seg_tty_size = 0
	775
	776	nb_xcu = 0
	777	xcu_channels = 0
	778	seg_xcu_base = 0xFFFFFFFF
	779	seg_xcu_size = 0
[520]	780	xcu_arg0 = 0
[319]	781
[491]	782	nb_drom = 0
	783	drom_channels = 0
	784	seg_drom_base = 0xFFFFFFFF
	785	seg_drom_size = 0
	786
[319]	787	# get peripherals attributes
	788	for cluster in self.clusters:
	789	for periph in cluster.periphs:
[406]	790	if ( periph.ptype == 'CMA' ):
[319]	791	seg_cma_base = periph.pseg.base & 0xFFFFFFFF
	792	seg_cma_size = periph.pseg.size
	793	cma_channels = periph.channels
	794	nb_cma +=1
	795
[406]	796	elif ( periph.ptype == 'DMA' ):
	797	seg_dma_base = periph.pseg.base & 0xFFFFFFFF
[319]	798	seg_dma_size = periph.pseg.size
	799	dma_channels = periph.channels
	800	nb_dma +=1
	801
[406]	802	elif ( periph.ptype == 'FBF' ):
[319]	803	seg_fbf_base = periph.pseg.base & 0xFFFFFFFF
	804	seg_fbf_size = periph.pseg.size
	805	fbf_channels = periph.channels
[520]	806	fbf_arg0 = periph.arg0
	807	fbf_arg1 = periph.arg1
[319]	808	nb_fbf +=1
	809
	810	elif ( periph.ptype == 'IOB' ):
	811	seg_iob_base = periph.pseg.base & 0xFFFFFFFF
	812	seg_iob_size = periph.pseg.size
	813	iob_channels = periph.channels
	814	nb_iob +=1
	815
[406]	816	elif ( periph.ptype == 'IOC' ):
[319]	817	seg_ioc_base = periph.pseg.base & 0xFFFFFFFF
	818	seg_ioc_size = periph.pseg.size
	819	ioc_channels = periph.channels
	820	nb_ioc += 1
[560]	821	if ( periph.subtype == 'BDV' ): use_ioc_bdv = True
	822	if ( periph.subtype == 'HBA' ): use_ioc_hba = True
	823	if ( periph.subtype == 'SDC' ): use_ioc_sdc = True
[565]	824	if ( periph.subtype == 'SPI' ): use_ioc_spi = True
[404]	825
[319]	826	elif ( periph.ptype == 'MMC' ):
	827	seg_mmc_base = periph.pseg.base & 0xFFFFFFFF
	828	seg_mmc_size = periph.pseg.size
	829	mmc_channels = periph.channels
	830	nb_mmc +=1
	831
	832	elif ( periph.ptype == 'MWR' ):
	833	seg_mwr_base = periph.pseg.base & 0xFFFFFFFF
[520]	834	seg_mwr_size = periph.pseg.size
[319]	835	mwr_channels = periph.channels
[520]	836	mwr_arg0 = periph.arg0
	837	mwr_arg1 = periph.arg1
	838	mwr_arg2 = periph.arg2
	839	mwr_arg3 = periph.arg3
[319]	840	nb_mwr +=1
[560]	841	if ( periph.subtype == 'GCD' ): use_mwr_gcd = True
	842	if ( periph.subtype == 'DCT' ): use_mwr_dct = True
	843	if ( periph.subtype == 'CPY' ): use_mwr_cpy = True
[319]	844
	845	elif ( periph.ptype == 'ROM' ):
	846	seg_rom_base = periph.pseg.base & 0xFFFFFFFF
	847	seg_rom_size = periph.pseg.size
	848	rom_channels = periph.channels
	849	nb_rom +=1
	850
[491]	851	elif ( periph.ptype == 'DROM' ):
	852	seg_drom_base = periph.pseg.base & 0xFFFFFFFF
	853	seg_drom_size = periph.pseg.size
	854	drom_channels = periph.channels
	855	nb_drom +=1
	856
[319]	857	elif ( periph.ptype == 'SIM' ):
	858	seg_sim_base = periph.pseg.base & 0xFFFFFFFF
	859	seg_sim_size = periph.pseg.size
	860	sim_channels = periph.channels
	861	nb_sim +=1
	862
[406]	863	elif ( periph.ptype == 'NIC' ):
[319]	864	seg_nic_base = periph.pseg.base & 0xFFFFFFFF
	865	seg_nic_size = periph.pseg.size
	866	nic_channels = periph.channels
	867	nb_nic +=1
	868
[406]	869	elif ( periph.ptype == 'PIC' ):
[319]	870	seg_pic_base = periph.pseg.base & 0xFFFFFFFF
	871	seg_pic_size = periph.pseg.size
	872	pic_channels = periph.channels
	873	nb_pic +=1
[406]	874
	875	elif ( periph.ptype == 'TIM' ):
[319]	876	seg_tim_base = periph.pseg.base & 0xFFFFFFFF
	877	seg_tim_size = periph.pseg.size
	878	tim_channels = periph.channels
	879	nb_tim +=1
[406]	880
[319]	881	elif ( periph.ptype == 'TTY' ):
	882	seg_tty_base = periph.pseg.base & 0xFFFFFFFF
	883	seg_tty_size = periph.pseg.size
	884	tty_channels = periph.channels
	885	nb_tty +=1
[406]	886
	887	elif ( periph.ptype == 'XCU' ):
[319]	888	seg_xcu_base = periph.pseg.base & 0xFFFFFFFF
	889	seg_xcu_size = periph.pseg.size
	890	xcu_channels = periph.channels
[520]	891	xcu_arg0 = periph.arg0
[537]	892	xcu_arg1 = periph.arg1
	893	xcu_arg2 = periph.arg2
[319]	894	nb_xcu +=1
[406]	895
[319]	896	# no more than two access to external peripherals
[406]	897	assert ( nb_fbf <= 2 )
	898	assert ( nb_cma <= 2 )
	899	assert ( nb_ioc <= 2 )
	900	assert ( nb_nic <= 2 )
	901	assert ( nb_tim <= 2 )
	902	assert ( nb_tty <= 2 )
[319]	903	assert ( nb_pic <= 2 )
	904
	905	# one and only one type of IOC controller
[560]	906	nb_ioc_types = 0
	907	if use_ioc_hba: nb_ioc_types += 1
	908	if use_ioc_bdv: nb_ioc_types += 1
	909	if use_ioc_sdc: nb_ioc_types += 1
[565]	910	if use_ioc_spi: nb_ioc_types += 1
[560]	911	if self.use_ramdisk: nb_ioc_types += 1
	912	assert ( nb_ioc_types == 1 )
[404]	913
[560]	914	# one and only one type of MWR controller
	915	nb_mwr_types = 0
	916	if use_mwr_gcd: nb_mwr_types += 1
	917	if use_mwr_dct: nb_mwr_types += 1
	918	if use_mwr_cpy: nb_mwr_types += 1
	919	if ( nb_mwr > 0 ) : assert ( nb_mwr_types == 1 )
	920
[319]	921	# Compute total number of processors
	922	for cluster in self.clusters:
	923	nb_total_procs += len( cluster.procs )
	924
	925	# Compute physical addresses for BOOT vsegs
	926	boot_mapping_found = False
	927	boot_code_found = False
	928	boot_data_found = False
	929	boot_stack_found = False
	930
	931	for vseg in self.globs:
	932	if ( vseg.name == 'seg_boot_mapping' ):
[406]	933	boot_mapping_base = vseg.vbase
[512]	934	boot_mapping_size = vseg.length
[348]	935	boot_mapping_identity = vseg.identity
[319]	936	boot_mapping_found = True
	937
	938	if ( vseg.name == 'seg_boot_code' ):
[406]	939	boot_code_base = vseg.vbase
[512]	940	boot_code_size = vseg.length
[348]	941	boot_code_identity = vseg.identity
[319]	942	boot_code_found = True
	943
[406]	944	if ( vseg.name == 'seg_boot_data' ):
	945	boot_data_base = vseg.vbase
[512]	946	boot_data_size = vseg.length
[348]	947	boot_data_identity = vseg.identity
[319]	948	boot_data_found = True
	949
	950	if ( vseg.name == 'seg_boot_stack' ):
[406]	951	boot_stack_base = vseg.vbase
[512]	952	boot_stack_size = vseg.length
[348]	953	boot_stack_identity = vseg.identity
[319]	954	boot_stack_found = True
	955
[328]	956	# check that BOOT vsegs are found and identity mapping
[348]	957	if ( (boot_mapping_found == False) or (boot_mapping_identity == False) ):
[512]	958	print '[genmap error] in hard_config()'
	959	print ' seg_boot_mapping missing or not identity mapping'
[319]	960	sys.exit()
	961
[406]	962	if ( (boot_code_found == False) or (boot_code_identity == False) ):
[512]	963	print '[genmap error] in hard_config()'
	964	print ' seg_boot_code missing or not identity mapping'
[319]	965	sys.exit()
	966
[406]	967	if ( (boot_data_found == False) or (boot_data_identity == False) ):
[512]	968	print '[genmap error] in hard_config()'
	969	print ' seg_boot_data missing or not identity mapping'
[319]	970	sys.exit()
	971
[348]	972	if ( (boot_stack_found == False) or (boot_stack_identity == False) ):
[512]	973	print '[genmap error] in giet_vsegs()'
[709]	974	print ' seg_boot_stack missing or not identity mapping'
[319]	975	sys.exit()
	976
	977	# Search RAMDISK global vseg if required
	978	seg_rdk_base = 0xFFFFFFFF
	979	seg_rdk_size = 0
	980	seg_rdk_found = False
	981
	982	if self.use_ramdisk:
	983	for vseg in self.globs:
[497]	984	if ( vseg.name == 'seg_ramdisk' ):
[319]	985	seg_rdk_base = vseg.vbase
[512]	986	seg_rdk_size = vseg.length
[319]	987	seg_rdk_found = True
	988
	989	if ( seg_rdk_found == False ):
	990	print 'Error in hard_config() "seg_ramdisk" not found'
	991	sys.exit(1)
	992
	993	# build string
[406]	994	s = '/* Generated by genmap for %s */\n' % self.name
[319]	995	s += '\n'
	996	s += '#ifndef HARD_CONFIG_H\n'
	997	s += '#define HARD_CONFIG_H\n'
	998	s += '\n'
	999
[406]	1000	s += '/* General platform parameters */\n'
[319]	1001	s += '\n'
	1002	s += '#define X_SIZE %d\n' % self.x_size
	1003	s += '#define Y_SIZE %d\n' % self.y_size
	1004	s += '#define X_WIDTH %d\n' % self.x_width
	1005	s += '#define Y_WIDTH %d\n' % self.y_width
[406]	1006	s += '#define P_WIDTH %d\n' % self.p_width
[319]	1007	s += '#define X_IO %d\n' % self.x_io
[406]	1008	s += '#define Y_IO %d\n' % self.y_io
[411]	1009	s += '#define NB_PROCS_MAX %d\n' % self.nprocs
[319]	1010	s += '#define IRQ_PER_PROCESSOR %d\n' % self.irq_per_proc
	1011	s += '#define RESET_ADDRESS 0x%x\n' % self.reset_address
	1012	s += '#define NB_TOTAL_PROCS %d\n' % nb_total_procs
	1013	s += '\n'
	1014
[406]	1015	s += '/* Peripherals */\n'
[319]	1016	s += '\n'
	1017	s += '#define NB_TTY_CHANNELS %d\n' % tty_channels
	1018	s += '#define NB_IOC_CHANNELS %d\n' % ioc_channels
	1019	s += '#define NB_NIC_CHANNELS %d\n' % nic_channels
	1020	s += '#define NB_CMA_CHANNELS %d\n' % cma_channels
	1021	s += '#define NB_TIM_CHANNELS %d\n' % tim_channels
	1022	s += '#define NB_DMA_CHANNELS %d\n' % dma_channels
	1023	s += '\n'
	1024	s += '#define USE_XCU %d\n' % ( nb_xcu != 0 )
[560]	1025	s += '#define USE_DMA %d\n' % ( nb_dma != 0 )
	1026	s += '\n'
[319]	1027	s += '#define USE_IOB %d\n' % ( nb_iob != 0 )
	1028	s += '#define USE_PIC %d\n' % ( nb_pic != 0 )
	1029	s += '#define USE_FBF %d\n' % ( nb_fbf != 0 )
[546]	1030	s += '#define USE_NIC %d\n' % ( nb_nic != 0 )
[319]	1031	s += '\n'
[560]	1032	s += '#define USE_IOC_BDV %d\n' % use_ioc_bdv
	1033	s += '#define USE_IOC_SDC %d\n' % use_ioc_sdc
	1034	s += '#define USE_IOC_HBA %d\n' % use_ioc_hba
[565]	1035	s += '#define USE_IOC_SPI %d\n' % use_ioc_spi
[403]	1036	s += '#define USE_IOC_RDK %d\n' % self.use_ramdisk
[319]	1037	s += '\n'
[560]	1038	s += '#define USE_MWR_GCD %d\n' % use_mwr_gcd
	1039	s += '#define USE_MWR_DCT %d\n' % use_mwr_dct
	1040	s += '#define USE_MWR_CPY %d\n' % use_mwr_cpy
	1041	s += '\n'
[520]	1042	s += '#define FBUF_X_SIZE %d\n' % fbf_arg0
	1043	s += '#define FBUF_Y_SIZE %d\n' % fbf_arg1
[328]	1044	s += '\n'
[537]	1045	s += '#define XCU_NB_HWI %d\n' % xcu_arg0
	1046	s += '#define XCU_NB_PTI %d\n' % xcu_arg1
	1047	s += '#define XCU_NB_WTI %d\n' % xcu_arg2
	1048	s += '#define XCU_NB_OUT %d\n' % xcu_channels
[328]	1049	s += '\n'
[520]	1050	s += '#define MWR_TO_COPROC %d\n' % mwr_arg0
	1051	s += '#define MWR_FROM_COPROC %d\n' % mwr_arg1
	1052	s += '#define MWR_CONFIG %d\n' % mwr_arg2
	1053	s += '#define MWR_STATUS %d\n' % mwr_arg3
	1054	s += '\n'
[319]	1055
[356]	1056	s += '/* base addresses and sizes for physical segments */\n'
[319]	1057	s += '\n'
[406]	1058	s += '#define SEG_RAM_BASE 0x%x\n' % self.ram_base
	1059	s += '#define SEG_RAM_SIZE 0x%x\n' % self.ram_size
[356]	1060	s += '\n'
[406]	1061	s += '#define SEG_CMA_BASE 0x%x\n' % seg_cma_base
	1062	s += '#define SEG_CMA_SIZE 0x%x\n' % seg_cma_size
[319]	1063	s += '\n'
[406]	1064	s += '#define SEG_DMA_BASE 0x%x\n' % seg_dma_base
	1065	s += '#define SEG_DMA_SIZE 0x%x\n' % seg_dma_size
[319]	1066	s += '\n'
[406]	1067	s += '#define SEG_FBF_BASE 0x%x\n' % seg_fbf_base
	1068	s += '#define SEG_FBF_SIZE 0x%x\n' % seg_fbf_size
[319]	1069	s += '\n'
[406]	1070	s += '#define SEG_IOB_BASE 0x%x\n' % seg_iob_base
	1071	s += '#define SEG_IOB_SIZE 0x%x\n' % seg_iob_size
[319]	1072	s += '\n'
[406]	1073	s += '#define SEG_IOC_BASE 0x%x\n' % seg_ioc_base
	1074	s += '#define SEG_IOC_SIZE 0x%x\n' % seg_ioc_size
[319]	1075	s += '\n'
[406]	1076	s += '#define SEG_MMC_BASE 0x%x\n' % seg_mmc_base
	1077	s += '#define SEG_MMC_SIZE 0x%x\n' % seg_mmc_size
[319]	1078	s += '\n'
[406]	1079	s += '#define SEG_MWR_BASE 0x%x\n' % seg_mwr_base
	1080	s += '#define SEG_MWR_SIZE 0x%x\n' % seg_mwr_size
[319]	1081	s += '\n'
[406]	1082	s += '#define SEG_ROM_BASE 0x%x\n' % seg_rom_base
	1083	s += '#define SEG_ROM_SIZE 0x%x\n' % seg_rom_size
[319]	1084	s += '\n'
[406]	1085	s += '#define SEG_SIM_BASE 0x%x\n' % seg_sim_base
	1086	s += '#define SEG_SIM_SIZE 0x%x\n' % seg_sim_size
[319]	1087	s += '\n'
[406]	1088	s += '#define SEG_NIC_BASE 0x%x\n' % seg_nic_base
	1089	s += '#define SEG_NIC_SIZE 0x%x\n' % seg_nic_size
[319]	1090	s += '\n'
[406]	1091	s += '#define SEG_PIC_BASE 0x%x\n' % seg_pic_base
	1092	s += '#define SEG_PIC_SIZE 0x%x\n' % seg_pic_size
[319]	1093	s += '\n'
[406]	1094	s += '#define SEG_TIM_BASE 0x%x\n' % seg_tim_base
	1095	s += '#define SEG_TIM_SIZE 0x%x\n' % seg_tim_size
[319]	1096	s += '\n'
[406]	1097	s += '#define SEG_TTY_BASE 0x%x\n' % seg_tty_base
	1098	s += '#define SEG_TTY_SIZE 0x%x\n' % seg_tty_size
[319]	1099	s += '\n'
[406]	1100	s += '#define SEG_XCU_BASE 0x%x\n' % seg_xcu_base
	1101	s += '#define SEG_XCU_SIZE 0x%x\n' % seg_xcu_size
[319]	1102	s += '\n'
	1103	s += '#define SEG_RDK_BASE 0x%x\n' % seg_rdk_base
	1104	s += '#define SEG_RDK_SIZE 0x%x\n' % seg_rdk_size
	1105	s += '\n'
[491]	1106	s += '#define SEG_DROM_BASE 0x%x\n' % seg_drom_base
	1107	s += '#define SEG_DROM_SIZE 0x%x\n' % seg_drom_size
	1108	s += '\n'
[328]	1109	s += '#define PERI_CLUSTER_INCREMENT 0x%x\n' % self.peri_increment
[319]	1110	s += '\n'
	1111
[326]	1112	s += '/* physical base addresses for identity mapped vsegs */\n'
	1113	s += '/* used by the GietVM OS */\n'
[319]	1114	s += '\n'
	1115	s += '#define SEG_BOOT_MAPPING_BASE 0x%x\n' % boot_mapping_base
	1116	s += '#define SEG_BOOT_MAPPING_SIZE 0x%x\n' % boot_mapping_size
	1117	s += '\n'
	1118	s += '#define SEG_BOOT_CODE_BASE 0x%x\n' % boot_code_base
	1119	s += '#define SEG_BOOT_CODE_SIZE 0x%x\n' % boot_code_size
	1120	s += '\n'
	1121	s += '#define SEG_BOOT_DATA_BASE 0x%x\n' % boot_data_base
	1122	s += '#define SEG_BOOT_DATA_SIZE 0x%x\n' % boot_data_size
	1123	s += '\n'
	1124	s += '#define SEG_BOOT_STACK_BASE 0x%x\n' % boot_stack_base
	1125	s += '#define SEG_BOOT_STACK_SIZE 0x%x\n' % boot_stack_size
	1126	s += '#endif\n'
[406]	1127
[319]	1128	return s
	1129
	1130	# end of hard_config()
	1131
[539]	1132	#################################################################
	1133	def linux_dts( self ): # compute string for linux.dts file
[424]	1134	# used for linux configuration
[411]	1135	# header
	1136	s = '/dts-v1/;\n'
	1137	s += '\n'
	1138	s += '/{\n'
[421]	1139	s += ' compatible = "tsar,%s";\n' % self.name
[411]	1140	s += ' #address-cells = <2>;\n' # physical address on 64 bits
	1141	s += ' #size-cells = <1>;\n' # segment size on 32 bits
	1142	s += ' model = "%s";\n' % self.name
	1143	s += '\n'
	1144
	1145	# linux globals arguments
	1146	s += ' chosen {\n'
	1147	s += ' linux,stdout-path = &tty;\n'
	1148	s += ' bootargs = "console=tty0 console=ttyVTTY0 earlyprintk";\n'
[424]	1149	s += ' };\n\n'
[411]	1150
	1151	# cpus (for each cluster)
	1152	s += ' cpus {\n'
	1153	s += ' #address-cells = <1>;\n'
	1154	s += ' #size-cells = <0>;\n'
	1155
	1156	for cluster in self.clusters:
	1157	for proc in cluster.procs:
	1158	x = cluster.x
	1159	y = cluster.y
	1160	l = proc.lpid
[421]	1161	proc_id = (((x << self.y_width) + y) << self.p_width) + l
[411]	1162	s += ' cpu@%d_%d_%d {\n' %(x,y,l)
	1163	s += ' device_type = "cpu";\n'
	1164	s += ' compatible = "soclib,mips32el";\n'
	1165	s += ' reg = <0x%x>;\n' % proc_id
	1166	s += ' };\n'
	1167	s += '\n'
	1168
	1169	s += ' };\n\n'
	1170
	1171	# devices (ram or peripheral) are grouped per cluster
[424]	1172	# the "compatible" attribute links a peripheral device
[411]	1173	# to one or several drivers identified by ("major","minor")
	1174
[562]	1175	chosen_tty = False
[411]	1176	for cluster in self.clusters:
	1177	x = cluster.x
	1178	y = cluster.y
	1179	found_xcu = False
	1180	found_pic = False
	1181
	1182	s += ' /* cluster[%d,%d] */\n\n' % (x,y)
	1183
	1184	# scan all psegs to find RAM in current cluster
	1185	for pseg in cluster.psegs:
	1186	if ( pseg.segtype == 'RAM' ):
	1187	msb = pseg.base >> 32
	1188	lsb = pseg.base & 0xFFFFFFFF
	1189	size = pseg.size
	1190
[562]	1191	s += ' %s@0x%x {\n' % (pseg.name, pseg.base)
[411]	1192	s += ' device_type = "memory";\n'
	1193	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1194	s += ' };\n\n'
	1195
	1196	# scan all periphs to find XCU or PIC in current cluster
	1197	for periph in cluster.periphs:
	1198	msb = periph.pseg.base >> 32
	1199	lsb = periph.pseg.base & 0xFFFFFFFF
	1200	size = periph.pseg.size
	1201
	1202	# search XCU (can be replicated)
[424]	1203	if ( (periph.ptype == 'XCU') ):
[411]	1204	found_xcu = True
	1205
[562]	1206	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[421]	1207	s += ' compatible = "soclib,vci_xicu","soclib,vci_xicu_timer";\n'
[411]	1208	s += ' interrupt-controller;\n'
	1209	s += ' #interrupt-cells = <1>;\n'
[512]	1210	s += ' clocks = <&freq>;\n' # XCU contains a timer
[424]	1211	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[411]	1212	s += ' };\n\n'
	1213
	1214	# search PIC (non replicated)
[424]	1215	if ( periph.ptype == 'PIC' ):
[411]	1216	found_pic = True
	1217
[562]	1218	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[421]	1219	s += ' compatible = "soclib,vci_iopic";\n'
[411]	1220	s += ' interrupt-controller;\n'
	1221	s += ' #interrupt-cells = <1>;\n'
	1222	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1223	s += ' };\n\n'
	1224
	1225	# we need one interrupt controler in any cluster containing peripherals
[562]	1226	if ( (found_xcu == False) and
	1227	(found_pic == False) and
[512]	1228	(len(cluster.periphs) > 0) ):
	1229	print '[genmap error] in linux_dts()'
	1230	print ' No XCU/PIC in cluster(%d,%d)' % (x,y)
[424]	1231	sys.exit(1)
[411]	1232
	1233	# scan all periphs to find TTY and IOC in current cluster
	1234	for periph in cluster.periphs:
	1235	msb = periph.pseg.base >> 32
	1236	lsb = periph.pseg.base & 0xFFFFFFFF
	1237	size = periph.pseg.size
	1238
[562]	1239	irq_ctrl = periph.irq_ctrl
	1240	if irq_ctrl != None:
	1241	irq_ctrl_name = '%s@0x%x' % (irq_ctrl.pseg.name, irq_ctrl.pseg.base)
	1242
[411]	1243	# search TTY (non replicated)
[562]	1244	if periph.ptype == 'TTY':
	1245	assert irq_ctrl != None
[411]	1246
[539]	1247	# get HWI index to XCU or PIC (only TTY0 is used by Linux)
[411]	1248	hwi_id = 0xFFFFFFFF
	1249	for irq in irq_ctrl.irqs:
[512]	1250	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == 0) ):
	1251	hwi_id = irq.srcid
	1252
[411]	1253	if ( hwi_id == 0xFFFFFFFF ):
[512]	1254	print '[genmap error] in linux.dts()'
	1255	print ' IRQ_TTY_RX not found'
[411]	1256	sys.exit(1)
	1257
[562]	1258	if chosen_tty == False:
	1259	chosen_tty = True
	1260	s += ' tty:\n'
	1261
	1262	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[421]	1263	s += ' compatible = "soclib,vci_multi_tty";\n'
[562]	1264	s += ' interrupt-parent = <&{/%s}>;\n' % (irq_ctrl_name)
[424]	1265	s += ' interrupts = <%d>;\n' % hwi_id
[411]	1266	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1267	s += ' };\n\n'
	1268
[562]	1269
[411]	1270	# search IOC (non replicated)
[424]	1271	elif ( periph.ptype == 'IOC' ):
[562]	1272	assert irq_ctrl != None
[411]	1273
	1274	if ( periph.subtype == 'BDV' ):
	1275
	1276	# get irq line index associated to bdv
	1277	hwi_id = 0xFFFFFFFF
	1278	for irq in irq_ctrl.irqs:
	1279	if ( irq.isrtype == 'ISR_BDV' ): hwi_id = irq.srcid
[512]	1280
[411]	1281	if ( hwi_id == 0xFFFFFFFF ):
[512]	1282	print '[genmap error] in linux.dts()'
	1283	print ' ISR_BDV not found'
[411]	1284	sys.exit(1)
	1285
[562]	1286	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[517]	1287	s += ' compatible = "tsar,vci_block_device";\n'
[562]	1288	s += ' interrupt-parent = <&{/%s}>;\n' % (irq_ctrl_name)
[424]	1289	s += ' interrupts = <%d>;\n' % hwi_id
[411]	1290	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1291	s += ' };\n\n'
	1292
[526]	1293	else:
[539]	1294	print '[genmap warning] in linux_dts() : '
	1295	print ' %s' % (periph.subtype),
[526]	1296	print 'peripheral not supported by LINUX'
[411]	1297
[465]	1298	# XCU or PIC have been already parsed
	1299	elif ( periph.ptype == 'XCU' ) or ( periph.ptype == 'PIC' ):
	1300	pass
	1301
[411]	1302	# other peripherals
[424]	1303	else:
[539]	1304	print '[genmap warning] in linux_dts() : '
	1305	print ' %s peripheral not supported by LINUX' % (periph.ptype)
[424]	1306
	1307	# clocks
[411]	1308	s += ' clocks {\n'
[424]	1309	s += ' freq: freq@50MHZ {\n'
[411]	1310	s += ' #clock-cells = <0>;\n'
	1311	s += ' compatible = "fixed-clock";\n'
	1312	s += ' clock-frequency = <50000000>;\n'
	1313	s += ' };\n'
	1314	s += ' };\n\n'
	1315	s += ' cpuclk {\n'
[421]	1316	s += ' compatible = "soclib,mips32_clksrc";\n'
[424]	1317	s += ' clocks = <&freq>;\n'
[411]	1318	s += ' };\n'
	1319	s += '};\n'
	1320
	1321	return s
	1322	# end linux_dts()
	1323
	1324
[539]	1325	#################################################################
	1326	def netbsd_dts( self ): # compute string for netbsd.dts file
[406]	1327	# used for netbsd configuration
[319]	1328	# header
	1329	s = '/dts-v1/;\n'
	1330	s += '\n'
	1331	s += '/{\n'
[406]	1332	s += ' #address-cells = <2>;\n'
	1333	s += ' #size-cells = <1>;\n'
[319]	1334
	1335	# cpus (for each cluster)
	1336	s += ' cpus {\n'
	1337	s += ' #address-cells = <1>;\n'
	1338	s += ' #size-cells = <0>;\n'
	1339
	1340	for cluster in self.clusters:
	1341	for proc in cluster.procs:
[539]	1342	proc_id = (((cluster.x << self.y_width) + cluster.y)
	1343	<< self.p_width) + proc.lpid
[319]	1344
	1345	s += ' Mips,32@0x%x {\n' % proc_id
	1346	s += ' device_type = "cpu";\n'
	1347	s += ' icudev_type = "cpu:mips";\n'
	1348	s += ' name = "Mips,32";\n'
	1349	s += ' reg = <0x%x>;\n' % proc_id
	1350	s += ' };\n'
	1351	s += '\n'
	1352
	1353	s += ' };\n'
	1354
[411]	1355	# physical memory banks (for each cluster)
[319]	1356	for cluster in self.clusters:
	1357	for pseg in cluster.psegs:
	1358
	1359	if ( pseg.segtype == 'RAM' ):
	1360	msb = pseg.base >> 32
	1361	lsb = pseg.base & 0xFFFFFFFF
	1362	size = pseg.size
	1363
	1364	s += ' %s@0x%x {\n' % (pseg.name, pseg.base)
	1365	s += ' cached = <1>;\n'
	1366	s += ' device_type = "memory";\n'
[539]	1367	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb,lsb,size)
[319]	1368	s += ' };\n'
	1369
	1370	# peripherals (for each cluster)
	1371	for cluster in self.clusters:
[411]	1372	x = cluster.x
	1373	y = cluster.y
[319]	1374
[562]	1375	# research XCU or PIC component
[319]	1376	found_xcu = False
[562]	1377	found_pic = False
[319]	1378	for periph in cluster.periphs:
[406]	1379	if ( (periph.ptype == 'XCU') ):
[319]	1380	found_xcu = True
	1381	xcu = periph
	1382	msb = periph.pseg.base >> 32
	1383	lsb = periph.pseg.base & 0xFFFFFFFF
	1384	size = periph.pseg.size
	1385
	1386	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1387	s += ' device_type = "soclib:xicu:root";\n'
[539]	1388	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb,lsb,size)
[562]	1389	s += ' input_lines = <%d>;\n' % periph.arg0
	1390	s += ' ipis = <%d>;\n' % periph.arg1
	1391	s += ' timers = <%d>;\n' % periph.arg2
[319]	1392
	1393	output_id = 0 # output index from XCU
	1394	for lpid in xrange ( len(cluster.procs) ): # destination processor index
	1395	for itid in xrange ( self.irq_per_proc ): # input irq index on processor
[406]	1396	cluster_xy = (cluster.x << self.y_width) + cluster.y
	1397	proc_id = (cluster_xy << self.p_width) + lpid
[319]	1398	s += ' out@%d {\n' % output_id
	1399	s += ' device_type = "soclib:xicu:filter";\n'
[411]	1400	s += ' irq = <&{/cpus/Mips,32@0x%x} %d>;\n' % (proc_id, itid)
[406]	1401	s += ' output_line = <%d>;\n' % output_id
[411]	1402	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1403	s += ' };\n'
	1404
	1405	output_id += 1
	1406
	1407	s += ' };\n'
	1408
[406]	1409	if ( periph.ptype == 'PIC' ):
[319]	1410	found_pic = True
	1411	pic = periph
	1412	msb = periph.pseg.base >> 32
	1413	lsb = periph.pseg.base & 0xFFFFFFFF
	1414	size = periph.pseg.size
	1415
	1416	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1417	s += ' device_type = "soclib:pic:root";\n'
	1418	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[562]	1419	s += ' input_lines = <%d>;\n' % periph.channels
[319]	1420	s += ' };\n'
	1421
[411]	1422	# at least one interrupt controller
[319]	1423	if ( (found_xcu == False) and (found_pic == False) and (len(cluster.periphs) > 0) ):
[512]	1424	print '[genmap error] in netbsd_dts()'
	1425	print ' No XCU/PIC in cluster(%d,%d)' % (x,y)
[406]	1426	sys.exit(1)
	1427
[319]	1428	# get all others peripherals in cluster
	1429	for periph in cluster.periphs:
	1430	msb = periph.pseg.base >> 32
	1431	lsb = periph.pseg.base & 0xFFFFFFFF
	1432	size = periph.pseg.size
	1433
[562]	1434	irq_ctrl = periph.irq_ctrl
	1435	if irq_ctrl != None:
	1436	irq_ctrl_name = '%s@0x%x' % (irq_ctrl.pseg.name, irq_ctrl.pseg.base)
	1437
	1438	# XCU or PIC have been already parsed
	1439	if ( periph.ptype == 'XCU' ) or ( periph.ptype == 'PIC' ):
	1440	pass
	1441
[319]	1442	# research DMA component
[562]	1443	elif ( periph.ptype == 'DMA' ):
[319]	1444
	1445	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[411]	1446	s += ' device_type = "soclib:dma";\n'
	1447	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1448	s += ' channel_count = <%d>;\n' % periph.channels
	1449
	1450	# multi-channels : get HWI index (to XCU) for each channel
	1451	for channel in xrange( periph.channels ):
	1452	hwi_id = 0xFFFFFFFF
	1453	for irq in xcu.irqs:
[539]	1454	if ( (irq.isrtype == 'ISR_DMA') and
	1455	(irq.channel == channel) ):
[319]	1456	hwi_id = irq.srcid
[512]	1457
[319]	1458	if ( hwi_id == 0xFFFFFFFF ):
[512]	1459	print '[genmap error] in netbsd.dts()'
	1460	print ' ISR_DMA channel %d not found' % channel
[319]	1461	sys.exit(1)
	1462
	1463	name = '%s@0x%x' % (xcu.pseg.name, xcu.pseg.base)
	1464	s += ' irq@%d{\n' % channel
	1465	s += ' device_type = "soclib:periph:irq";\n'
	1466	s += ' output_line = <%d>;\n' % channel
[411]	1467	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1468	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1469	s += ' };\n'
	1470
[406]	1471	s += ' };\n'
[319]	1472
	1473	# research MMC component
	1474	elif ( periph.ptype == 'MMC' ):
	1475
	1476	# get irq line index associated to MMC in XCU
	1477	irq_in = 0xFFFFFFFF
	1478	for irq in xcu.irqs:
	1479	if ( irq.isrtype == 'ISR_MMC' ): irq_in = irq.srcid
[512]	1480
[319]	1481	if ( irq_in == 0xFFFFFFFF ):
[512]	1482	print '[genmap error] in netbsd.dts()'
	1483	print ' ISR_MMC not found'
[319]	1484	sys.exit(1)
	1485
	1486	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1487	s += ' device_type = "soclib:mmc";\n'
[562]	1488	s += ' irq = <&{/%s} %d>;\n' % (irq_ctrl_name, irq_in)
[411]	1489	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[406]	1490	s += ' };\n'
[319]	1491
	1492	# research FBF component
[406]	1493	elif ( periph.ptype == 'FBF' ):
[319]	1494
[411]	1495	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1496	s += ' device_type = "soclib:framebuffer";\n'
[539]	1497	s += ' mode = <32>;\n' # bits par pixel
[562]	1498	s += ' width = <%d>;\n' % periph.arg0
	1499	s += ' height = <%d>;\n' % periph.arg1
[319]	1500	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1501	s += ' };\n'
	1502
	1503	# research IOC component
[406]	1504	elif ( periph.ptype == 'IOC' ):
[319]	1505
	1506	if ( periph.subtype == 'BDV' ):
	1507
	1508	# get irq line index associated to bdv
	1509	irq_in = 0xFFFFFFFF
[562]	1510	for irq in irq_ctrl.irqs:
[319]	1511	if ( irq.isrtype == 'ISR_BDV' ): irq_in = irq.srcid
	1512	if ( irq_in == 0xFFFFFFFF ):
[512]	1513	print '[genmap error] in netbsd.dts()'
	1514	print ' ISR_BDV not found'
[319]	1515	sys.exit(1)
	1516
[411]	1517	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1518	s += ' device_type = "soclib:blockdevice";\n'
[562]	1519	s += ' irq = <&{/%s} %d>;\n' % (irq_ctrl_name, irq_in)
[411]	1520	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1521	s += ' };\n'
	1522
	1523	elif ( periph.subtype == 'HBA' ):
[562]	1524
[512]	1525	print '[genmap error] in netbsd_dts()'
	1526	print ' HBA peripheral not supported by NetBSD'
[319]	1527
[546]	1528	elif ( periph.subtype == 'SDC' ):
[319]	1529
[546]	1530	# get irq line index associated to sdc
[319]	1531	irq_in = 0xFFFFFFFF
[562]	1532	for irq in irq_ctrl.irqs:
[546]	1533	if ( irq.isrtype == 'ISR_SDC' ): irq_in = irq.srcid
[319]	1534	if ( irq_in == 0xFFFFFFFF ):
[512]	1535	print '[genmap error] in netbsd.dts()'
[546]	1536	print ' ISR_SDC not found'
[319]	1537	sys.exit(1)
	1538
	1539	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[546]	1540	s += ' device_type = "soclib:sdc";\n'
[562]	1541	s += ' irq = <&{/%s} %d>;\n' % (irq_ctrl_name, irq_in)
[411]	1542	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1543	s += ' };\n'
	1544
	1545	# research ROM component
[562]	1546	elif ( periph.ptype == 'ROM' ) or ( periph.ptype == 'DROM' ):
[319]	1547
[411]	1548	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
[319]	1549	s += ' device_type = "rom";\n'
[411]	1550	s += ' cached = <1>;\n'
	1551	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1552	s += ' };\n'
	1553
	1554	# research SIM component
	1555	elif ( periph.ptype == 'SIM' ):
	1556
	1557	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1558	s += ' device_type = "soclib:simhelper";\n'
	1559	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1560	s += ' };\n'
	1561
	1562	# research TTY component
	1563	elif ( periph.ptype == 'TTY' ):
	1564
[411]	1565	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1566	s += ' device_type = "soclib:tty";\n'
[406]	1567	s += ' channel_count = < %d >;\n' % periph.channels
[411]	1568	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
[319]	1569
	1570	# multi-channels : get HWI index (to XCU or PIC) for each channel
	1571	for channel in xrange( periph.channels ):
	1572	hwi_id = 0xFFFFFFFF
[562]	1573	for irq in irq_ctrl.irqs:
[406]	1574	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == channel) ):
[319]	1575	hwi_id = irq.srcid
	1576	if ( hwi_id == 0xFFFFFFFF ):
[512]	1577	print '[genmap error] in netbsd.dts()'
	1578	print ' ISR_TTY_RX channel %d not found' % channel
[319]	1579	sys.exit(1)
	1580
[562]	1581	name = '%s' % (irq_ctrl_name)
[319]	1582	s += ' irq@%d{\n' % channel
	1583	s += ' device_type = "soclib:periph:irq";\n'
	1584	s += ' output_line = <%d>;\n' % channel
[411]	1585	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1586	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1587	s += ' };\n'
	1588
	1589	s += ' };\n'
[406]	1590
[319]	1591	# research IOB component
	1592	elif ( periph.ptype == 'IOB' ):
	1593
	1594	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1595	s += ' device_type = "soclib:iob";\n'
	1596	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1597	s += ' };\n'
	1598
	1599	# research NIC component
[406]	1600	elif ( periph.ptype == 'NIC' ):
[319]	1601
	1602	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1603	s += ' device_type = "soclib:nic";\n'
	1604	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1605	s += ' channel_count = < %d >;\n' % periph.channels
	1606
	1607	# multi-channels : get HWI index (to XCU or PIC) for RX & TX IRQs
	1608	# RX IRQ : (2channel) / TX IRQs : (2channel + 1)
	1609	for channel in xrange( periph.channels ):
	1610	hwi_id = 0xFFFFFFFF
[562]	1611	for irq in irq_ctrl.irqs:
[406]	1612	if ( (irq.isrtype == 'ISR_NIC_RX') and (irq.channel == channel) ):
[319]	1613	hwi_id = irq.srcid
	1614	if ( hwi_id == 0xFFFFFFFF ):
[512]	1615	print '[genmap error] in netbsd.dts()'
	1616	print ' ISR_NIC_RX channel %d not found' % channel
[319]	1617	sys.exit(1)
	1618
[562]	1619	name = '%s' % (irq_ctrl_name)
[319]	1620	s += ' irq_rx@%d{\n' % channel
	1621	s += ' device_type = "soclib:periph:irq";\n'
	1622	s += ' output_line = <%d>;\n' % (2*channel)
	1623	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1624	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
	1625	s += ' };\n'
	1626
	1627	hwi_id = 0xFFFFFFFF
[562]	1628	for irq in irq_ctrl.irqs:
[406]	1629	if ( (irq.isrtype == 'ISR_NIC_TX') and (irq.channel == channel) ):
[319]	1630	hwi_id = irq.srcid
	1631	if ( hwi_id == 0xFFFFFFFF ):
[512]	1632	print '[genmap error] in netbsd.dts()'
	1633	print ' ISR_NIC_TX channel %d not found' % channel
[319]	1634	sys.exit(1)
	1635
[562]	1636	name = '%s' % (irq_ctrl_name)
[319]	1637	s += ' irq_tx@%d{\n' % channel
	1638	s += ' device_type = "soclib:periph:irq";\n'
	1639	s += ' output_line = <%d>;\n' % (2*channel + 1)
	1640	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1641	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
	1642	s += ' };\n'
[406]	1643
[319]	1644	s += ' };\n'
	1645
	1646	# research CMA component
[406]	1647	elif ( periph.ptype == 'CMA' ):
[319]	1648
	1649	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
	1650	s += ' device_type = "soclib:cma";\n'
	1651	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
	1652	s += ' channel_count = < %d >;\n' % periph.channels
	1653
	1654	# multi-channels : get HWI index (to XCU or PIC) for each channel
	1655	for channel in xrange( periph.channels ):
	1656	hwi_id = 0xFFFFFFFF
[562]	1657	for irq in irq_ctrl.irqs:
[406]	1658	if ( (irq.isrtype == 'ISR_CMA') and (irq.channel == channel) ):
[319]	1659	hwi_id = irq.srcid
[512]	1660
[319]	1661	if ( hwi_id == 0xFFFFFFFF ):
[512]	1662	print '[genmap error] in netbsd.dts()'
	1663	print ' ISR_CMA channel %d not found' % channel
[319]	1664	sys.exit(1)
	1665
[562]	1666	name = '%s' % (irq_ctrl_name)
[319]	1667	s += ' irq@%d{\n' % channel
	1668	s += ' device_type = "soclib:periph:irq";\n'
	1669	s += ' output_line = <%d>;\n' % channel
[411]	1670	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
	1671	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
[319]	1672	s += ' };\n'
	1673
	1674	s += ' };\n'
	1675
[562]	1676	else:
[319]	1677
[512]	1678	print '[genmap error] in netbsd_dts()'
[562]	1679	print ' %s peripheral not supported by NetBSD' % periph.ptype
[319]	1680
	1681
	1682	# topology
	1683	s += '\n'
	1684	s += ' topology {\n'
	1685	s += ' #address-cells = <2>;\n'
	1686	s += ' #size-cells = <0>;\n'
	1687	for cluster in self.clusters:
[406]	1688	s += ' cluster@%d,%d {\n' % (cluster.x, cluster.y)
[319]	1689	s += ' reg = <%d %d>;\n' % (cluster.x, cluster.y)
	1690	s += ' devices = <\n'
	1691
[406]	1692	offset = ((cluster.x << self.y_width) + cluster.y) << self.p_width
[319]	1693	for proc in cluster.procs:
	1694	s += ' &{/cpus/Mips,32@0x%x}\n' % (offset + proc.lpid)
	1695	for periph in cluster.periphs:
	1696	s += ' &{/%s@0x%x}\n' % (periph.pseg.name, periph.pseg.base)
[492]	1697	for pseg in cluster.psegs:
	1698	if ( pseg.segtype == 'RAM' ):
	1699	s += ' &{/%s@0x%x}\n' % (pseg.name, pseg.base)
[319]	1700
	1701	s += ' >;\n'
	1702	s += ' };\n'
	1703	s += ' };\n'
	1704	s += '};\n'
	1705
	1706	return s
[411]	1707	# end netbsd_dts()
[319]	1708
[539]	1709	######################################################################
	1710	def almos_archinfo( self ): # compute string for arch.info file
[406]	1711	# used for almos configuration
[319]	1712	# header
[327]	1713	s = '# arch.info file generated by genmap for %s\n' % self.name
[319]	1714	s += '\n'
	1715	s += '[HEADER]\n'
	1716	s += ' REVISION=1\n'
	1717	s += ' ARCH=%s\n' % self.name
	1718	s += ' XMAX=%d\n' % self.x_size
	1719	s += ' YMAX=%d\n' % self.y_size
[411]	1720	s += ' CPU_NR=%d\n' % self.nprocs
[319]	1721	s += '\n'
	1722
	1723	# clusters
	1724	cluster_id = 0
	1725	for cluster in self.clusters:
	1726
	1727	ram = None
	1728	nb_cpus = len( cluster.procs )
	1729	nb_devs = len( cluster.periphs )
	1730
	1731	# search a RAM
	1732	for pseg in cluster.psegs:
[406]	1733	if ( pseg.segtype == 'RAM' ):
[319]	1734	ram = pseg
	1735	nb_devs += 1
	1736
	1737	# search XCU to get IRQs indexes if cluster contains peripherals
	1738	if ( len( cluster.periphs ) != 0 ):
	1739	tty_irq_id = None
	1740	bdv_irq_id = None
	1741	dma_irq_id = None
	1742
	1743	for periph in cluster.periphs:
[406]	1744	if ( periph.ptype == 'XCU' ):
[319]	1745	# scan irqs
	1746	for irq in periph.irqs:
[539]	1747	if (irq.isrtype=='ISR_TTY_RX'): tty_irq_id = irq.srcid
	1748	if (irq.isrtype=='ISR_BDV' ): bdv_irq_id = irq.srcid
	1749	if (irq.isrtype=='ISR_DMA' ): dma_irq_id = irq.srcid
[319]	1750
	1751	# Build the cluster description
	1752	s += '[CLUSTER]\n'
[406]	1753	s += ' CID=%d\n' % cluster_id
[539]	1754	s += ' ARCH_CID=0x%x\n' % ((cluster.x<<self.y_width)+cluster.y)
[319]	1755	s += ' CPU_NR=%d\n' % nb_cpus
	1756	s += ' DEV_NR=%d\n' % nb_devs
	1757
[406]	1758
[319]	1759	# Handling RAM when cluster contain a RAM
	1760	if (ram != None ):
	1761	base = ram.base
	1762	size = ram.size
	1763	irqid = -1
[406]	1764	s += ' DEVID=RAM'
[539]	1765	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % (base,size)
[319]	1766
	1767	# Handling peripherals
	1768	for periph in cluster.periphs:
	1769	base = periph.pseg.base
	1770	size = periph.pseg.size
	1771
[406]	1772	if ( periph.ptype == 'XCU' ):
[319]	1773
[406]	1774	s += ' DEVID=XICU'
[539]	1775	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' %(base,size)
[319]	1776
[406]	1777	elif ( (periph.ptype == 'TTY')
[319]	1778	and (tty_irq_id != None) ):
	1779
[406]	1780	s += ' DEVID=TTY'
[539]	1781	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' %(base,size,tty_irq_id)
[319]	1782
[406]	1783	elif ( (periph.ptype == 'DMA')
[319]	1784	and (dma_irq_id != None) ):
	1785
	1786	s += ' DEVID=DMA'
[539]	1787	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' %(base,size,dma_irq_id)
[319]	1788
	1789	elif ( periph.ptype == 'FBF' ):
	1790
	1791	s += ' DEVID=FB'
[539]	1792	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' %(base,size )
[319]	1793
	1794	elif ( (periph.ptype == 'IOC') and (periph.subtype == 'BDV')
	1795	and (bdv_irq_id != None) ):
	1796
[406]	1797	s += ' DEVID=BLKDEV'
[539]	1798	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' %(base,size,bdv_irq_id)
[319]	1799
	1800	elif ( periph.ptype == 'PIC' ):
	1801
[539]	1802	s += ' DEVID=IOPIC'
	1803	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' %(base,size)
[319]	1804
	1805	else:
	1806	print '# Warning from almos_archinfo() in cluster[%d,%d]' \
	1807	% (cluster.x, cluster.y)
	1808	print '# peripheral type %s/%s not supported yet\n' \
	1809	% ( periph.ptype, periph.subtype )
[406]	1810
[319]	1811	cluster_id += 1
	1812
	1813	return s
	1814
	1815	# end of almos_archinfo()
	1816
	1817
	1818
	1819
	1820
	1821
	1822
	1823
[539]	1824	###################################################################################
[319]	1825	class Cluster ( object ):
[539]	1826	###################################################################################
[319]	1827	def __init__( self,
[406]	1828	x,
[319]	1829	y ):
[406]	1830
[539]	1831	self.index = 0 # global index (set by Mapping constructor)
	1832	self.x = x # x coordinate
	1833	self.y = y # y coordinate
	1834	self.psegs = [] # filled by addRam() or addPeriph()
	1835	self.procs = [] # filled by addProc()
	1836	self.periphs = [] # filled by addPeriph()
[319]	1837
	1838	return
	1839
	1840	################
	1841	def xml( self ): # xml for a cluster
	1842
	1843	s = ' <cluster x="%d" y="%d" >\n' % (self.x, self.y)
[406]	1844	for pseg in self.psegs: s += pseg.xml()
[319]	1845	for proc in self.procs: s += proc.xml()
[406]	1846	for peri in self.periphs: s += peri.xml()
[319]	1847	s += ' </cluster>\n'
	1848
	1849	return s
	1850
	1851	#############################################
[539]	1852	def cbin( self, mapping, verbose, expected ): # C binary structure for Cluster
[319]	1853
	1854	if ( verbose ):
	1855	print '*** cbin for cluster [%d,%d]' % (self.x, self.y)
	1856
	1857	# check index
	1858	if (self.index != expected):
[512]	1859	print '[genmap error] in Cluster.cbin()'
[539]	1860	print ' cluster global index = %d / expected = %d' \
	1861	% (self.index,expected)
[319]	1862	sys.exit(1)
	1863
[406]	1864	# compute global index for first pseg
[319]	1865	if ( len(self.psegs) > 0 ):
	1866	pseg_id = self.psegs[0].index
	1867	else:
	1868	pseg_id = 0
	1869
[406]	1870	# compute global index for first proc
[319]	1871	if ( len(self.procs) > 0 ):
	1872	proc_id = self.procs[0].index
	1873	else:
	1874	proc_id = 0
	1875
[406]	1876	# compute global index for first periph
[319]	1877	if ( len(self.periphs) > 0 ):
	1878	periph_id = self.periphs[0].index
	1879	else:
	1880	periph_id = 0
	1881
	1882	byte_stream = bytearray()
[539]	1883	byte_stream += mapping.int2bytes(4,self.x) # x coordinate
	1884	byte_stream += mapping.int2bytes(4,self.y) # x coordinate
	1885	byte_stream += mapping.int2bytes(4,len(self.psegs)) # psegs in cluster
	1886	byte_stream += mapping.int2bytes(4,pseg_id ) # global index
	1887	byte_stream += mapping.int2bytes(4,len(self.procs)) # procs in cluster
	1888	byte_stream += mapping.int2bytes(4,proc_id ) # global index
	1889	byte_stream += mapping.int2bytes(4,len(self.periphs)) # periphs in cluster
	1890	byte_stream += mapping.int2bytes(4, periph_id ) # global index
[406]	1891
[319]	1892	if ( verbose ):
	1893	print 'nb_psegs = %d' % len( self.psegs )
	1894	print 'pseg_id = %d' % pseg_id
	1895	print 'nb_procs = %d' % len( self.procs )
	1896	print 'proc_id = %d' % proc_id
	1897	print 'nb_periphs = %d' % len( self.periphs )
	1898	print 'periph_id = %d' % periph_id
	1899
	1900	return byte_stream
	1901
[539]	1902	##################################################################################
[305]	1903	class Vspace( object ):
[539]	1904	##################################################################################
[406]	1905	def __init__( self,
	1906	name,
[642]	1907	startname,
	1908	active ):
[319]	1909
	1910	self.index = 0 # global index ( set by addVspace() )
	1911	self.name = name # vspace name
[512]	1912	self.startname = startname # name of vseg containing the start_vector
[642]	1913	self.active = active # active at boot if true
[406]	1914	self.vsegs = []
[709]	1915	self.threads = []
[305]	1916
	1917	return
	1918
[319]	1919	################
	1920	def xml( self ): # xml for one vspace
	1921
[642]	1922	s = ' <vspace name="%s" startname="%s" active="%d" >\n' \
	1923	%(self.name , self.startname , self.active)
[319]	1924	for vseg in self.vsegs: s += vseg.xml()
[709]	1925	for thread in self.threads: s += thread.xml()
[305]	1926	s += ' </vspace>\n'
[319]	1927
[305]	1928	return s
	1929
[319]	1930	#############################################
[539]	1931	def cbin( self, mapping, verbose, expected ): # C binary for Vspace
[319]	1932
	1933	if ( verbose ):
	1934	print '*** cbin for vspace %s' % (self.name)
	1935
	1936	# check index
	1937	if (self.index != expected):
[512]	1938	print '[genmap error] in Vspace.cbin()'
[539]	1939	print ' vspace global index = %d / expected = %d' \
	1940	%(self.index,expected)
[319]	1941	sys.exit(1)
	1942
[512]	1943	# compute global index for vseg containing start_vector
	1944	vseg_start_id = 0xFFFFFFFF
[319]	1945	for vseg in self.vsegs:
[512]	1946	if ( vseg.name == self.startname ): vseg_start_id = vseg.index
	1947
	1948	if ( vseg_start_id == 0xFFFFFFFF ):
	1949	print '[genmap error] in Vspace.cbin()'
[539]	1950	print ' startname %s not found for vspace %s' \
	1951	%(self.startname,self.name)
[319]	1952	sys.exit(1)
[406]	1953
[709]	1954	# compute first vseg and first thread global index
[319]	1955	first_vseg_id = self.vsegs[0].index
[709]	1956	first_thread_id = self.threads[0].index
[406]	1957
[709]	1958	# compute number of threads and number of vsegs
[319]	1959	nb_vsegs = len( self.vsegs )
[709]	1960	nb_threads = len( self.threads )
[319]	1961
	1962	byte_stream = bytearray()
[539]	1963	byte_stream += mapping.str2bytes(32,self.name) # vspace name
	1964	byte_stream += mapping.int2bytes(4, vseg_start_id) # vseg start_vector
	1965	byte_stream += mapping.int2bytes(4, nb_vsegs) # number of vsegs
[709]	1966	byte_stream += mapping.int2bytes(4, nb_threads) # number of threads
[539]	1967	byte_stream += mapping.int2bytes(4, first_vseg_id) # global index
[709]	1968	byte_stream += mapping.int2bytes(4, first_thread_id) # global index
[642]	1969	byte_stream += mapping.int2bytes(4, self.active) # always active if non zero
[319]	1970
	1971	if ( verbose ):
[512]	1972	print 'start_id = %d' % vseg_start_id
[319]	1973	print 'nb_vsegs = %d' % nb_vsegs
[709]	1974	print 'nb_threads = %d' % nb_threads
[319]	1975	print 'vseg_id = %d' % first_vseg_id
[709]	1976	print 'thread_id = %d' % first_thread_id
[642]	1977	print 'active = %d' % self.active
[319]	1978
	1979	return byte_stream
	1980
[539]	1981	##################################################################################
[709]	1982	class Thread( object ):
[539]	1983	##################################################################################
[406]	1984	def __init__( self,
	1985	name,
[709]	1986	is_main,
[406]	1987	x,
[319]	1988	y,
[406]	1989	p,
	1990	stackname,
	1991	heapname,
[441]	1992	startid ):
[319]	1993
[709]	1994	self.index = 0 # global index value set by addThread()
	1995	self.name = name # thread name
	1996	self.is_main = is_main # Boolean (one main per vspace)
[406]	1997	self.x = x # cluster x coordinate
	1998	self.y = y # cluster y coordinate
	1999	self.p = p # processor local index
[512]	2000	self.stackname = stackname # name of vseg containing the stack
	2001	self.heapname = heapname # name of vseg containing the heap
[319]	2002	self.startid = startid # index in start_vector
[305]	2003	return
	2004
[709]	2005	########################################
	2006	def xml( self ): # xml for one thread
[319]	2007
[709]	2008	s = ' <thread name="%s"' % self.name
	2009	s += ' is_main="%d"' % self.is_main
[319]	2010	s += ' x="%d"' % self.x
	2011	s += ' y="%d"' % self.y
	2012	s += ' p="%d"' % self.p
[512]	2013	s += '\n '
[319]	2014	s += ' stackname="%s"' % self.stackname
	2015	s += ' heapname="%s"' % self.heapname
	2016	s += ' startid="%d"' % self.startid
[406]	2017	s += ' />\n'
[319]	2018
[305]	2019	return s
	2020
[709]	2021	############################################################################
	2022	def cbin( self, mapping, verbose, expected, vspace ): # C binary for Thread
[319]	2023
	2024	if ( verbose ):
[709]	2025	print '*** cbin for thread %s in vspace %s' \
[539]	2026	% (self.name, vspace.name)
[319]	2027
	2028	# check index
	2029	if (self.index != expected):
[709]	2030	print '[genmap error] in Thread.cbin()'
	2031	print ' thread global index = %d / expected = %d' \
[539]	2032	%(self.index,expected)
[319]	2033	sys.exit(1)
	2034
	2035	# compute cluster global index
	2036	cluster_id = (self.x * mapping.y_size) + self.y
	2037
[512]	2038	# compute vseg index for stack
	2039	vseg_stack_id = 0xFFFFFFFF
[319]	2040	for vseg in vspace.vsegs:
[512]	2041	if ( vseg.name == self.stackname ): vseg_stack_id = vseg.index
	2042
	2043	if ( vseg_stack_id == 0xFFFFFFFF ):
[709]	2044	print '[genmap error] in Thread.cbin()'
	2045	print ' stackname %s not found for thread %s in vspace %s' \
[319]	2046	% ( self.stackname, self.name, vspace.name )
	2047	sys.exit(1)
	2048
[512]	2049	# compute vseg index for heap
[453]	2050	if ( self.heapname == '' ):
[512]	2051	vseg_heap_id = 0
[453]	2052	else:
[512]	2053	vseg_heap_id = 0xFFFFFFFF
[453]	2054	for vseg in vspace.vsegs:
[512]	2055	if ( vseg.name == self.heapname ): vseg_heap_id = vseg.index
	2056
	2057	if ( vseg_heap_id == 0xFFFFFFFF ):
[709]	2058	print '[genmap error] in Thread.cbin()'
	2059	print ' heapname %s not found for thread %s in vspace %s' \
[453]	2060	% ( self.heapname, self.name, vspace.name )
	2061	sys.exit(1)
[319]	2062
	2063	byte_stream = bytearray()
[709]	2064	byte_stream += mapping.str2bytes(32,self.name) # thread name in vspace
[539]	2065	byte_stream += mapping.int2bytes(4, cluster_id) # cluster global index
	2066	byte_stream += mapping.int2bytes(4, self.p) # processor local index
[709]	2067	byte_stream += mapping.int2bytes(4, self.is_main) # main if non zero
[539]	2068	byte_stream += mapping.int2bytes(4, vseg_stack_id) # stack vseg local index
	2069	byte_stream += mapping.int2bytes(4, vseg_heap_id) # heap vseg local index
	2070	byte_stream += mapping.int2bytes(4, self.startid) # index in start vector
[633]	2071	byte_stream += mapping.int2bytes(4 ,0) # ltid (dynamically computed)
[319]	2072
	2073	if ( verbose ):
	2074	print 'clusterid = %d' % cluster_id
	2075	print 'lpid = %d' % self.p
[709]	2076	print 'is_main = %d' % self.is_main
[512]	2077	print 'stackid = %d' % vseg_stack_id
	2078	print 'heapid = %d' % vseg_heap_id
[406]	2079	print 'startid = %d' % self.startid
	2080
[319]	2081	return byte_stream
	2082
[539]	2083	##################################################################################
[305]	2084	class Vseg( object ):
[539]	2085	##################################################################################
[406]	2086	def __init__( self,
	2087	name,
	2088	vbase,
[512]	2089	length,
[406]	2090	mode,
[512]	2091	vtype,
[406]	2092	x,
	2093	y,
[512]	2094	pseg,
[348]	2095	identity = False,
[411]	2096	local = False,
[512]	2097	big = False,
	2098	binpath = '' ):
[305]	2099
[512]	2100	assert (vbase & 0xFFFFFFFF) == vbase
	2101
	2102	assert (length & 0xFFFFFFFF) == length
	2103
[319]	2104	assert mode in VSEGMODES
	2105
[512]	2106	assert vtype in VSEGTYPES
	2107
	2108	assert (vtype != 'ELF') or (binpath != '')
	2109
[348]	2110	self.index = 0 # global index ( set by addVseg() )
[512]	2111	self.name = name # vseg name (unique in vspace)
	2112	self.vbase = vbase # virtual base address in vspace
	2113	self.length = length # vseg length (bytes)
	2114	self.vtype = vtype # vseg type (defined in VSEGTYPES)
[348]	2115	self.mode = mode # CXWU access rights
[406]	2116	self.x = x # x coordinate of destination cluster
[348]	2117	self.y = y # y coordinate of destination cluster
[512]	2118	self.psegname = pseg # name of pseg in destination cluster
[348]	2119	self.identity = identity # identity mapping required
[411]	2120	self.local = local # only mapped in local PTAB when true
	2121	self.big = big # to be mapped in a big physical page
[539]	2122	self.binpath = binpath # pathname for binary file (ELF or BLOB)
[512]	2123
[305]	2124	return
	2125
[539]	2126	##################################
	2127	def xml( self ): # xml for a vseg
[319]	2128
[512]	2129	s = ' <vseg name="%s"' %(self.name)
	2130	s += ' vbase="0x%x"' %(self.vbase)
	2131	s += ' length="0x%x"' %(self.length)
	2132	s += ' type="%s"' %(self.vtype)
	2133	s += ' mode="%s"' %(self.mode)
	2134	s += '\n '
	2135	s += ' x="%d"' %(self.x)
	2136	s += ' y="%d"' %(self.y)
	2137	s += ' psegname="%s"' %(self.psegname)
	2138	if ( self.identity ): s += ' ident="1"'
	2139	if ( self.local ): s += ' local="1"'
	2140	if ( self.big ): s += ' big="1"'
	2141	if ( self.binpath != '' ): s += ' binpath="%s"' %(self.binpath)
	2142	s += ' />\n'
[319]	2143
[305]	2144	return s
	2145
[539]	2146	#####################################################################
	2147	def cbin( self, mapping, verbose, expected ): # C binary for Vseg
[319]	2148
	2149	if ( verbose ):
	2150	print '*** cbin for vseg[%d] %s' % (self.index, self.name)
	2151
	2152	# check index
	2153	if (self.index != expected):
[512]	2154	print '[genmap error] in Vseg.cbin()'
	2155	print ' vseg global index = %d / expected = %d' \
[319]	2156	% (self.index, expected )
	2157	sys.exit(1)
	2158
	2159	# compute pseg_id
	2160	pseg_id = 0xFFFFFFFF
	2161	cluster_id = (self.x * mapping.y_size) + self.y
	2162	cluster = mapping.clusters[cluster_id]
	2163	for pseg in cluster.psegs:
	2164	if (self.psegname == pseg.name):
	2165	pseg_id = pseg.index
	2166	if (pseg_id == 0xFFFFFFFF):
[512]	2167	print '[genmap error] in Vseg.cbin() : '
	2168	print ' psegname %s not found for vseg %s in cluster %d' \
[319]	2169	% ( self.psegname, self.name, cluster_id )
	2170	sys.exit(1)
	2171
	2172	# compute numerical value for mode
	2173	mode_id = 0xFFFFFFFF
[406]	2174	for x in xrange( len(VSEGMODES) ):
	2175	if ( self.mode == VSEGMODES[x] ):
[319]	2176	mode_id = x
	2177	if ( mode_id == 0xFFFFFFFF ):
[512]	2178	print '[genmap error] in Vseg.cbin() : '
	2179	print ' undefined vseg mode %s' % self.mode
[319]	2180	sys.exit(1)
	2181
[512]	2182	# compute numerical value for vtype
	2183	vtype_id = 0xFFFFFFFF
	2184	for x in xrange( len(VSEGTYPES) ):
	2185	if ( self.vtype == VSEGTYPES[x] ):
	2186	vtype_id = x
	2187	if ( vtype_id == 0xFFFFFFFF ):
	2188	print '[genmap error] in Vseg.cbin()'
	2189	print ' undefined vseg type %s' % self.vtype
	2190	sys.exit(1)
[319]	2191
	2192	byte_stream = bytearray()
[539]	2193	byte_stream += mapping.str2bytes(32,self.name ) # vseg name
	2194	byte_stream += mapping.str2bytes(64,self.binpath ) # binpath
	2195	byte_stream += mapping.int2bytes(4, self.vbase ) # virtual base address
	2196	byte_stream += mapping.int2bytes(8, 0 ) # physical base address
	2197	byte_stream += mapping.int2bytes(4, self.length ) # vseg size (bytes)
	2198	byte_stream += mapping.int2bytes(4, pseg_id ) # pseg global index
	2199	byte_stream += mapping.int2bytes(4, mode_id ) # CXWU flags
	2200	byte_stream += mapping.int2bytes(4, vtype_id ) # vseg type
	2201	byte_stream += mapping.int2bytes(1, 0 ) # mapped when non zero
	2202	byte_stream += mapping.int2bytes(1, self.identity ) # identity mapping
	2203	byte_stream += mapping.int2bytes(1, self.local ) # only in local PTAB
	2204	byte_stream += mapping.int2bytes(1, self.big ) # to be mapped in BPP
[319]	2205
	2206	if ( verbose ):
[512]	2207	print 'binpath = %s' % self.binpath
[319]	2208	print 'vbase = %x' % self.vbase
[512]	2209	print 'pbase = 0'
	2210	print 'length = %x' % self.length
[319]	2211	print 'pseg_id = %d' % pseg_id
[512]	2212	print 'mode = %d' % mode_id
	2213	print 'type = %d' % vtype_id
	2214	print 'mapped = 0'
	2215	print 'ident = %d' % self.identity
	2216	print 'local = %d' % self.local
	2217	print 'big = %d' % self.big
[406]	2218
[319]	2219	return byte_stream
	2220
[539]	2221	##################################################################################
[305]	2222	class Processor ( object ):
[539]	2223	##################################################################################
[319]	2224	def __init__( self,
[406]	2225	x,
	2226	y,
[319]	2227	lpid ):
	2228
	2229	self.index = 0 # global index ( set by addProc() )
	2230	self.x = x # x cluster coordinate
	2231	self.y = y # y cluster coordinate
	2232	self.lpid = lpid # processor local index
	2233
[305]	2234	return
	2235
[539]	2236	########################################
[406]	2237	def xml( self ): # xml for a processor
[305]	2238	return ' <proc index="%d" />\n' % (self.lpid)
	2239
[539]	2240	####################################################################
	2241	def cbin( self, mapping, verbose, expected ): # C binary for Proc
[319]	2242
	2243	if ( verbose ):
[539]	2244	print '*** cbin for proc %d in cluster (%d,%d)' \
	2245	% (self.lpid, self.x, self.y)
[319]	2246
	2247	# check index
	2248	if (self.index != expected):
[512]	2249	print '[genmap error] in Proc.cbin()'
[539]	2250	print ' proc global index = %d / expected = %d' \
	2251	% (self.index,expected)
[319]	2252	sys.exit(1)
	2253
	2254	byte_stream = bytearray()
	2255	byte_stream += mapping.int2bytes( 4 , self.lpid ) # local index
[406]	2256
[319]	2257	return byte_stream
	2258
[539]	2259	##################################################################################
[305]	2260	class Pseg ( object ):
[539]	2261	##################################################################################
[406]	2262	def __init__( self,
	2263	name,
	2264	base,
	2265	size,
[319]	2266	x,
	2267	y,
	2268	segtype ):
	2269
	2270	assert( segtype in PSEGTYPES )
	2271
	2272	self.index = 0 # global index ( set by addPseg() )
	2273	self.name = name # pseg name (unique in cluster)
	2274	self.base = base # physical base address
	2275	self.size = size # segment size (bytes)
[406]	2276	self.x = x # cluster x coordinate
	2277	self.y = y # cluster y coordinate
[319]	2278	self.segtype = segtype # RAM / PERI (defined in mapping_info.h)
	2279
[305]	2280	return
[406]	2281
[539]	2282	###################################
[319]	2283	def xml( self ): # xml for a pseg
	2284
[539]	2285	s = ' <pseg name="%s" type="%s" base="0x%x" length="0x%x" />\n' \
	2286	% (self.name, self.segtype, self.base, self.size)
	2287	return s
[305]	2288
[539]	2289	###########################################################################
	2290	def cbin( self, mapping, verbose, expected, cluster ): # C binary for Pseg
[319]	2291
	2292	if ( verbose ):
	2293	print '*** cbin for pseg[%d] %s in cluster[%d,%d]' \
	2294	% (self.index, self.name, cluster.x, cluster.y)
	2295
	2296	# check index
	2297	if (self.index != expected):
[512]	2298	print '[genmap error] in Pseg.cbin()'
[539]	2299	print ' pseg global index = %d / expected = %d' \
	2300	% (self.index,expected)
[319]	2301	sys.exit(1)
[406]	2302
[319]	2303	# compute numerical value for segtype
	2304	segtype_int = 0xFFFFFFFF
[406]	2305	for x in xrange( len(PSEGTYPES) ):
[512]	2306	if ( self.segtype == PSEGTYPES[x] ): segtype_int = x
	2307
[319]	2308	if ( segtype_int == 0xFFFFFFFF ):
[512]	2309	print '[genmap error] in Pseg.cbin()'
	2310	print ' undefined segment type %s' % self.segtype
[319]	2311	sys.exit(1)
	2312
	2313	byte_stream = bytearray()
[539]	2314	byte_stream += mapping.str2bytes(32,self.name) # pseg name
	2315	byte_stream += mapping.int2bytes(8 ,self.base) # physical base address
	2316	byte_stream += mapping.int2bytes(8 ,self.size) # segment length
	2317	byte_stream += mapping.int2bytes(4 ,segtype_int) # segment type
	2318	byte_stream += mapping.int2bytes(4 ,cluster.index) # cluster global index
	2319	byte_stream += mapping.int2bytes(4 ,0) # linked list of vsegs
[319]	2320
	2321	if ( verbose ):
	2322	print 'pbase = %x' % self.base
	2323	print 'size = %x' % self.size
	2324	print 'type = %s' % self.segtype
[406]	2325
[319]	2326	return byte_stream
	2327
[539]	2328	##################################################################################
[319]	2329	class Periph ( object ):
[539]	2330	##################################################################################
[406]	2331	def __init__( self,
[319]	2332	pseg, # associated pseg
	2333	ptype, # peripheral type
	2334	subtype = 'NONE', # peripheral subtype
	2335	channels = 1, # for multi-channels peripherals
[539]	2336	arg0 = 0, # optional (semantic depends on ptype)
	2337	arg1 = 0, # optional (semantic depends on ptype)
	2338	arg2 = 0, # optional (semantic depends on ptype)
	2339	arg3 = 0 ): # optional (semantic depends on ptype)
[319]	2340
	2341	self.index = 0 # global index ( set by addPeriph() )
[406]	2342	self.channels = channels
	2343	self.ptype = ptype
	2344	self.subtype = subtype
[520]	2345	self.arg0 = arg0
	2346	self.arg1 = arg1
	2347	self.arg2 = arg2
	2348	self.arg3 = arg3
[319]	2349	self.pseg = pseg
	2350	self.irqs = []
[562]	2351	self.irq_ctrl = None # interrupt controller peripheral
[305]	2352	return
	2353
[539]	2354	######################################
[319]	2355	def xml( self ): # xml for a periph
	2356
	2357	s = ' <periph type="%s"' % self.ptype
	2358	s += ' subtype="%s"' % self.subtype
	2359	s += ' psegname="%s"' % self.pseg.name
	2360	s += ' channels="%d"' % self.channels
[520]	2361	s += ' arg0="%d"' % self.arg0
	2362	s += ' arg1="%d"' % self.arg1
	2363	s += ' arg2="%d"' % self.arg2
	2364	s += ' arg3="%d"' % self.arg3
[441]	2365	if ( (self.ptype == 'PIC') or (self.ptype == 'XCU') ):
[520]	2366	s += ' >\n'
[319]	2367	for irq in self.irqs: s += irq.xml()
[520]	2368	s += ' </periph>\n'
	2369	else:
	2370	s += ' />\n'
[305]	2371	return s
	2372
[539]	2373	######################################################################
	2374	def cbin( self, mapping, verbose, expected ): # C binary for Periph
[305]	2375
[319]	2376	if ( verbose ):
	2377	print '*** cbin for periph %s in cluster [%d,%d]' \
	2378	% (self.ptype, self.pseg.x, self.pseg.y)
[305]	2379
[319]	2380	# check index
	2381	if (self.index != expected):
[512]	2382	print '[genmap error] in Periph.cbin()'
[539]	2383	print ' periph global index = %d / expected = %d' \
	2384	% (self.index,expected)
[319]	2385	sys.exit(1)
[305]	2386
[319]	2387	# compute pseg global index
	2388	pseg_id = self.pseg.index
[305]	2389
[319]	2390	# compute first irq global index
	2391	if ( len(self.irqs) > 0 ):
	2392	irq_id = self.irqs[0].index
	2393	else:
	2394	irq_id = 0
[305]	2395
[319]	2396	# compute numerical value for ptype
	2397	ptype_id = 0xFFFFFFFF
[406]	2398	for x in xrange( len(PERIPHTYPES) ):
[319]	2399	if ( self.ptype == PERIPHTYPES[x] ): ptype_id = x
[512]	2400
[319]	2401	if ( ptype_id == 0xFFFFFFFF ):
[512]	2402	print '[genmap error] in Periph.cbin()'
	2403	print ' undefined peripheral type %s' % self.ptype
[319]	2404	sys.exit(1)
[305]	2405
[319]	2406	# compute numerical value for subtype
	2407	subtype_id = 0xFFFFFFFF
[520]	2408	if (self.ptype == 'IOC'):
	2409	for x in xrange( len(IOCSUBTYPES) ):
	2410	if ( self.subtype == IOCSUBTYPES[x] ): subtype_id = x
	2411	if (self.ptype == 'MWR'):
	2412	for x in xrange( len(MWRSUBTYPES) ):
	2413	if ( self.subtype == MWRSUBTYPES[x] ): subtype_id = x
	2414
[319]	2415	byte_stream = bytearray()
[539]	2416	byte_stream += mapping.int2bytes(4,ptype_id) # peripheral type
	2417	byte_stream += mapping.int2bytes(4,subtype_id) # peripheral subtype
	2418	byte_stream += mapping.int2bytes(4,pseg_id) # pseg global index
	2419	byte_stream += mapping.int2bytes(4,self.channels) # number of channels
	2420	byte_stream += mapping.int2bytes(4,self.arg0) # optionnal arg0
	2421	byte_stream += mapping.int2bytes(4,self.arg1) # optionnal arg1
	2422	byte_stream += mapping.int2bytes(4,self.arg2) # optionnal arg2
	2423	byte_stream += mapping.int2bytes(4,self.arg3) # optionnal arg3
	2424	byte_stream += mapping.int2bytes(4,len(self.irqs)) # number of input irqs
	2425	byte_stream += mapping.int2bytes( 4 , irq_id ) # global index
[305]	2426
[319]	2427	if ( verbose ):
	2428	print 'ptype = %d' % ptype_id
[520]	2429	print 'subtype = %d' % subtype_id
[319]	2430	print 'pseg_id = %d' % pseg_id
	2431	print 'nb_irqs = %d' % len( self.irqs )
[406]	2432	print 'irq_id = %d' % irq_id
[319]	2433	return byte_stream
[305]	2434
[539]	2435	##################################################################################
[319]	2436	class Irq ( object ):
[539]	2437	##################################################################################
[406]	2438	def __init__( self,
[319]	2439	irqtype, # input IRQ type : HWI / WTI / PTI (for XCU only)
	2440	srcid, # input IRQ index (for XCU or PIC)
	2441	isrtype, # Type of ISR to be executed
	2442	channel = 0 ): # channel index for multi-channel ISR
[305]	2443
[319]	2444	assert irqtype in IRQTYPES
	2445	assert isrtype in ISRTYPES
	2446	assert srcid < 32
[305]	2447
[319]	2448	self.index = 0 # global index ( set by addIrq() )
[406]	2449	self.irqtype = irqtype # IRQ type
[319]	2450	self.srcid = srcid # source IRQ index
[406]	2451	self.isrtype = isrtype # ISR type
[319]	2452	self.channel = channel # channel index (for multi-channels ISR)
[305]	2453	return
	2454
[539]	2455	################################
[319]	2456	def xml( self ): # xml for Irq
[305]	2457
[539]	2458	s = ' <irq srctype="%s" srcid="%d" isr="%s" channel="%d" />\n' \
[319]	2459	% ( self.irqtype, self.srcid, self.isrtype, self.channel )
[539]	2460	return s
[305]	2461
[539]	2462	####################################################################
	2463	def cbin( self, mapping, verbose, expected ): # C binary for Irq
[305]	2464
[319]	2465	if ( verbose ):
[406]	2466	print '*** cbin for irq[%d]' % (self.index)
[305]	2467
[319]	2468	# check index
	2469	if (self.index != expected):
[512]	2470	print '[genmap error] in Irq.cbin()'
[539]	2471	print ' irq global index = %d / expected = %d' \
	2472	% (self.index,expected)
[319]	2473	sys.exit(1)
[305]	2474
[319]	2475	# compute numerical value for irqtype
	2476	irqtype_id = 0xFFFFFFFF
	2477	for x in xrange( len(IRQTYPES) ):
[512]	2478	if ( self.irqtype == IRQTYPES[x] ): irqtype_id = x
	2479
[319]	2480	if ( irqtype_id == 0xFFFFFFFF ):
[512]	2481	print '[genmap error] in Irq.cbin()'
	2482	print ' undefined irqtype %s' % self.irqtype
[319]	2483	sys.exit(1)
[305]	2484
[319]	2485	# compute numerical value for isrtype
	2486	isrtype_id = 0xFFFFFFFF
[406]	2487	for x in xrange( len(ISRTYPES) ):
[512]	2488	if ( self.isrtype == ISRTYPES[x] ): isrtype_id = x
	2489
[319]	2490	if ( isrtype_id == 0xFFFFFFFF ):
[512]	2491	print '[genmap error] in Irq.cbin()'
	2492	print ' undefined isrtype %s' % self.isrtype
[319]	2493	sys.exit(1)
	2494
	2495	byte_stream = bytearray()
	2496	byte_stream += mapping.int2bytes( 4, irqtype_id )
	2497	byte_stream += mapping.int2bytes( 4, self.srcid )
	2498	byte_stream += mapping.int2bytes( 4, isrtype_id )
	2499	byte_stream += mapping.int2bytes( 4, self.channel )
	2500	byte_stream += mapping.int2bytes( 4, 0 )
	2501	byte_stream += mapping.int2bytes( 4, 0 )
	2502
	2503	if ( verbose ):
	2504	print 'irqtype = %s' % self.irqtype
	2505	print 'srcid = %d' % self.srcid
	2506	print 'isrtype = %s' % self.isrtype
	2507	print 'channel = %d' % self.channel
	2508
	2509	return byte_stream
	2510
[305]	2511	# Local Variables:
	2512	# tab-width: 4;
	2513	# c-basic-offset: 4;
	2514	# c-file-offsets:((innamespace . 0)(inline-open . 0));
	2515	# indent-tabs-mode: nil;
	2516	# End:
	2517	#
	2518	# vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
	2519

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