1 | #!/usr/bin/env python |
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2 | |
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3 | import sys |
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4 | |
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5 | ########################################################################################## |
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6 | # file : giet_mapping.py |
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7 | # date : april 2014 |
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8 | # author : Alain Greiner |
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9 | ########################################################################################## |
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10 | # This file contains the classes required to define a mapping for the GIET_VM. |
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11 | # - A 'Mapping' contains a set of 'Cluster' (hardware architecture) |
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12 | # a set of 'Vseg' (kernel virtual segments mapping) |
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13 | # a set of 'Vspace' (several user applications). |
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14 | # - A 'Cluster' contains a set of 'Pseg' (all physical segments in cluster) |
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15 | # a set of 'Proc' (processors in cluster) |
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16 | # a set of 'Periph' (peripherals in cluster) |
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17 | # a set of 'Coproc' (coprocessors in cluster) |
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18 | # - A 'Vspace' contains a set of 'Vseg' (user virtual segments mapping) |
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19 | # a set of 'Task' (user tasks mapping) |
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20 | # - A 'Vseg' contains a set of 'Vobj' |
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21 | # - A 'Periph' contains a set of 'Irq' (only for XCU, ICU and PIC types ) |
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22 | # - A 'Coproc' contains a set of 'Cpports' (one port per MWMR channel) |
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23 | ########################################################################################## |
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24 | # Implementation Note |
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25 | # The various objects used to describe a mapping are distributed in the PYTHON structure: |
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26 | # For example the psegs set is split in several subsets (one subset per cluster), |
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27 | # or the tasks set is split in several subsets (one subset per vspace), etc... |
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28 | # In the C binary data structure used by the giet_vm, all objects of same type |
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29 | # are stored in a linear array (one single array for all psegs for example). |
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30 | # For all objects, we compute and store in the PYTHON object itsel a "global index" |
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31 | # corresponding to the index in this global array, and this index can be used as |
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32 | # a pseudo-pointer to identify a specific object of a given type. |
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33 | ########################################################################################## |
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34 | |
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35 | ########################################################################################## |
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36 | # Various constants |
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37 | ########################################################################################## |
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38 | |
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39 | PADDR_WIDTH = 40 # number of bits for physical address |
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40 | X_WIDTH = 4 # number of bits encoding x coordinate |
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41 | Y_WIDTH = 4 # number of bits encoding y coordinate |
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42 | P_WIDTH = 4 # number of bits encoding local proc_id |
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43 | VPN_ANTI_MASK = 0x00000FFF # mask virtual address to get offset in a small page |
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44 | BPN_MASK = 0xFFE00000 # mask virtual address to get the BPN (big page) |
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45 | PERI_INCREMENT = 0x10000 # virtual address increment for replicated global vsegs |
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46 | RESET_ADDRESS = 0xBFC00000 # Processor wired boot_address |
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47 | MAPPING_SIGNATURE = 0xDACE2014 # Magic number indicating a valid C binary struture |
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48 | |
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49 | ########################################################################################## |
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50 | # These global lists must be consistent with enums in mapping_info.h or irq_handler. |
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51 | ########################################################################################## |
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52 | PERIPHTYPES = [ |
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53 | 'CMA', |
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54 | 'DMA', |
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55 | 'FBF', |
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56 | 'ICU', |
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57 | 'IOB', |
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58 | 'IOC', |
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59 | 'MMC', |
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60 | 'MWR', |
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61 | 'NIC', |
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62 | 'ROM', |
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63 | 'SIM', |
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64 | 'TIM', |
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65 | 'TTY', |
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66 | 'XCU', |
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67 | 'PIC', |
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68 | ] |
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69 | |
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70 | PERIPHSUBTYPES = [ |
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71 | 'BDV', |
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72 | 'HBA', |
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73 | 'SPI', |
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74 | 'NONE', |
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75 | ] |
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76 | |
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77 | IRQTYPES = [ |
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78 | 'HWI', |
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79 | 'WTI', |
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80 | 'PTI', |
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81 | ] |
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82 | |
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83 | ISRTYPES = [ |
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84 | 'ISR_DEFAULT', |
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85 | 'ISR_TICK', |
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86 | 'ISR_TTY_RX', |
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87 | 'ISR_TTY_TX', |
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88 | 'ISR_BDV', |
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89 | 'ISR_TIMER', |
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90 | 'ISR_WAKUP', |
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91 | 'ISR_NIC_RX', |
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92 | 'ISR_NIC_TX', |
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93 | 'ISR_CMA', |
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94 | 'ISR_MMC', |
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95 | 'ISR_DMA', |
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96 | 'ISR_SPI', |
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97 | ] |
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98 | |
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99 | VOBJTYPES = [ |
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100 | 'ELF', |
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101 | 'BLOB', |
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102 | 'PTAB', |
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103 | 'PERI', |
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104 | 'MWMR', |
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105 | 'LOCK', |
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106 | 'BUFFER', |
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107 | 'BARRIER', |
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108 | 'CONST', |
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109 | 'MEMSPACE', |
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110 | 'SCHED', |
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111 | ] |
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112 | |
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113 | VSEGMODES = [ |
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114 | '____', |
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115 | '___U', |
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116 | '__W_', |
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117 | '__WU', |
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118 | '_X__', |
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119 | '_X_U', |
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120 | '_XW_', |
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121 | '_XWU', |
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122 | 'C___', |
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123 | 'C__U', |
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124 | 'C_W_', |
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125 | 'C_WU', |
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126 | 'CX__', |
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127 | 'CX_U', |
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128 | 'CXW_', |
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129 | 'CXWU', |
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130 | ] |
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131 | |
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132 | PSEGTYPES = [ |
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133 | 'RAM', |
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134 | 'ROM', # deprecated => use PERI |
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135 | 'PERI', |
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136 | ] |
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137 | |
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138 | CP_PORT_DIRS = [ |
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139 | 'TO_COPROC', |
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140 | 'FROM_COPROC', |
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141 | ] |
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142 | |
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143 | ########################################################################################## |
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144 | class Mapping( object ): |
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145 | ########################################################################################## |
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146 | def __init__( self, |
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147 | name, # mapping name |
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148 | x_size, # number of clusters in a row |
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149 | y_size, # number of clusters in a column |
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150 | nprocs, # max number of processors per cluster |
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151 | x_width = X_WIDTH, # number of bits encoding x coordinate |
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152 | y_width = Y_WIDTH, # number of bits encoding y coordinate |
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153 | p_width = P_WIDTH, # number of bits encoding local proc_id |
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154 | paddr_width = PADDR_WIDTH, # number of bits for physical address |
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155 | coherence = 1, # hardware cache coherence when non-zero |
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156 | irq_per_proc = 1, # number or IRQs from XCU to processor |
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157 | use_ramdisk = False, # use ramdisk when true |
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158 | x_io = 0, # cluster_io x coordinate |
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159 | y_io = 0, # cluster_io y coordinate |
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160 | peri_increment = PERI_INCREMENT, # address increment for globals |
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161 | reset_address = RESET_ADDRESS, # Processor wired boot_address |
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162 | ram_base = 0, # RAM physical base in cluster[0,0] |
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163 | ram_size = 0 ): # RAM size in each cluster (bytes) |
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164 | |
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165 | assert ( x_size <= (1<<X_WIDTH) ) |
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166 | assert ( y_size <= (1<<Y_WIDTH) ) |
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167 | assert ( nprocs <= (1<<P_WIDTH) ) |
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168 | |
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169 | self.signature = MAPPING_SIGNATURE |
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170 | self.name = name |
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171 | self.paddr_width = paddr_width |
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172 | self.coherence = coherence |
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173 | self.x_size = x_size |
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174 | self.y_size = y_size |
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175 | self.nprocs = nprocs |
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176 | self.x_width = x_width |
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177 | self.y_width = y_width |
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178 | self.p_width = p_width |
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179 | self.irq_per_proc = irq_per_proc |
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180 | self.use_ramdisk = use_ramdisk |
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181 | self.x_io = x_io |
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182 | self.y_io = y_io |
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183 | self.peri_increment = peri_increment |
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184 | self.reset_address = reset_address |
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185 | self.ram_base = ram_base |
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186 | self.ram_size = ram_size |
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187 | |
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188 | self.total_vspaces = 0 |
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189 | self.total_globals = 0 |
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190 | self.total_psegs = 0 |
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191 | self.total_vsegs = 0 |
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192 | self.total_vobjs = 0 |
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193 | self.total_tasks = 0 |
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194 | self.total_procs = 0 |
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195 | self.total_irqs = 0 |
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196 | self.total_coprocs = 0 |
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197 | self.total_cpports = 0 |
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198 | self.total_periphs = 0 |
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199 | |
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200 | self.clusters = [] |
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201 | self.globs = [] |
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202 | self.vspaces = [] |
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203 | |
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204 | for x in xrange( self.x_size ): |
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205 | for y in xrange( self.y_size ): |
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206 | cluster = Cluster( x , y ) |
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207 | cluster.index = (x * self.y_size) + y |
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208 | self.clusters.append( cluster ) |
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209 | |
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210 | return |
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211 | |
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212 | ########################## add a ram pseg in a cluster |
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213 | def addRam( self, |
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214 | name, # pseg name |
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215 | base, # pseg base address |
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216 | size ): # pseg length (bytes) |
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217 | |
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218 | # computes coordinates from the base address extension |
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219 | paddr_lsb_width = self.paddr_width - self.x_width - self.y_width |
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220 | cluster_xy = base >> paddr_lsb_width |
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221 | x = cluster_xy >> (self.y_width); |
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222 | y = cluster_xy & ((1 << self.y_width) - 1) |
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223 | |
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224 | assert (base & VPN_ANTI_MASK) == 0 |
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225 | |
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226 | assert (x < self.x_size) and (y < self.y_size) |
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227 | |
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228 | assert ( (base & ((1<<paddr_lsb_width)-1)) == self.ram_base ) |
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229 | |
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230 | assert ( size == self.ram_size ) |
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231 | |
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232 | cluster_id = (x * self.y_size) + y |
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233 | |
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234 | # add one pseg in the mapping |
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235 | pseg = Pseg( name, base, size, x, y, 'RAM' ) |
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236 | self.clusters[cluster_id].psegs.append( pseg ) |
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237 | pseg.index = self.total_psegs |
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238 | self.total_psegs += 1 |
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239 | |
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240 | return pseg |
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241 | |
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242 | ############################## add a peripheral and the associated pseg in a cluster |
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243 | def addPeriph( self, |
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244 | name, # associated pseg name |
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245 | base, # associated pseg base address |
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246 | size, # associated pseg length (bytes) |
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247 | ptype, # peripheral type |
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248 | subtype = 'NONE', # peripheral subtype |
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249 | channels = 1, # number of channels |
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250 | arg = 0 ): # optional argument (semantic depends on ptype) |
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251 | |
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252 | # check cluster coordinates (obtained from the base address) |
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253 | cluster_xy = base >> (self.paddr_width - self.x_width - self.y_width) |
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254 | x = cluster_xy >> (self.y_width); |
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255 | y = cluster_xy & ((1 << self.y_width) - 1) |
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256 | |
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257 | assert (x < self.x_size) and (y < self.y_size) |
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258 | |
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259 | assert (base & VPN_ANTI_MASK) == 0 |
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260 | |
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261 | assert ptype in PERIPHTYPES |
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262 | |
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263 | assert subtype in PERIPHSUBTYPES |
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264 | |
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265 | cluster_id = (x * self.y_size) + y |
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266 | |
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267 | # add one pseg into mapping |
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268 | pseg = Pseg( name, base, size, x, y, 'PERI' ) |
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269 | self.clusters[cluster_id].psegs.append( pseg ) |
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270 | pseg.index = self.total_psegs |
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271 | self.total_psegs += 1 |
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272 | |
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273 | # add one periph into mapping |
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274 | periph = Periph( pseg, ptype, subtype, channels, arg ) |
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275 | self.clusters[cluster_id].periphs.append( periph ) |
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276 | periph.index = self.total_periphs |
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277 | self.total_periphs += 1 |
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278 | |
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279 | return periph |
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280 | |
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281 | ################################ add an IRQ in a peripheral |
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282 | def addIrq( self, |
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283 | periph, # peripheral containing IRQ (PIC or XCU) |
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284 | index, # peripheral input port index |
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285 | isrtype, # ISR type |
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286 | channel = 0 ): # channel for multi-channels ISR |
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287 | |
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288 | assert isrtype in ISRTYPES |
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289 | |
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290 | assert index < 32 |
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291 | |
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292 | # add one irq into mapping |
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293 | irq = Irq( 'HWI', index , isrtype, channel ) |
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294 | periph.irqs.append( irq ) |
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295 | irq.index = self.total_irqs |
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296 | self.total_irqs += 1 |
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297 | |
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298 | return irq |
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299 | |
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300 | ########################## add a processor in a cluster |
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301 | def addProc( self, |
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302 | x, # cluster x coordinate |
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303 | y, # cluster y coordinate |
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304 | p ): # processor local index |
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305 | |
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306 | assert (x < self.x_size) and (y < self.y_size) |
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307 | |
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308 | cluster_id = (x * self.y_size) + y |
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309 | |
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310 | # add one proc into mapping |
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311 | proc = Processor( x, y, p ) |
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312 | self.clusters[cluster_id].procs.append( proc ) |
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313 | proc.index = self.total_procs |
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314 | self.total_procs += 1 |
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315 | |
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316 | return proc |
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317 | |
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318 | ############################## add a coprocessor in a cluster |
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319 | def addCoproc( self, |
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320 | name, # associated pseg name |
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321 | base, # associated pseg base address |
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322 | size ): # associated pseg length |
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323 | |
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324 | # check cluster coordinates (obtained from the base address) |
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325 | cluster_xy = base >> (self.paddr_width - self.x_width - self.y_width) |
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326 | x = cluster_xy >> (self.y_width); |
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327 | y = cluster_xy & ((1 << self.y_width) - 1) |
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328 | |
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329 | assert (x < self.x_size) and (y < self.y_size) |
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330 | |
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331 | cluster_id = (x * self.y_size) + y |
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332 | |
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333 | # add one pseg into mapping |
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334 | pseg = Pseg( name, base, size, x, y, 'PERI' ) |
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335 | self.clusters[cluster_id].psegs.append( pseg ) |
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336 | pseg.index = self.total_psegs |
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337 | self.total_psegs += 1 |
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338 | |
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339 | # add one coproc into mapping |
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340 | periph = Coproc( pseg ) |
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341 | self.clusters[cluster_id].coprocs.append( coproc ) |
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342 | periph.index = self.total_coprocs |
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343 | self.total_coprocs += 1 |
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344 | |
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345 | return coproc |
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346 | |
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347 | ################################## add a port in a coprocessor |
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348 | def addPort( self, |
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349 | coproc, # coprocessor containing the port |
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350 | direction, # direction (TO_COPROC / FROM_COPROC) |
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351 | vspacename, # name of vspace using the coproc |
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352 | mwmrname ): # name of the vobj defining the MWMR channel |
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353 | |
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354 | assert direction in CP_PORT_DIRS |
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355 | |
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356 | # add one cpport into mapping |
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357 | port = Cpport( direction, vspacename, mwmrname ) |
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358 | coproc.ports.append( port ) |
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359 | port.index = self.total_cpports |
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360 | self.total_cpports += 1 |
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361 | |
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362 | return port |
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363 | |
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364 | ############################ add one global vseg into mapping |
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365 | def addGlobal( self, |
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366 | name, # vseg name |
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367 | vbase, # virtual base address |
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368 | size, # vobj length (bytes) |
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369 | mode, # CXWU flags |
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370 | vtype, # vobj type |
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371 | x, # destination x coordinate |
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372 | y, # destination y coordinate |
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373 | pseg, # destination pseg name |
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374 | identity = False, # identity mapping required if true |
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375 | binpath = '', # pathname for binary code if required |
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376 | align = 0, # alignment required |
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377 | local = False, # only mapped in local PTAB if true |
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378 | big = False ): # to be mapped in a big physical page |
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379 | |
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380 | assert mode in VSEGMODES |
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381 | |
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382 | assert vtype in VOBJTYPES |
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383 | |
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384 | assert (x < self.x_size) and (y < self.y_size) |
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385 | |
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386 | # two global vsegs must not overlap if they have different names |
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387 | for prev in self.globs: |
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388 | prev_vbase = prev.vbase |
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389 | prev_size = prev.vobjs[0].length |
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390 | |
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391 | if ( ((prev_vbase + prev_size) > vbase ) and |
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392 | ((vbase + size) > prev_vbase) and |
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393 | (prev.name != name) ): |
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394 | print '[genmap error] in addGlobal() : %s overlap %s' % (name, prev.name) |
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395 | print ' %s : base = %x / size = %x' %( name, vbase, size ) |
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396 | print ' %s : base = %x / size = %x' %( prev.name, prev_vbase, prev_size ) |
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397 | sys.exit(1) |
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398 | |
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399 | # add one vseg into mapping |
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400 | vseg = Vseg( name, vbase, mode, x, y, pseg, |
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401 | identity = identity, local = local, big = big ) |
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402 | |
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403 | self.globs.append( vseg ) |
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404 | self.total_globals += 1 |
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405 | vseg.index = self.total_vsegs |
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406 | self.total_vsegs += 1 |
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407 | |
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408 | # add one vobj into mapping |
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409 | vobj = Vobj( name, size, vtype, binpath, 0, 0 ) |
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410 | vseg.vobjs.append( vobj ) |
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411 | vobj.index = self.total_vobjs |
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412 | self.total_vobjs += 1 |
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413 | |
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414 | return |
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415 | |
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416 | ################################ add a vspace into mapping |
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417 | def addVspace( self, |
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418 | name, # vspace name |
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419 | startname ): # name of vobj containing start_vector |
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420 | |
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421 | # add one vspace into mapping |
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422 | vspace = Vspace( name, startname ) |
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423 | self.vspaces.append( vspace ) |
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424 | vspace.index = self.total_vspaces |
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425 | self.total_vspaces += 1 |
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426 | |
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427 | return vspace |
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428 | |
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429 | ################################# add a private vseg and a vobj in a vspace |
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430 | def addVseg( self, |
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431 | vspace, # vspace containing the vseg |
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432 | name, # vseg name |
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433 | vbase, # virtual base address |
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434 | size, # vobj length (bytes) |
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435 | mode, # CXWU flags |
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436 | vtype, # vobj type |
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437 | x, # destination x coordinate |
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438 | y, # destination y coordinate |
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439 | pseg, # destination pseg name |
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440 | binpath = '', # pathname for binary code |
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441 | align = 0, # alignment required |
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442 | init = 0, # initial value |
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443 | local = False, # only mapped in local PTAB if true |
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444 | big = False ): # to be mapped in a big physical page |
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445 | |
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446 | assert mode in VSEGMODES |
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447 | |
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448 | assert vtype in VOBJTYPES |
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449 | |
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450 | assert (x < self.x_size) and (y < self.y_size) |
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451 | |
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452 | # add one vseg into mapping |
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453 | vseg = Vseg( name, vbase, mode, x, y, pseg, local = local, big = big ) |
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454 | vspace.vsegs.append( vseg ) |
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455 | vseg.index = self.total_vsegs |
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456 | self.total_vsegs += 1 |
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457 | |
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458 | # add one vobj into mapping |
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459 | vobj = Vobj( name, size, vtype, binpath, align, init ) |
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460 | vseg.vobjs.append( vobj ) |
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461 | vobj.index = self.total_vobjs |
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462 | self.total_vobjs += 1 |
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463 | |
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464 | return vseg |
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465 | |
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466 | ################################ add a vobj in a private vseg |
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467 | def addVobj( self, |
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468 | vseg, # vseg containing vobj |
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469 | name, # vobj name |
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470 | size, # vobj length (bytes) |
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471 | vtype, # vobj type |
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472 | binpath = '', # pathname to binary |
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473 | align = 0, # alignment constraint |
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474 | init = 0 ): # initial value |
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475 | |
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476 | assert vtype in VOBJTYPES |
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477 | |
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478 | # add one vobj into mapping |
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479 | vobj = Vobj( name, size, vtype, binpath, align, init ) |
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480 | vseg.vobjs.append( vobj ) |
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481 | vobj.index = self.total_vobjs |
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482 | self.total_vobjs += 1 |
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483 | |
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484 | return vobj |
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485 | |
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486 | ################################ add a task in a vspace |
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487 | def addTask( self, |
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488 | vspace, # vspace containing task |
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489 | name, # task name |
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490 | trdid, # task index in vspace |
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491 | x, # destination x coordinate |
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492 | y, # destination y coordinate |
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493 | lpid, # destination processor local index |
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494 | stackname, # name of vobj containing stack |
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495 | heapname, # name of vobj containing heap |
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496 | startid, # index in start_vector |
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497 | usetty = False, # request a private TTY channel |
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498 | usenic = False, # request a private NIC channel |
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499 | usecma = False, # request a private CMA channel |
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500 | usehba = False, # request a private HBA channel |
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501 | usetim = False ): # request a private TIM channel |
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502 | |
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503 | assert (x < self.x_size) and (y < self.y_size) |
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504 | assert lpid < self.nprocs |
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505 | |
---|
506 | # add one task into mapping |
---|
507 | task = Task( name, trdid, x, y, lpid, stackname, heapname, startid, |
---|
508 | usetty, usenic, usecma, usehba, usetim ) |
---|
509 | vspace.tasks.append( task ) |
---|
510 | task.index = self.total_tasks |
---|
511 | self.total_tasks += 1 |
---|
512 | |
---|
513 | return task |
---|
514 | |
---|
515 | ################################# |
---|
516 | def str2bytes( self, nbytes, s ): # string => nbytes_packed byte array |
---|
517 | |
---|
518 | byte_stream = bytearray() |
---|
519 | length = len( s ) |
---|
520 | if length < (nbytes - 1): |
---|
521 | for b in s: |
---|
522 | byte_stream.append( b ) |
---|
523 | for x in xrange(nbytes-length): |
---|
524 | byte_stream.append( '\0' ) |
---|
525 | else: |
---|
526 | print '[genmap error] in str2bytes() : string %s too long' % s |
---|
527 | sys.exit(1) |
---|
528 | |
---|
529 | return byte_stream |
---|
530 | |
---|
531 | ################################### |
---|
532 | def int2bytes( self, nbytes, val ): # integer => nbytes litle endian byte array |
---|
533 | |
---|
534 | byte_stream = bytearray() |
---|
535 | for n in xrange( nbytes ): |
---|
536 | byte_stream.append( (val >> (n<<3)) & 0xFF ) |
---|
537 | |
---|
538 | return byte_stream |
---|
539 | |
---|
540 | #################################################################################### |
---|
541 | def xml( self ): # compute string for map.xml file generation |
---|
542 | |
---|
543 | s = '<?xml version="1.0"?>\n\n' |
---|
544 | s += '<mapping_info signature = "0x%x"\n' % (self.signature) |
---|
545 | s += ' name = "%s"\n' % (self.name) |
---|
546 | s += ' x_size = "%d"\n' % (self.x_size) |
---|
547 | s += ' y_size = "%d"\n' % (self.y_size) |
---|
548 | s += ' x_width = "%d"\n' % (self.x_width) |
---|
549 | s += ' y_width = "%d"\n' % (self.y_width) |
---|
550 | s += ' irq_per_proc = "%d"\n' % (self.irq_per_proc) |
---|
551 | s += ' use_ramdisk = "%d"\n' % (self.use_ramdisk) |
---|
552 | s += ' x_io = "%d"\n' % (self.x_io) |
---|
553 | s += ' y_io = "%d" >\n' % (self.y_io) |
---|
554 | s += '\n' |
---|
555 | |
---|
556 | s += ' <clusterset>\n' |
---|
557 | for x in xrange ( self.x_size ): |
---|
558 | for y in xrange ( self.y_size ): |
---|
559 | cluster_id = (x * self.y_size) + y |
---|
560 | s += self.clusters[cluster_id].xml() |
---|
561 | s += ' </clusterset>\n' |
---|
562 | s += '\n' |
---|
563 | |
---|
564 | s += ' <globalset>\n' |
---|
565 | for vseg in self.globs: s += vseg.xml() |
---|
566 | s += ' </globalset>\n' |
---|
567 | s += '\n' |
---|
568 | |
---|
569 | s += ' <vspaceset>\n' |
---|
570 | for vspace in self.vspaces: s += vspace.xml() |
---|
571 | s += ' </vspaceset>\n' |
---|
572 | |
---|
573 | s += '</mapping_info>\n' |
---|
574 | return s |
---|
575 | |
---|
576 | ##################################################################################### |
---|
577 | def cbin( self, verbose ): # C binary structure for map.bin file generation |
---|
578 | |
---|
579 | byte_stream = bytearray() |
---|
580 | |
---|
581 | # header |
---|
582 | byte_stream += self.int2bytes(4, self.signature) |
---|
583 | byte_stream += self.int2bytes(4, self.x_size) |
---|
584 | byte_stream += self.int2bytes(4, self.y_size) |
---|
585 | byte_stream += self.int2bytes(4, self.x_width) |
---|
586 | byte_stream += self.int2bytes(4, self.y_width) |
---|
587 | byte_stream += self.int2bytes(4, self.x_io) |
---|
588 | byte_stream += self.int2bytes(4, self.y_io) |
---|
589 | byte_stream += self.int2bytes(4, self.irq_per_proc) |
---|
590 | byte_stream += self.int2bytes(4, self.use_ramdisk) |
---|
591 | byte_stream += self.int2bytes(4, self.total_globals) |
---|
592 | byte_stream += self.int2bytes(4, self.total_vspaces) |
---|
593 | byte_stream += self.int2bytes(4, self.total_psegs) |
---|
594 | byte_stream += self.int2bytes(4, self.total_vsegs) |
---|
595 | byte_stream += self.int2bytes(4, self.total_vobjs) |
---|
596 | byte_stream += self.int2bytes(4, self.total_tasks) |
---|
597 | byte_stream += self.int2bytes(4, self.total_procs) |
---|
598 | byte_stream += self.int2bytes(4, self.total_irqs) |
---|
599 | byte_stream += self.int2bytes(4, self.total_coprocs) |
---|
600 | byte_stream += self.int2bytes(4, self.total_cpports) |
---|
601 | byte_stream += self.int2bytes(4, self.total_periphs) |
---|
602 | byte_stream += self.str2bytes(32, self.name) |
---|
603 | |
---|
604 | if ( verbose ): |
---|
605 | print '\n' |
---|
606 | print 'name = %s' % self.name |
---|
607 | print 'signature = %x' % self.signature |
---|
608 | print 'x_size = %d' % self.x_size |
---|
609 | print 'y_size = %d' % self.y_size |
---|
610 | print 'x_width = %d' % self.x_width |
---|
611 | print 'y_width = %d' % self.y_width |
---|
612 | print 'x_io = %d' % self.x_io |
---|
613 | print 'y_io = %d' % self.y_io |
---|
614 | print 'irq_per_proc = %d' % self.irq_per_proc |
---|
615 | print 'use_ramdisk = %d' % self.use_ramdisk |
---|
616 | print 'total_globals = %d' % self.total_globals |
---|
617 | print 'total_psegs = %d' % self.total_psegs |
---|
618 | print 'total_vsegs = %d' % self.total_vsegs |
---|
619 | print 'total_vobjs = %d' % self.total_vobjs |
---|
620 | print 'total_tasks = %d' % self.total_tasks |
---|
621 | print 'total_procs = %d' % self.total_procs |
---|
622 | print 'total_irqs = %d' % self.total_irqs |
---|
623 | print 'total_coprocs = %d' % self.total_coprocs |
---|
624 | print 'total_cpports = %d' % self.total_cpports |
---|
625 | print 'total_periphs = %d' % self.total_periphs |
---|
626 | print '\n' |
---|
627 | |
---|
628 | # clusters array |
---|
629 | index = 0 |
---|
630 | for cluster in self.clusters: |
---|
631 | byte_stream += cluster.cbin( self, verbose, index ) |
---|
632 | index += 1 |
---|
633 | |
---|
634 | if ( verbose ): print '\n' |
---|
635 | |
---|
636 | # psegs array |
---|
637 | index = 0 |
---|
638 | for cluster in self.clusters: |
---|
639 | for pseg in cluster.psegs: |
---|
640 | byte_stream += pseg.cbin( self, verbose, index, cluster ) |
---|
641 | index += 1 |
---|
642 | |
---|
643 | if ( verbose ): print '\n' |
---|
644 | |
---|
645 | # vspaces array |
---|
646 | index = 0 |
---|
647 | for vspace in self.vspaces: |
---|
648 | byte_stream += vspace.cbin( self, verbose, index ) |
---|
649 | index += 1 |
---|
650 | |
---|
651 | if ( verbose ): print '\n' |
---|
652 | |
---|
653 | # vsegs array |
---|
654 | index = 0 |
---|
655 | for vseg in self.globs: |
---|
656 | byte_stream += vseg.cbin( self, verbose, index ) |
---|
657 | index += 1 |
---|
658 | for vspace in self.vspaces: |
---|
659 | for vseg in vspace.vsegs: |
---|
660 | byte_stream += vseg.cbin( self, verbose, index ) |
---|
661 | index += 1 |
---|
662 | |
---|
663 | if ( verbose ): print '\n' |
---|
664 | |
---|
665 | # vobjs array |
---|
666 | index = 0 |
---|
667 | for vseg in self.globs: |
---|
668 | for vobj in vseg.vobjs: |
---|
669 | byte_stream += vobj.cbin( self, verbose, index ) |
---|
670 | index += 1 |
---|
671 | for vspace in self.vspaces: |
---|
672 | for vseg in vspace.vsegs: |
---|
673 | for vobj in vseg.vobjs: |
---|
674 | byte_stream += vobj.cbin( self, verbose, index ) |
---|
675 | index += 1 |
---|
676 | |
---|
677 | if ( verbose ): print '\n' |
---|
678 | |
---|
679 | # tasks array |
---|
680 | index = 0 |
---|
681 | for vspace in self.vspaces: |
---|
682 | for task in vspace.tasks: |
---|
683 | byte_stream += task.cbin( self, verbose, index, vspace ) |
---|
684 | index += 1 |
---|
685 | |
---|
686 | if ( verbose ): print '\n' |
---|
687 | |
---|
688 | # procs array |
---|
689 | index = 0 |
---|
690 | for cluster in self.clusters: |
---|
691 | for proc in cluster.procs: |
---|
692 | byte_stream += proc.cbin( self, verbose, index ) |
---|
693 | index += 1 |
---|
694 | |
---|
695 | if ( verbose ): print '\n' |
---|
696 | |
---|
697 | # irqs array |
---|
698 | index = 0 |
---|
699 | for cluster in self.clusters: |
---|
700 | for periph in cluster.periphs: |
---|
701 | for irq in periph.irqs: |
---|
702 | byte_stream += irq.cbin( self, verbose, index ) |
---|
703 | index += 1 |
---|
704 | |
---|
705 | if ( verbose ): print '\n' |
---|
706 | |
---|
707 | # coprocs array |
---|
708 | index = 0 |
---|
709 | for cluster in self.clusters: |
---|
710 | for coproc in cluster.coprocs: |
---|
711 | byte_stream += coproc.cbin( self, verbose, index ) |
---|
712 | index += 1 |
---|
713 | |
---|
714 | if ( verbose ): print '\n' |
---|
715 | |
---|
716 | # cpports array |
---|
717 | index = 0 |
---|
718 | for cluster in self.clusters: |
---|
719 | for coproc in cluster.coprocs: |
---|
720 | for port in coproc.ports: |
---|
721 | byte_stream += port.cbin( self, verbose, index ) |
---|
722 | index += 1 |
---|
723 | |
---|
724 | if ( verbose ): print '\n' |
---|
725 | |
---|
726 | # periphs array |
---|
727 | index = 0 |
---|
728 | for cluster in self.clusters: |
---|
729 | for periph in cluster.periphs: |
---|
730 | byte_stream += periph.cbin( self, verbose, index ) |
---|
731 | index += 1 |
---|
732 | |
---|
733 | return byte_stream |
---|
734 | # end of cbin() |
---|
735 | |
---|
736 | ################################################################################## |
---|
737 | def giet_vsegs( self ): # compute string for giet_vsegs.ld file generation |
---|
738 | # required by giet_vm compilation |
---|
739 | |
---|
740 | # search the vsegs required for the giet_vsegs.ld |
---|
741 | boot_code_found = False |
---|
742 | boot_data_found = False |
---|
743 | kernel_uncdata_found = False |
---|
744 | kernel_data_found = False |
---|
745 | kernel_code_found = False |
---|
746 | kernel_init_found = False |
---|
747 | for vseg in self.globs: |
---|
748 | |
---|
749 | if ( vseg.name == 'seg_boot_code' ): |
---|
750 | boot_code_vbase = vseg.vbase |
---|
751 | boot_code_size = vseg.vobjs[0].length |
---|
752 | boot_code_found = True |
---|
753 | |
---|
754 | if ( vseg.name == 'seg_boot_data' ): |
---|
755 | boot_data_vbase = vseg.vbase |
---|
756 | boot_data_size = vseg.vobjs[0].length |
---|
757 | boot_data_found = True |
---|
758 | |
---|
759 | if ( vseg.name == 'seg_kernel_uncdata' ): |
---|
760 | kernel_uncdata_vbase = vseg.vbase |
---|
761 | kernel_uncdata_size = vseg.vobjs[0].length |
---|
762 | kernel_uncdata_found = True |
---|
763 | |
---|
764 | if ( vseg.name == 'seg_kernel_data' ): |
---|
765 | kernel_data_vbase = vseg.vbase |
---|
766 | kernel_data_size = vseg.vobjs[0].length |
---|
767 | kernel_data_found = True |
---|
768 | |
---|
769 | if ( vseg.name == 'seg_kernel_code' ): |
---|
770 | kernel_code_vbase = vseg.vbase |
---|
771 | kernel_code_size = vseg.vobjs[0].length |
---|
772 | kernel_code_found = True |
---|
773 | |
---|
774 | if ( vseg.name == 'seg_kernel_init' ): |
---|
775 | kernel_init_vbase = vseg.vbase |
---|
776 | kernel_init_size = vseg.vobjs[0].length |
---|
777 | kernel_init_found = True |
---|
778 | |
---|
779 | # check if all required vsegs have been found |
---|
780 | if ( boot_code_found == False ): |
---|
781 | print '[genmap error] in giet_vsegs() : seg_boot_code vseg missing' |
---|
782 | sys.exit() |
---|
783 | |
---|
784 | if ( boot_data_found == False ): |
---|
785 | print '[genmap error] in giet_vsegs() : seg_boot_data vseg missing' |
---|
786 | sys.exit() |
---|
787 | |
---|
788 | if ( kernel_data_found == False ): |
---|
789 | print '[genmap error] in giet_vsegs() : seg_kernel_data vseg missing' |
---|
790 | sys.exit() |
---|
791 | |
---|
792 | if ( kernel_uncdata_found == False ): |
---|
793 | print '[genmap error] in giet_vsegs() : seg_kernel_uncdata vseg missing' |
---|
794 | sys.exit() |
---|
795 | |
---|
796 | if ( kernel_code_found == False ): |
---|
797 | print '[genmap error] in giet_vsegs() : seg_kernel_code vseg missing' |
---|
798 | sys.exit() |
---|
799 | |
---|
800 | if ( kernel_init_found == False ): |
---|
801 | print '[genmap error] in giet_vsegs() : seg_kernel_init vseg missing' |
---|
802 | sys.exit() |
---|
803 | |
---|
804 | # build string |
---|
805 | s = '/* Generated by genmap for %s */\n' % self.name |
---|
806 | s += '\n' |
---|
807 | |
---|
808 | s += 'boot_code_vbase = 0x%x;\n' % boot_code_vbase |
---|
809 | s += 'boot_code_size = 0x%x;\n' % boot_code_size |
---|
810 | s += '\n' |
---|
811 | s += 'boot_data_vbase = 0x%x;\n' % boot_data_vbase |
---|
812 | s += 'boot_data_size = 0x%x;\n' % boot_data_size |
---|
813 | s += '\n' |
---|
814 | s += 'kernel_code_vbase = 0x%x;\n' % kernel_code_vbase |
---|
815 | s += 'kernel_code_size = 0x%x;\n' % kernel_code_size |
---|
816 | s += '\n' |
---|
817 | s += 'kernel_data_vbase = 0x%x;\n' % kernel_data_vbase |
---|
818 | s += 'kernel_data_size = 0x%x;\n' % kernel_data_size |
---|
819 | s += '\n' |
---|
820 | s += 'kernel_uncdata_vbase = 0x%x;\n' % kernel_uncdata_vbase |
---|
821 | s += 'kernel_uncdata_size = 0x%x;\n' % kernel_uncdata_size |
---|
822 | s += '\n' |
---|
823 | s += 'kernel_init_vbase = 0x%x;\n' % kernel_init_vbase |
---|
824 | s += 'kernel_init_size = 0x%x;\n' % kernel_init_size |
---|
825 | s += '\n' |
---|
826 | |
---|
827 | return s |
---|
828 | |
---|
829 | ################################################################################### |
---|
830 | def hard_config( self ): # compute string for hard_config.h file generation, |
---|
831 | # required by |
---|
832 | # - top.cpp compilation |
---|
833 | # - giet_vm compilation |
---|
834 | # - tsar_preloader compilation |
---|
835 | |
---|
836 | nb_total_procs = 0 |
---|
837 | |
---|
838 | # for each peripheral type, define default values |
---|
839 | # for pbase address, size, number of components, and channels |
---|
840 | nb_cma = 0 |
---|
841 | cma_channels = 0 |
---|
842 | seg_cma_base = 0xFFFFFFFF |
---|
843 | seg_cma_size = 0 |
---|
844 | |
---|
845 | nb_dma = 0 |
---|
846 | dma_channels = 0 |
---|
847 | seg_dma_base = 0xFFFFFFFF |
---|
848 | seg_dma_size = 0 |
---|
849 | |
---|
850 | nb_fbf = 0 |
---|
851 | fbf_channels = 0 |
---|
852 | fbf_arg = 0 |
---|
853 | seg_fbf_base = 0xFFFFFFFF |
---|
854 | seg_fbf_size = 0 |
---|
855 | |
---|
856 | nb_icu = 0 |
---|
857 | icu_channels = 0 |
---|
858 | seg_icu_base = 0xFFFFFFFF |
---|
859 | seg_icu_size = 0 |
---|
860 | |
---|
861 | nb_iob = 0 |
---|
862 | iob_channels = 0 |
---|
863 | seg_iob_base = 0xFFFFFFFF |
---|
864 | seg_iob_size = 0 |
---|
865 | |
---|
866 | nb_ioc = 0 |
---|
867 | ioc_channels = 0 |
---|
868 | seg_ioc_base = 0xFFFFFFFF |
---|
869 | seg_ioc_size = 0 |
---|
870 | |
---|
871 | nb_mmc = 0 |
---|
872 | mmc_channels = 0 |
---|
873 | seg_mmc_base = 0xFFFFFFFF |
---|
874 | seg_mmc_size = 0 |
---|
875 | |
---|
876 | nb_mwr = 0 |
---|
877 | mwr_channels = 0 |
---|
878 | seg_mwr_base = 0xFFFFFFFF |
---|
879 | seg_mwr_size = 0 |
---|
880 | |
---|
881 | nb_nic = 0 |
---|
882 | nic_channels = 0 |
---|
883 | seg_nic_base = 0xFFFFFFFF |
---|
884 | seg_nic_size = 0 |
---|
885 | |
---|
886 | nb_pic = 0 |
---|
887 | pic_channels = 0 |
---|
888 | seg_pic_base = 0xFFFFFFFF |
---|
889 | seg_pic_size = 0 |
---|
890 | |
---|
891 | nb_rom = 0 |
---|
892 | rom_channels = 0 |
---|
893 | seg_rom_base = 0xFFFFFFFF |
---|
894 | seg_rom_size = 0 |
---|
895 | |
---|
896 | nb_sim = 0 |
---|
897 | sim_channels = 0 |
---|
898 | seg_sim_base = 0xFFFFFFFF |
---|
899 | seg_sim_size = 0 |
---|
900 | |
---|
901 | nb_tim = 0 |
---|
902 | tim_channels = 0 |
---|
903 | seg_tim_base = 0xFFFFFFFF |
---|
904 | seg_tim_size = 0 |
---|
905 | |
---|
906 | nb_tty = 0 |
---|
907 | tty_channels = 0 |
---|
908 | seg_tty_base = 0xFFFFFFFF |
---|
909 | seg_tty_size = 0 |
---|
910 | |
---|
911 | nb_xcu = 0 |
---|
912 | xcu_channels = 0 |
---|
913 | xcu_arg = 0 |
---|
914 | seg_xcu_base = 0xFFFFFFFF |
---|
915 | seg_xcu_size = 0 |
---|
916 | |
---|
917 | use_bdv = False |
---|
918 | use_spi = False |
---|
919 | use_hba = False |
---|
920 | |
---|
921 | # get peripherals attributes |
---|
922 | for cluster in self.clusters: |
---|
923 | for periph in cluster.periphs: |
---|
924 | if ( periph.ptype == 'CMA' ): |
---|
925 | seg_cma_base = periph.pseg.base & 0xFFFFFFFF |
---|
926 | seg_cma_size = periph.pseg.size |
---|
927 | cma_channels = periph.channels |
---|
928 | nb_cma +=1 |
---|
929 | |
---|
930 | elif ( periph.ptype == 'DMA' ): |
---|
931 | seg_dma_base = periph.pseg.base & 0xFFFFFFFF |
---|
932 | seg_dma_size = periph.pseg.size |
---|
933 | dma_channels = periph.channels |
---|
934 | nb_dma +=1 |
---|
935 | |
---|
936 | elif ( periph.ptype == 'FBF' ): |
---|
937 | seg_fbf_base = periph.pseg.base & 0xFFFFFFFF |
---|
938 | seg_fbf_size = periph.pseg.size |
---|
939 | fbf_channels = periph.channels |
---|
940 | fbf_arg = periph.arg |
---|
941 | nb_fbf +=1 |
---|
942 | |
---|
943 | elif ( periph.ptype == 'ICU' ): |
---|
944 | seg_icu_base = periph.pseg.base & 0xFFFFFFFF |
---|
945 | seg_icu_size = periph.pseg.size |
---|
946 | icu_channels = periph.channels |
---|
947 | nb_icu +=1 |
---|
948 | |
---|
949 | elif ( periph.ptype == 'IOB' ): |
---|
950 | seg_iob_base = periph.pseg.base & 0xFFFFFFFF |
---|
951 | seg_iob_size = periph.pseg.size |
---|
952 | iob_channels = periph.channels |
---|
953 | nb_iob +=1 |
---|
954 | |
---|
955 | elif ( periph.ptype == 'IOC' ): |
---|
956 | seg_ioc_base = periph.pseg.base & 0xFFFFFFFF |
---|
957 | seg_ioc_size = periph.pseg.size |
---|
958 | ioc_channels = periph.channels |
---|
959 | nb_ioc += 1 |
---|
960 | |
---|
961 | if self.use_ramdisk: continue |
---|
962 | |
---|
963 | if ( periph.subtype == 'BDV' ): use_bdv = True |
---|
964 | elif ( periph.subtype == 'HBA' ): use_hba = True |
---|
965 | elif ( periph.subtype == 'SPI' ): use_spi = True |
---|
966 | |
---|
967 | elif ( periph.ptype == 'MMC' ): |
---|
968 | seg_mmc_base = periph.pseg.base & 0xFFFFFFFF |
---|
969 | seg_mmc_size = periph.pseg.size |
---|
970 | mmc_channels = periph.channels |
---|
971 | nb_mmc +=1 |
---|
972 | |
---|
973 | elif ( periph.ptype == 'MWR' ): |
---|
974 | seg_mwr_base = periph.pseg.base & 0xFFFFFFFF |
---|
975 | seg_wmr_size = periph.pseg.size |
---|
976 | mwr_channels = periph.channels |
---|
977 | nb_mwr +=1 |
---|
978 | |
---|
979 | elif ( periph.ptype == 'ROM' ): |
---|
980 | seg_rom_base = periph.pseg.base & 0xFFFFFFFF |
---|
981 | seg_rom_size = periph.pseg.size |
---|
982 | rom_channels = periph.channels |
---|
983 | nb_rom +=1 |
---|
984 | |
---|
985 | elif ( periph.ptype == 'SIM' ): |
---|
986 | seg_sim_base = periph.pseg.base & 0xFFFFFFFF |
---|
987 | seg_sim_size = periph.pseg.size |
---|
988 | sim_channels = periph.channels |
---|
989 | nb_sim +=1 |
---|
990 | |
---|
991 | elif ( periph.ptype == 'NIC' ): |
---|
992 | seg_nic_base = periph.pseg.base & 0xFFFFFFFF |
---|
993 | seg_nic_size = periph.pseg.size |
---|
994 | nic_channels = periph.channels |
---|
995 | nb_nic +=1 |
---|
996 | |
---|
997 | elif ( periph.ptype == 'PIC' ): |
---|
998 | seg_pic_base = periph.pseg.base & 0xFFFFFFFF |
---|
999 | seg_pic_size = periph.pseg.size |
---|
1000 | pic_channels = periph.channels |
---|
1001 | nb_pic +=1 |
---|
1002 | |
---|
1003 | elif ( periph.ptype == 'TIM' ): |
---|
1004 | seg_tim_base = periph.pseg.base & 0xFFFFFFFF |
---|
1005 | seg_tim_size = periph.pseg.size |
---|
1006 | tim_channels = periph.channels |
---|
1007 | nb_tim +=1 |
---|
1008 | |
---|
1009 | elif ( periph.ptype == 'TTY' ): |
---|
1010 | seg_tty_base = periph.pseg.base & 0xFFFFFFFF |
---|
1011 | seg_tty_size = periph.pseg.size |
---|
1012 | tty_channels = periph.channels |
---|
1013 | nb_tty +=1 |
---|
1014 | |
---|
1015 | elif ( periph.ptype == 'XCU' ): |
---|
1016 | seg_xcu_base = periph.pseg.base & 0xFFFFFFFF |
---|
1017 | seg_xcu_size = periph.pseg.size |
---|
1018 | xcu_channels = periph.channels |
---|
1019 | xcu_arg = periph.arg |
---|
1020 | nb_xcu +=1 |
---|
1021 | |
---|
1022 | # don't mix ICU and XCU |
---|
1023 | assert ( nb_icu*nb_xcu == 0 ) |
---|
1024 | |
---|
1025 | # no more than two access to external peripherals |
---|
1026 | assert ( nb_fbf <= 2 ) |
---|
1027 | assert ( nb_cma <= 2 ) |
---|
1028 | assert ( nb_ioc <= 2 ) |
---|
1029 | assert ( nb_nic <= 2 ) |
---|
1030 | assert ( nb_tim <= 2 ) |
---|
1031 | assert ( nb_tty <= 2 ) |
---|
1032 | assert ( nb_pic <= 2 ) |
---|
1033 | |
---|
1034 | # one and only one type of IOC controller |
---|
1035 | nb_iocs = 0 |
---|
1036 | if use_hba : nb_iocs += 1 |
---|
1037 | if use_bdv : nb_iocs += 1 |
---|
1038 | if use_spi : nb_iocs += 1 |
---|
1039 | if self.use_ramdisk: nb_iocs += 1 |
---|
1040 | assert ( nb_iocs == 1 ) |
---|
1041 | |
---|
1042 | # Compute total number of processors |
---|
1043 | for cluster in self.clusters: |
---|
1044 | nb_total_procs += len( cluster.procs ) |
---|
1045 | |
---|
1046 | # Compute physical addresses for BOOT vsegs |
---|
1047 | boot_mapping_found = False |
---|
1048 | boot_code_found = False |
---|
1049 | boot_data_found = False |
---|
1050 | boot_stack_found = False |
---|
1051 | |
---|
1052 | for vseg in self.globs: |
---|
1053 | if ( vseg.name == 'seg_boot_mapping' ): |
---|
1054 | boot_mapping_base = vseg.vbase |
---|
1055 | boot_mapping_size = vseg.vobjs[0].length |
---|
1056 | boot_mapping_identity = vseg.identity |
---|
1057 | boot_mapping_found = True |
---|
1058 | |
---|
1059 | if ( vseg.name == 'seg_boot_code' ): |
---|
1060 | boot_code_base = vseg.vbase |
---|
1061 | boot_code_size = vseg.vobjs[0].length |
---|
1062 | boot_code_identity = vseg.identity |
---|
1063 | boot_code_found = True |
---|
1064 | |
---|
1065 | if ( vseg.name == 'seg_boot_data' ): |
---|
1066 | boot_data_base = vseg.vbase |
---|
1067 | boot_data_size = vseg.vobjs[0].length |
---|
1068 | boot_data_identity = vseg.identity |
---|
1069 | boot_data_found = True |
---|
1070 | |
---|
1071 | if ( vseg.name == 'seg_boot_stack' ): |
---|
1072 | boot_stack_base = vseg.vbase |
---|
1073 | boot_stack_size = vseg.vobjs[0].length |
---|
1074 | boot_stack_identity = vseg.identity |
---|
1075 | boot_stack_found = True |
---|
1076 | |
---|
1077 | # check that BOOT vsegs are found and identity mapping |
---|
1078 | if ( (boot_mapping_found == False) or (boot_mapping_identity == False) ): |
---|
1079 | print '[genmap error] in hard_config() : seg_boot_mapping missing or not ident' |
---|
1080 | sys.exit() |
---|
1081 | |
---|
1082 | if ( (boot_code_found == False) or (boot_code_identity == False) ): |
---|
1083 | print '[genmap error] in hard_config() : seg_boot_code missing or not ident' |
---|
1084 | sys.exit() |
---|
1085 | |
---|
1086 | if ( (boot_data_found == False) or (boot_data_identity == False) ): |
---|
1087 | print '[genmap error] in hard_config() : seg_boot_data missing or not ident' |
---|
1088 | sys.exit() |
---|
1089 | |
---|
1090 | if ( (boot_stack_found == False) or (boot_stack_identity == False) ): |
---|
1091 | print '[genmap error] in giet_vsegs() : seg_boot_stack missing or not ident' |
---|
1092 | sys.exit() |
---|
1093 | |
---|
1094 | # Search RAMDISK global vseg if required |
---|
1095 | seg_rdk_base = 0xFFFFFFFF |
---|
1096 | seg_rdk_size = 0 |
---|
1097 | seg_rdk_found = False |
---|
1098 | |
---|
1099 | if self.use_ramdisk: |
---|
1100 | for vseg in self.globs: |
---|
1101 | if ( vseg.name == 'seg_rdk' ): |
---|
1102 | seg_rdk_base = vseg.vbase |
---|
1103 | seg_rdk_size = vseg.vobjs[0].length |
---|
1104 | seg_rdk_found = True |
---|
1105 | |
---|
1106 | if ( seg_rdk_found == False ): |
---|
1107 | print 'Error in hard_config() "seg_ramdisk" not found' |
---|
1108 | sys.exit(1) |
---|
1109 | |
---|
1110 | # build string |
---|
1111 | s = '/* Generated by genmap for %s */\n' % self.name |
---|
1112 | s += '\n' |
---|
1113 | s += '#ifndef HARD_CONFIG_H\n' |
---|
1114 | s += '#define HARD_CONFIG_H\n' |
---|
1115 | s += '\n' |
---|
1116 | |
---|
1117 | s += '/* General platform parameters */\n' |
---|
1118 | s += '\n' |
---|
1119 | s += '#define X_SIZE %d\n' % self.x_size |
---|
1120 | s += '#define Y_SIZE %d\n' % self.y_size |
---|
1121 | s += '#define X_WIDTH %d\n' % self.x_width |
---|
1122 | s += '#define Y_WIDTH %d\n' % self.y_width |
---|
1123 | s += '#define P_WIDTH %d\n' % self.p_width |
---|
1124 | s += '#define X_IO %d\n' % self.x_io |
---|
1125 | s += '#define Y_IO %d\n' % self.y_io |
---|
1126 | s += '#define NB_PROCS_MAX %d\n' % self.nprocs |
---|
1127 | s += '#define IRQ_PER_PROCESSOR %d\n' % self.irq_per_proc |
---|
1128 | s += '#define RESET_ADDRESS 0x%x\n' % self.reset_address |
---|
1129 | s += '#define NB_TOTAL_PROCS %d\n' % nb_total_procs |
---|
1130 | s += '\n' |
---|
1131 | |
---|
1132 | s += '/* Peripherals */\n' |
---|
1133 | s += '\n' |
---|
1134 | s += '#define NB_TTY_CHANNELS %d\n' % tty_channels |
---|
1135 | s += '#define NB_IOC_CHANNELS %d\n' % ioc_channels |
---|
1136 | s += '#define NB_NIC_CHANNELS %d\n' % nic_channels |
---|
1137 | s += '#define NB_CMA_CHANNELS %d\n' % cma_channels |
---|
1138 | s += '#define NB_TIM_CHANNELS %d\n' % tim_channels |
---|
1139 | s += '#define NB_DMA_CHANNELS %d\n' % dma_channels |
---|
1140 | s += '\n' |
---|
1141 | s += '#define USE_XCU %d\n' % ( nb_xcu != 0 ) |
---|
1142 | s += '#define USE_IOB %d\n' % ( nb_iob != 0 ) |
---|
1143 | s += '#define USE_PIC %d\n' % ( nb_pic != 0 ) |
---|
1144 | s += '#define USE_FBF %d\n' % ( nb_fbf != 0 ) |
---|
1145 | s += '\n' |
---|
1146 | s += '#define USE_IOC_BDV %d\n' % use_bdv |
---|
1147 | s += '#define USE_IOC_SPI %d\n' % use_spi |
---|
1148 | s += '#define USE_IOC_HBA %d\n' % use_hba |
---|
1149 | s += '#define USE_IOC_RDK %d\n' % self.use_ramdisk |
---|
1150 | s += '\n' |
---|
1151 | s += '#define FBUF_X_SIZE %d\n' % fbf_arg |
---|
1152 | s += '#define FBUF_Y_SIZE %d\n' % fbf_arg |
---|
1153 | s += '\n' |
---|
1154 | s += '#define XCU_NB_INPUTS %d\n' % xcu_arg |
---|
1155 | s += '\n' |
---|
1156 | |
---|
1157 | s += '/* base addresses and sizes for physical segments */\n' |
---|
1158 | s += '\n' |
---|
1159 | s += '#define SEG_RAM_BASE 0x%x\n' % self.ram_base |
---|
1160 | s += '#define SEG_RAM_SIZE 0x%x\n' % self.ram_size |
---|
1161 | s += '\n' |
---|
1162 | s += '#define SEG_CMA_BASE 0x%x\n' % seg_cma_base |
---|
1163 | s += '#define SEG_CMA_SIZE 0x%x\n' % seg_cma_size |
---|
1164 | s += '\n' |
---|
1165 | s += '#define SEG_DMA_BASE 0x%x\n' % seg_dma_base |
---|
1166 | s += '#define SEG_DMA_SIZE 0x%x\n' % seg_dma_size |
---|
1167 | s += '\n' |
---|
1168 | s += '#define SEG_FBF_BASE 0x%x\n' % seg_fbf_base |
---|
1169 | s += '#define SEG_FBF_SIZE 0x%x\n' % seg_fbf_size |
---|
1170 | s += '\n' |
---|
1171 | s += '#define SEG_ICU_BASE 0x%x\n' % seg_icu_base |
---|
1172 | s += '#define SEG_ICU_SIZE 0x%x\n' % seg_icu_size |
---|
1173 | s += '\n' |
---|
1174 | s += '#define SEG_IOB_BASE 0x%x\n' % seg_iob_base |
---|
1175 | s += '#define SEG_IOB_SIZE 0x%x\n' % seg_iob_size |
---|
1176 | s += '\n' |
---|
1177 | s += '#define SEG_IOC_BASE 0x%x\n' % seg_ioc_base |
---|
1178 | s += '#define SEG_IOC_SIZE 0x%x\n' % seg_ioc_size |
---|
1179 | s += '\n' |
---|
1180 | s += '#define SEG_MMC_BASE 0x%x\n' % seg_mmc_base |
---|
1181 | s += '#define SEG_MMC_SIZE 0x%x\n' % seg_mmc_size |
---|
1182 | s += '\n' |
---|
1183 | s += '#define SEG_MWR_BASE 0x%x\n' % seg_mwr_base |
---|
1184 | s += '#define SEG_MWR_SIZE 0x%x\n' % seg_mwr_size |
---|
1185 | s += '\n' |
---|
1186 | s += '#define SEG_ROM_BASE 0x%x\n' % seg_rom_base |
---|
1187 | s += '#define SEG_ROM_SIZE 0x%x\n' % seg_rom_size |
---|
1188 | s += '\n' |
---|
1189 | s += '#define SEG_SIM_BASE 0x%x\n' % seg_sim_base |
---|
1190 | s += '#define SEG_SIM_SIZE 0x%x\n' % seg_sim_size |
---|
1191 | s += '\n' |
---|
1192 | s += '#define SEG_NIC_BASE 0x%x\n' % seg_nic_base |
---|
1193 | s += '#define SEG_NIC_SIZE 0x%x\n' % seg_nic_size |
---|
1194 | s += '\n' |
---|
1195 | s += '#define SEG_PIC_BASE 0x%x\n' % seg_pic_base |
---|
1196 | s += '#define SEG_PIC_SIZE 0x%x\n' % seg_pic_size |
---|
1197 | s += '\n' |
---|
1198 | s += '#define SEG_TIM_BASE 0x%x\n' % seg_tim_base |
---|
1199 | s += '#define SEG_TIM_SIZE 0x%x\n' % seg_tim_size |
---|
1200 | s += '\n' |
---|
1201 | s += '#define SEG_TTY_BASE 0x%x\n' % seg_tty_base |
---|
1202 | s += '#define SEG_TTY_SIZE 0x%x\n' % seg_tty_size |
---|
1203 | s += '\n' |
---|
1204 | s += '#define SEG_XCU_BASE 0x%x\n' % seg_xcu_base |
---|
1205 | s += '#define SEG_XCU_SIZE 0x%x\n' % seg_xcu_size |
---|
1206 | s += '\n' |
---|
1207 | s += '#define SEG_RDK_BASE 0x%x\n' % seg_rdk_base |
---|
1208 | s += '#define SEG_RDK_SIZE 0x%x\n' % seg_rdk_size |
---|
1209 | s += '\n' |
---|
1210 | s += '#define PERI_CLUSTER_INCREMENT 0x%x\n' % self.peri_increment |
---|
1211 | s += '\n' |
---|
1212 | |
---|
1213 | s += '/* physical base addresses for identity mapped vsegs */\n' |
---|
1214 | s += '/* used by the GietVM OS */\n' |
---|
1215 | s += '\n' |
---|
1216 | s += '#define SEG_BOOT_MAPPING_BASE 0x%x\n' % boot_mapping_base |
---|
1217 | s += '#define SEG_BOOT_MAPPING_SIZE 0x%x\n' % boot_mapping_size |
---|
1218 | s += '\n' |
---|
1219 | s += '#define SEG_BOOT_CODE_BASE 0x%x\n' % boot_code_base |
---|
1220 | s += '#define SEG_BOOT_CODE_SIZE 0x%x\n' % boot_code_size |
---|
1221 | s += '\n' |
---|
1222 | s += '#define SEG_BOOT_DATA_BASE 0x%x\n' % boot_data_base |
---|
1223 | s += '#define SEG_BOOT_DATA_SIZE 0x%x\n' % boot_data_size |
---|
1224 | s += '\n' |
---|
1225 | s += '#define SEG_BOOT_STACK_BASE 0x%x\n' % boot_stack_base |
---|
1226 | s += '#define SEG_BOOT_STACK_SIZE 0x%x\n' % boot_stack_size |
---|
1227 | s += '#endif\n' |
---|
1228 | |
---|
1229 | return s |
---|
1230 | |
---|
1231 | # end of hard_config() |
---|
1232 | |
---|
1233 | ################################################################################ |
---|
1234 | def linux_dts( self ): # compute string for linux.dts file generation |
---|
1235 | # used for linux configuration |
---|
1236 | # header |
---|
1237 | s = '/dts-v1/;\n' |
---|
1238 | s += '\n' |
---|
1239 | s += '/{\n' |
---|
1240 | s += ' compatible = "tsar, %s";\n' % self.name |
---|
1241 | s += ' #address-cells = <2>;\n' # physical address on 64 bits |
---|
1242 | s += ' #size-cells = <1>;\n' # segment size on 32 bits |
---|
1243 | s += ' model = "%s";\n' % self.name |
---|
1244 | s += '\n' |
---|
1245 | |
---|
1246 | # linux globals arguments |
---|
1247 | s += ' chosen {\n' |
---|
1248 | s += ' linux,stdout-path = &tty;\n' |
---|
1249 | s += ' bootargs = "console=tty0 console=ttyVTTY0 earlyprintk";\n' |
---|
1250 | s += ' };\n\n' |
---|
1251 | |
---|
1252 | # cpus (for each cluster) |
---|
1253 | s += ' cpus {\n' |
---|
1254 | s += ' #address-cells = <1>;\n' |
---|
1255 | s += ' #size-cells = <0>;\n' |
---|
1256 | |
---|
1257 | for cluster in self.clusters: |
---|
1258 | for proc in cluster.procs: |
---|
1259 | x = cluster.x |
---|
1260 | y = cluster.y |
---|
1261 | l = proc.lpid |
---|
1262 | proc_id = (((x << self.y_width) + y) * self.nprocs) + l |
---|
1263 | s += ' cpu@%d_%d_%d {\n' %(x,y,l) |
---|
1264 | s += ' device_type = "cpu";\n' |
---|
1265 | s += ' compatible = "soclib,mips32el";\n' |
---|
1266 | s += ' reg = <0x%x>;\n' % proc_id |
---|
1267 | s += ' };\n' |
---|
1268 | s += '\n' |
---|
1269 | |
---|
1270 | s += ' };\n\n' |
---|
1271 | |
---|
1272 | # devices (ram or peripheral) are grouped per cluster |
---|
1273 | # the "compatible" attribute links a peripheral device |
---|
1274 | # to one or several drivers identified by ("major","minor") |
---|
1275 | |
---|
1276 | for cluster in self.clusters: |
---|
1277 | x = cluster.x |
---|
1278 | y = cluster.y |
---|
1279 | found_xcu = False |
---|
1280 | found_pic = False |
---|
1281 | |
---|
1282 | s += ' /*** cluster[%d,%d] ***/\n\n' % (x,y) |
---|
1283 | |
---|
1284 | # scan all psegs to find RAM in current cluster |
---|
1285 | for pseg in cluster.psegs: |
---|
1286 | if ( pseg.segtype == 'RAM' ): |
---|
1287 | msb = pseg.base >> 32 |
---|
1288 | lsb = pseg.base & 0xFFFFFFFF |
---|
1289 | size = pseg.size |
---|
1290 | |
---|
1291 | s += ' ram@%d_%d: ram@%d_%d {\n' % (x,y,x,y) |
---|
1292 | s += ' device_type = "memory";\n' |
---|
1293 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1294 | s += ' };\n\n' |
---|
1295 | |
---|
1296 | # scan all periphs to find XCU or PIC in current cluster |
---|
1297 | for periph in cluster.periphs: |
---|
1298 | msb = periph.pseg.base >> 32 |
---|
1299 | lsb = periph.pseg.base & 0xFFFFFFFF |
---|
1300 | size = periph.pseg.size |
---|
1301 | |
---|
1302 | # search XCU (can be replicated) |
---|
1303 | if ( (periph.ptype == 'XCU') ): |
---|
1304 | found_xcu = True |
---|
1305 | xcu = periph |
---|
1306 | irq_ctrl_name = 'xcu@%d_%d' % (x,y) |
---|
1307 | |
---|
1308 | s += ' %s: %s {\n' % (irq_ctrl_name, irq_ctrl_name) |
---|
1309 | s += ' compatible = "soclib, vci_xicu", "soclib, vci_xicu_timer";\n' |
---|
1310 | s += ' interrupt-controller;\n' |
---|
1311 | s += ' #interrupt-cells = <1>;\n' |
---|
1312 | s += ' clocks = <&freq>;\n' # the XCU component contains a timer |
---|
1313 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1314 | s += ' };\n\n' |
---|
1315 | |
---|
1316 | # search PIC (non replicated) |
---|
1317 | if ( periph.ptype == 'PIC' ): |
---|
1318 | found_pic = True |
---|
1319 | pic = periph |
---|
1320 | irq_ctrl_name = 'pic' |
---|
1321 | |
---|
1322 | s += ' %s: %s {\n' % (irq_ctrl_name, irq_ctrl_name) |
---|
1323 | s += ' compatible = "soclib, vci_iopic";\n' |
---|
1324 | s += ' interrupt-controller;\n' |
---|
1325 | s += ' #interrupt-cells = <1>;\n' |
---|
1326 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1327 | s += ' };\n\n' |
---|
1328 | |
---|
1329 | # search ICU (non supported by Linux) |
---|
1330 | if ( periph.ptype == 'ICU' ): |
---|
1331 | print '[genmap warning] in linux_dts() : ICU peripheral not supported by LINUX' |
---|
1332 | |
---|
1333 | # we need one interrupt controler in any cluster containing peripherals |
---|
1334 | if ( (found_xcu == False) and (found_pic == False) and (len(cluster.periphs) > 0) ): |
---|
1335 | print '[genmap error] in linux_dts() : No XCU/PIC in cluster(%d,%d)' % (x,y) |
---|
1336 | sys.exit(1) |
---|
1337 | |
---|
1338 | if ( found_pic == True ): irq_ctrl = pic |
---|
1339 | else: irq_ctrl = xcu |
---|
1340 | |
---|
1341 | # scan all periphs to find TTY and IOC in current cluster |
---|
1342 | for periph in cluster.periphs: |
---|
1343 | msb = periph.pseg.base >> 32 |
---|
1344 | lsb = periph.pseg.base & 0xFFFFFFFF |
---|
1345 | size = periph.pseg.size |
---|
1346 | |
---|
1347 | # search TTY (non replicated) |
---|
1348 | if ( periph.ptype == 'TTY' ): |
---|
1349 | |
---|
1350 | # get HWI index to XCU or PIC (only TTY channel 0 is used by Linux) |
---|
1351 | hwi_id = 0xFFFFFFFF |
---|
1352 | for irq in irq_ctrl.irqs: |
---|
1353 | if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == 0) ): hwi_id = irq.srcid |
---|
1354 | if ( hwi_id == 0xFFFFFFFF ): |
---|
1355 | print '[genmap error] in linux.dts() IRQ_TTY_RX not found' |
---|
1356 | sys.exit(1) |
---|
1357 | |
---|
1358 | s += ' tty: tty {\n' |
---|
1359 | s += ' compatible = "soclib, vci_multi_tty";\n' |
---|
1360 | s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name) |
---|
1361 | s += ' interrupt = <%d>;\n' % hwi_id |
---|
1362 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1363 | s += ' };\n\n' |
---|
1364 | |
---|
1365 | # search IOC (non replicated) |
---|
1366 | elif ( periph.ptype == 'IOC' ): |
---|
1367 | |
---|
1368 | if ( periph.subtype == 'BDV' ): |
---|
1369 | |
---|
1370 | # get irq line index associated to bdv |
---|
1371 | hwi_id = 0xFFFFFFFF |
---|
1372 | for irq in irq_ctrl.irqs: |
---|
1373 | if ( irq.isrtype == 'ISR_BDV' ): hwi_id = irq.srcid |
---|
1374 | if ( hwi_id == 0xFFFFFFFF ): |
---|
1375 | print '[genmap error] in linux.dts() ISR_BDV not found' |
---|
1376 | sys.exit(1) |
---|
1377 | |
---|
1378 | s += ' bdv: bdv {\n' |
---|
1379 | s += ' compatible = "soclib:vci_blockdevice";\n' |
---|
1380 | s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name) |
---|
1381 | s += ' interrupt = <%d>;\n' % hwi_id |
---|
1382 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1383 | s += ' };\n\n' |
---|
1384 | |
---|
1385 | elif ( periph.subtype == 'HBA' ): |
---|
1386 | |
---|
1387 | print '[genmap error] in linux_dts() : HBA peripheral not supported by LINUX' |
---|
1388 | sys.exit(1) |
---|
1389 | |
---|
1390 | elif ( periph.subtype == 'SPI' ): |
---|
1391 | |
---|
1392 | print '[genmap error] in linux_dts() : SPI peripheral not supported by LINUX' |
---|
1393 | sys.exit(1) |
---|
1394 | |
---|
1395 | # other peripherals |
---|
1396 | else: |
---|
1397 | type = periph.ptype |
---|
1398 | print '[genmap warning] in linux_dts() : %s peripheral not supported by LINUX' % (type) |
---|
1399 | |
---|
1400 | # clocks |
---|
1401 | s += ' /*** clocks ***/\n\n' |
---|
1402 | s += ' clocks {\n' |
---|
1403 | s += ' freq@50MHZ: freq@50MHZ {\n' |
---|
1404 | s += ' #clock-cells = <0>;\n' |
---|
1405 | s += ' compatible = "fixed-clock";\n' |
---|
1406 | s += ' clock-frequency = <50000000>;\n' |
---|
1407 | s += ' };\n' |
---|
1408 | s += ' };\n\n' |
---|
1409 | s += ' cpuclk {\n' |
---|
1410 | s += ' compatible = "soclib, mips32_clksrc";\n' |
---|
1411 | s += ' clocks = <&freq@50MHZ>;\n' |
---|
1412 | s += ' };\n' |
---|
1413 | s += '};\n' |
---|
1414 | |
---|
1415 | return s |
---|
1416 | # end linux_dts() |
---|
1417 | |
---|
1418 | |
---|
1419 | ############################################################################# |
---|
1420 | def netbsd_dts( self ): # compute string for netbsd.dts file generation, |
---|
1421 | # used for netbsd configuration |
---|
1422 | # header |
---|
1423 | s = '/dts-v1/;\n' |
---|
1424 | s += '\n' |
---|
1425 | s += '/{\n' |
---|
1426 | s += ' #address-cells = <2>;\n' |
---|
1427 | s += ' #size-cells = <1>;\n' |
---|
1428 | |
---|
1429 | # cpus (for each cluster) |
---|
1430 | s += ' cpus {\n' |
---|
1431 | s += ' #address-cells = <1>;\n' |
---|
1432 | s += ' #size-cells = <0>;\n' |
---|
1433 | |
---|
1434 | for cluster in self.clusters: |
---|
1435 | for proc in cluster.procs: |
---|
1436 | proc_id = (((cluster.x << self.y_width) + cluster.y) << self.p_width) + proc.lpid |
---|
1437 | |
---|
1438 | s += ' Mips,32@0x%x {\n' % proc_id |
---|
1439 | s += ' device_type = "cpu";\n' |
---|
1440 | s += ' icudev_type = "cpu:mips";\n' |
---|
1441 | s += ' name = "Mips,32";\n' |
---|
1442 | s += ' reg = <0x%x>;\n' % proc_id |
---|
1443 | s += ' };\n' |
---|
1444 | s += '\n' |
---|
1445 | |
---|
1446 | s += ' };\n' |
---|
1447 | |
---|
1448 | # physical memory banks (for each cluster) |
---|
1449 | for cluster in self.clusters: |
---|
1450 | for pseg in cluster.psegs: |
---|
1451 | |
---|
1452 | if ( pseg.segtype == 'RAM' ): |
---|
1453 | msb = pseg.base >> 32 |
---|
1454 | lsb = pseg.base & 0xFFFFFFFF |
---|
1455 | size = pseg.size |
---|
1456 | |
---|
1457 | s += ' %s@0x%x {\n' % (pseg.name, pseg.base) |
---|
1458 | s += ' cached = <1>;\n' |
---|
1459 | s += ' device_type = "memory";\n' |
---|
1460 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1461 | s += ' };\n' |
---|
1462 | |
---|
1463 | # peripherals (for each cluster) |
---|
1464 | for cluster in self.clusters: |
---|
1465 | x = cluster.x |
---|
1466 | y = cluster.y |
---|
1467 | |
---|
1468 | # research XCU component |
---|
1469 | found_xcu = False |
---|
1470 | for periph in cluster.periphs: |
---|
1471 | if ( (periph.ptype == 'XCU') ): |
---|
1472 | found_xcu = True |
---|
1473 | xcu = periph |
---|
1474 | msb = periph.pseg.base >> 32 |
---|
1475 | lsb = periph.pseg.base & 0xFFFFFFFF |
---|
1476 | size = periph.pseg.size |
---|
1477 | |
---|
1478 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1479 | s += ' device_type = "soclib:xicu:root";\n' |
---|
1480 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1481 | s += ' input_lines = <%d>;\n' % periph.arg |
---|
1482 | s += ' ipis = <%d>;\n' % periph.arg |
---|
1483 | s += ' timers = <%d>;\n' % periph.arg |
---|
1484 | |
---|
1485 | output_id = 0 # output index from XCU |
---|
1486 | for lpid in xrange ( len(cluster.procs) ): # destination processor index |
---|
1487 | for itid in xrange ( self.irq_per_proc ): # input irq index on processor |
---|
1488 | cluster_xy = (cluster.x << self.y_width) + cluster.y |
---|
1489 | proc_id = (cluster_xy << self.p_width) + lpid |
---|
1490 | s += ' out@%d {\n' % output_id |
---|
1491 | s += ' device_type = "soclib:xicu:filter";\n' |
---|
1492 | s += ' irq = <&{/cpus/Mips,32@0x%x} %d>;\n' % (proc_id, itid) |
---|
1493 | s += ' output_line = <%d>;\n' % output_id |
---|
1494 | s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base) |
---|
1495 | s += ' };\n' |
---|
1496 | |
---|
1497 | output_id += 1 |
---|
1498 | |
---|
1499 | s += ' };\n' |
---|
1500 | |
---|
1501 | # research PIC component |
---|
1502 | found_pic = False |
---|
1503 | for periph in cluster.periphs: |
---|
1504 | if ( periph.ptype == 'PIC' ): |
---|
1505 | found_pic = True |
---|
1506 | pic = periph |
---|
1507 | msb = periph.pseg.base >> 32 |
---|
1508 | lsb = periph.pseg.base & 0xFFFFFFFF |
---|
1509 | size = periph.pseg.size |
---|
1510 | |
---|
1511 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1512 | s += ' device_type = "soclib:pic:root";\n' |
---|
1513 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1514 | s += ' input_lines = <%d>;\n' % periph.channels |
---|
1515 | s += ' };\n' |
---|
1516 | |
---|
1517 | # at least one interrupt controller |
---|
1518 | if ( (found_xcu == False) and (found_pic == False) and (len(cluster.periphs) > 0) ): |
---|
1519 | print '[genmap error] in netbsd_dts() : No XCU/PIC in cluster(%d,%d)' % (x,y) |
---|
1520 | sys.exit(1) |
---|
1521 | |
---|
1522 | if ( found_pic == True ): irq_tgt = pic |
---|
1523 | else: irq_tgt = xcu |
---|
1524 | |
---|
1525 | # get all others peripherals in cluster |
---|
1526 | for periph in cluster.periphs: |
---|
1527 | msb = periph.pseg.base >> 32 |
---|
1528 | lsb = periph.pseg.base & 0xFFFFFFFF |
---|
1529 | size = periph.pseg.size |
---|
1530 | |
---|
1531 | # research DMA component |
---|
1532 | if ( periph.ptype == 'DMA' ): |
---|
1533 | |
---|
1534 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1535 | s += ' device_type = "soclib:dma";\n' |
---|
1536 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1537 | s += ' channel_count = <%d>;\n' % periph.channels |
---|
1538 | |
---|
1539 | # multi-channels : get HWI index (to XCU) for each channel |
---|
1540 | for channel in xrange( periph.channels ): |
---|
1541 | hwi_id = 0xFFFFFFFF |
---|
1542 | for irq in xcu.irqs: |
---|
1543 | if ( (irq.isrtype == 'ISR_DMA') and (irq.channel == channel) ): |
---|
1544 | hwi_id = irq.srcid |
---|
1545 | if ( hwi_id == 0xFFFFFFFF ): |
---|
1546 | print '[genmap error] in netbsd.dts() ISR_DMA channel %d not found' % channel |
---|
1547 | sys.exit(1) |
---|
1548 | |
---|
1549 | name = '%s@0x%x' % (xcu.pseg.name, xcu.pseg.base) |
---|
1550 | s += ' irq@%d{\n' % channel |
---|
1551 | s += ' device_type = "soclib:periph:irq";\n' |
---|
1552 | s += ' output_line = <%d>;\n' % channel |
---|
1553 | s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id) |
---|
1554 | s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base) |
---|
1555 | s += ' };\n' |
---|
1556 | |
---|
1557 | s += ' };\n' |
---|
1558 | |
---|
1559 | # research MMC component |
---|
1560 | elif ( periph.ptype == 'MMC' ): |
---|
1561 | |
---|
1562 | # get irq line index associated to MMC in XCU |
---|
1563 | irq_in = 0xFFFFFFFF |
---|
1564 | for irq in xcu.irqs: |
---|
1565 | if ( irq.isrtype == 'ISR_MMC' ): irq_in = irq.srcid |
---|
1566 | if ( irq_in == 0xFFFFFFFF ): |
---|
1567 | print '[genmap error] in netbsd.dts() ISR_MMC not found' |
---|
1568 | sys.exit(1) |
---|
1569 | |
---|
1570 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1571 | s += ' device_type = "soclib:mmc";\n' |
---|
1572 | s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name, irq_tgt.pseg.base, irq_in) |
---|
1573 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1574 | s += ' };\n' |
---|
1575 | |
---|
1576 | # research FBF component |
---|
1577 | elif ( periph.ptype == 'FBF' ): |
---|
1578 | |
---|
1579 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1580 | s += ' device_type = "soclib:framebuffer";\n' |
---|
1581 | s += ' mode = <32>;\n' # bits par pixel |
---|
1582 | s += ' width = <%d>;\n' % periph.arg |
---|
1583 | s += ' height = <%d>;\n' % periph.arg |
---|
1584 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1585 | s += ' };\n' |
---|
1586 | |
---|
1587 | # research IOC component |
---|
1588 | elif ( periph.ptype == 'IOC' ): |
---|
1589 | |
---|
1590 | if ( periph.subtype == 'BDV' ): |
---|
1591 | |
---|
1592 | # get irq line index associated to bdv |
---|
1593 | irq_in = 0xFFFFFFFF |
---|
1594 | for irq in irq_tgt.irqs: |
---|
1595 | if ( irq.isrtype == 'ISR_BDV' ): irq_in = irq.srcid |
---|
1596 | if ( irq_in == 0xFFFFFFFF ): |
---|
1597 | print '[genmap error] in netbsd.dts() ISR_BDV not found' |
---|
1598 | sys.exit(1) |
---|
1599 | |
---|
1600 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1601 | s += ' device_type = "soclib:blockdevice";\n' |
---|
1602 | s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in) |
---|
1603 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1604 | s += ' };\n' |
---|
1605 | |
---|
1606 | elif ( periph.subtype == 'HBA' ): |
---|
1607 | print '[genmap error] in netbsd_dts() : HBA peripheral not supported by NetBSD' |
---|
1608 | sys.exit(1) |
---|
1609 | |
---|
1610 | elif ( periph.subtype == 'SPI' ): |
---|
1611 | |
---|
1612 | # get irq line index associated to spi |
---|
1613 | irq_in = 0xFFFFFFFF |
---|
1614 | for irq in irq_tgt.irqs: |
---|
1615 | if ( irq.isrtype == 'ISR_SPI' ): irq_in = irq.srcid |
---|
1616 | if ( irq_in == 0xFFFFFFFF ): |
---|
1617 | print '[genmap error] in netbsd.dts() ISR_SPI not found' |
---|
1618 | sys.exit(1) |
---|
1619 | |
---|
1620 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1621 | s += ' device_type = "soclib:spi";\n' |
---|
1622 | s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in) |
---|
1623 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1624 | s += ' };\n' |
---|
1625 | |
---|
1626 | # research ROM component |
---|
1627 | elif ( periph.ptype == 'ROM' ): |
---|
1628 | |
---|
1629 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1630 | s += ' device_type = "rom";\n' |
---|
1631 | s += ' cached = <1>;\n' |
---|
1632 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1633 | s += ' };\n' |
---|
1634 | |
---|
1635 | # research SIM component |
---|
1636 | elif ( periph.ptype == 'SIM' ): |
---|
1637 | |
---|
1638 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1639 | s += ' device_type = "soclib:simhelper";\n' |
---|
1640 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1641 | s += ' };\n' |
---|
1642 | |
---|
1643 | # research TTY component |
---|
1644 | elif ( periph.ptype == 'TTY' ): |
---|
1645 | |
---|
1646 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1647 | s += ' device_type = "soclib:tty";\n' |
---|
1648 | s += ' channel_count = < %d >;\n' % periph.channels |
---|
1649 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1650 | |
---|
1651 | # multi-channels : get HWI index (to XCU or PIC) for each channel |
---|
1652 | for channel in xrange( periph.channels ): |
---|
1653 | hwi_id = 0xFFFFFFFF |
---|
1654 | for irq in irq_tgt.irqs: |
---|
1655 | if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == channel) ): |
---|
1656 | hwi_id = irq.srcid |
---|
1657 | if ( hwi_id == 0xFFFFFFFF ): |
---|
1658 | print '[genmap error] in netbsd.dts() ISR_TTY_RX channel %d not found' % channel |
---|
1659 | sys.exit(1) |
---|
1660 | |
---|
1661 | name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base) |
---|
1662 | s += ' irq@%d{\n' % channel |
---|
1663 | s += ' device_type = "soclib:periph:irq";\n' |
---|
1664 | s += ' output_line = <%d>;\n' % channel |
---|
1665 | s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id) |
---|
1666 | s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base) |
---|
1667 | s += ' };\n' |
---|
1668 | |
---|
1669 | s += ' };\n' |
---|
1670 | |
---|
1671 | # research IOB component |
---|
1672 | elif ( periph.ptype == 'IOB' ): |
---|
1673 | |
---|
1674 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1675 | s += ' device_type = "soclib:iob";\n' |
---|
1676 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1677 | s += ' };\n' |
---|
1678 | |
---|
1679 | # research NIC component |
---|
1680 | elif ( periph.ptype == 'NIC' ): |
---|
1681 | |
---|
1682 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1683 | s += ' device_type = "soclib:nic";\n' |
---|
1684 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1685 | s += ' channel_count = < %d >;\n' % periph.channels |
---|
1686 | |
---|
1687 | # multi-channels : get HWI index (to XCU or PIC) for RX & TX IRQs |
---|
1688 | # RX IRQ : (2*channel) / TX IRQs : (2*channel + 1) |
---|
1689 | for channel in xrange( periph.channels ): |
---|
1690 | hwi_id = 0xFFFFFFFF |
---|
1691 | for irq in irq_tgt.irqs: |
---|
1692 | if ( (irq.isrtype == 'ISR_NIC_RX') and (irq.channel == channel) ): |
---|
1693 | hwi_id = irq.srcid |
---|
1694 | if ( hwi_id == 0xFFFFFFFF ): |
---|
1695 | print '[genmap error] in netbsd.dts() ISR_NIC_RX channel %d not found' % channel |
---|
1696 | sys.exit(1) |
---|
1697 | |
---|
1698 | name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base) |
---|
1699 | s += ' irq_rx@%d{\n' % channel |
---|
1700 | s += ' device_type = "soclib:periph:irq";\n' |
---|
1701 | s += ' output_line = <%d>;\n' % (2*channel) |
---|
1702 | s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id) |
---|
1703 | s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base) |
---|
1704 | s += ' };\n' |
---|
1705 | |
---|
1706 | hwi_id = 0xFFFFFFFF |
---|
1707 | for irq in irq_tgt.irqs: |
---|
1708 | if ( (irq.isrtype == 'ISR_NIC_TX') and (irq.channel == channel) ): |
---|
1709 | hwi_id = irq.srcid |
---|
1710 | if ( hwi_id == 0xFFFFFFFF ): |
---|
1711 | print '[genmap error] in netbsd.dts() ISR_NIC_TX channel %d not found' % channel |
---|
1712 | sys.exit(1) |
---|
1713 | |
---|
1714 | name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base) |
---|
1715 | s += ' irq_tx@%d{\n' % channel |
---|
1716 | s += ' device_type = "soclib:periph:irq";\n' |
---|
1717 | s += ' output_line = <%d>;\n' % (2*channel + 1) |
---|
1718 | s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id) |
---|
1719 | s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base) |
---|
1720 | s += ' };\n' |
---|
1721 | |
---|
1722 | s += ' };\n' |
---|
1723 | |
---|
1724 | # research CMA component |
---|
1725 | elif ( periph.ptype == 'CMA' ): |
---|
1726 | |
---|
1727 | s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base) |
---|
1728 | s += ' device_type = "soclib:cma";\n' |
---|
1729 | s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size) |
---|
1730 | s += ' channel_count = < %d >;\n' % periph.channels |
---|
1731 | |
---|
1732 | # multi-channels : get HWI index (to XCU or PIC) for each channel |
---|
1733 | for channel in xrange( periph.channels ): |
---|
1734 | hwi_id = 0xFFFFFFFF |
---|
1735 | for irq in irq_tgt.irqs: |
---|
1736 | if ( (irq.isrtype == 'ISR_CMA') and (irq.channel == channel) ): |
---|
1737 | hwi_id = irq.srcid |
---|
1738 | if ( hwi_id == 0xFFFFFFFF ): |
---|
1739 | print '[genmap error] in netbsd.dts() ISR_CMA channel %d not found' % channel |
---|
1740 | sys.exit(1) |
---|
1741 | |
---|
1742 | name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base) |
---|
1743 | s += ' irq@%d{\n' % channel |
---|
1744 | s += ' device_type = "soclib:periph:irq";\n' |
---|
1745 | s += ' output_line = <%d>;\n' % channel |
---|
1746 | s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id) |
---|
1747 | s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base) |
---|
1748 | s += ' };\n' |
---|
1749 | |
---|
1750 | s += ' };\n' |
---|
1751 | |
---|
1752 | # research TIM component |
---|
1753 | elif ( periph.ptype == 'TIM' ): |
---|
1754 | |
---|
1755 | print '[genmap error] in netbsd_dts() : TIM peripheral not supported by NetBSD' |
---|
1756 | sys.exit(1) |
---|
1757 | |
---|
1758 | # research MWR component |
---|
1759 | elif ( periph.ptype == 'MWR' ): |
---|
1760 | |
---|
1761 | print '[genmap error] in netbsd_dts() : MWR peripheral not supported by NetBSD' |
---|
1762 | sys.exit(1) |
---|
1763 | |
---|
1764 | # research ICU component |
---|
1765 | elif ( periph.ptype == 'ICU' ): |
---|
1766 | print '[genmap error] in netbsd_dts() : ICU peripheral not supported by NetBSD' |
---|
1767 | sys.exit(1) |
---|
1768 | |
---|
1769 | # topology |
---|
1770 | s += '\n' |
---|
1771 | s += ' topology {\n' |
---|
1772 | s += ' #address-cells = <2>;\n' |
---|
1773 | s += ' #size-cells = <0>;\n' |
---|
1774 | for cluster in self.clusters: |
---|
1775 | s += ' cluster@%d,%d {\n' % (cluster.x, cluster.y) |
---|
1776 | s += ' reg = <%d %d>;\n' % (cluster.x, cluster.y) |
---|
1777 | s += ' devices = <\n' |
---|
1778 | |
---|
1779 | offset = ((cluster.x << self.y_width) + cluster.y) << self.p_width |
---|
1780 | for proc in cluster.procs: |
---|
1781 | s += ' &{/cpus/Mips,32@0x%x}\n' % (offset + proc.lpid) |
---|
1782 | for periph in cluster.periphs: |
---|
1783 | s += ' &{/%s@0x%x}\n' % (periph.pseg.name, periph.pseg.base) |
---|
1784 | |
---|
1785 | s += ' >;\n' |
---|
1786 | s += ' };\n' |
---|
1787 | s += ' };\n' |
---|
1788 | s += '};\n' |
---|
1789 | |
---|
1790 | return s |
---|
1791 | # end netbsd_dts() |
---|
1792 | |
---|
1793 | ########################### |
---|
1794 | def almos_archinfo( self ): # compute string for arch.info file generation, |
---|
1795 | # used for almos configuration |
---|
1796 | # header |
---|
1797 | s = '# arch.info file generated by genmap for %s\n' % self.name |
---|
1798 | s += '\n' |
---|
1799 | s += '[HEADER]\n' |
---|
1800 | s += ' REVISION=1\n' |
---|
1801 | s += ' ARCH=%s\n' % self.name |
---|
1802 | s += ' XMAX=%d\n' % self.x_size |
---|
1803 | s += ' YMAX=%d\n' % self.y_size |
---|
1804 | s += ' CPU_NR=%d\n' % self.nprocs |
---|
1805 | s += '\n' |
---|
1806 | |
---|
1807 | # clusters |
---|
1808 | cluster_id = 0 |
---|
1809 | for cluster in self.clusters: |
---|
1810 | |
---|
1811 | ram = None |
---|
1812 | nb_cpus = len( cluster.procs ) |
---|
1813 | nb_devs = len( cluster.periphs ) |
---|
1814 | if ( len( cluster.coprocs ) != 0 ): |
---|
1815 | print 'Error in almos_archinfo() coprocessors not supported yet' |
---|
1816 | sys.exit(1) |
---|
1817 | |
---|
1818 | # search a RAM |
---|
1819 | for pseg in cluster.psegs: |
---|
1820 | if ( pseg.segtype == 'RAM' ): |
---|
1821 | ram = pseg |
---|
1822 | nb_devs += 1 |
---|
1823 | |
---|
1824 | # search XCU to get IRQs indexes if cluster contains peripherals |
---|
1825 | if ( len( cluster.periphs ) != 0 ): |
---|
1826 | tty_irq_id = None |
---|
1827 | bdv_irq_id = None |
---|
1828 | dma_irq_id = None |
---|
1829 | |
---|
1830 | for periph in cluster.periphs: |
---|
1831 | if ( periph.ptype == 'XCU' ): |
---|
1832 | # scan irqs |
---|
1833 | for irq in periph.irqs: |
---|
1834 | if ( irq.isrtype == 'ISR_TTY_RX' ) : tty_irq_id = irq.srcid |
---|
1835 | if ( irq.isrtype == 'ISR_BDV' ) : bdv_irq_id = irq.srcid |
---|
1836 | if ( irq.isrtype == 'ISR_DMA' ) : dma_irq_id = irq.srcid |
---|
1837 | |
---|
1838 | # Build the cluster description |
---|
1839 | s += '[CLUSTER]\n' |
---|
1840 | s += ' CID=%d\n' % cluster_id |
---|
1841 | s += ' ARCH_CID=0x%x\n' % ((cluster.x << self.y_width) + cluster.y) |
---|
1842 | s += ' CPU_NR=%d\n' % nb_cpus |
---|
1843 | s += ' DEV_NR=%d\n' % nb_devs |
---|
1844 | |
---|
1845 | |
---|
1846 | # Handling RAM when cluster contain a RAM |
---|
1847 | if (ram != None ): |
---|
1848 | base = ram.base |
---|
1849 | size = ram.size |
---|
1850 | irqid = -1 |
---|
1851 | s += ' DEVID=RAM' |
---|
1852 | s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size ) |
---|
1853 | |
---|
1854 | # Handling peripherals |
---|
1855 | for periph in cluster.periphs: |
---|
1856 | base = periph.pseg.base |
---|
1857 | size = periph.pseg.size |
---|
1858 | |
---|
1859 | if ( periph.ptype == 'XCU' ): |
---|
1860 | |
---|
1861 | s += ' DEVID=XICU' |
---|
1862 | s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size ) |
---|
1863 | |
---|
1864 | elif ( (periph.ptype == 'TTY') |
---|
1865 | and (tty_irq_id != None) ): |
---|
1866 | |
---|
1867 | s += ' DEVID=TTY' |
---|
1868 | s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, tty_irq_id ) |
---|
1869 | |
---|
1870 | elif ( (periph.ptype == 'DMA') |
---|
1871 | and (dma_irq_id != None) ): |
---|
1872 | |
---|
1873 | s += ' DEVID=DMA' |
---|
1874 | s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, dma_irq_id ) |
---|
1875 | |
---|
1876 | elif ( periph.ptype == 'FBF' ): |
---|
1877 | |
---|
1878 | s += ' DEVID=FB' |
---|
1879 | s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size ) |
---|
1880 | |
---|
1881 | elif ( (periph.ptype == 'IOC') and (periph.subtype == 'BDV') |
---|
1882 | and (bdv_irq_id != None) ): |
---|
1883 | |
---|
1884 | s += ' DEVID=BLKDEV' |
---|
1885 | s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, bdv_irq_id ) |
---|
1886 | |
---|
1887 | elif ( periph.ptype == 'PIC' ): |
---|
1888 | |
---|
1889 | s += ' DEVID=IOPIC' |
---|
1890 | s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size ) |
---|
1891 | |
---|
1892 | else: |
---|
1893 | print '# Warning from almos_archinfo() in cluster[%d,%d]' \ |
---|
1894 | % (cluster.x, cluster.y) |
---|
1895 | print '# peripheral type %s/%s not supported yet\n' \ |
---|
1896 | % ( periph.ptype, periph.subtype ) |
---|
1897 | |
---|
1898 | cluster_id += 1 |
---|
1899 | |
---|
1900 | return s |
---|
1901 | |
---|
1902 | # end of almos_archinfo() |
---|
1903 | |
---|
1904 | |
---|
1905 | |
---|
1906 | |
---|
1907 | |
---|
1908 | |
---|
1909 | |
---|
1910 | |
---|
1911 | ########################################################################################### |
---|
1912 | class Cluster ( object ): |
---|
1913 | ########################################################################################### |
---|
1914 | def __init__( self, |
---|
1915 | x, |
---|
1916 | y ): |
---|
1917 | |
---|
1918 | self.index = 0 # global index (set by Mapping constructor) |
---|
1919 | self.x = x # x coordinate |
---|
1920 | self.y = y # y coordinate |
---|
1921 | self.psegs = [] # filled by addRam() or addPeriph() |
---|
1922 | self.procs = [] # filled by addProc() |
---|
1923 | self.coprocs = [] # filled by addCoproc() |
---|
1924 | self.periphs = [] # filled by addPeriph() |
---|
1925 | |
---|
1926 | return |
---|
1927 | |
---|
1928 | ################ |
---|
1929 | def xml( self ): # xml for a cluster |
---|
1930 | |
---|
1931 | s = ' <cluster x="%d" y="%d" >\n' % (self.x, self.y) |
---|
1932 | for pseg in self.psegs: s += pseg.xml() |
---|
1933 | for proc in self.procs: s += proc.xml() |
---|
1934 | for copr in self.coprocs: s += copr.xml() |
---|
1935 | for peri in self.periphs: s += peri.xml() |
---|
1936 | s += ' </cluster>\n' |
---|
1937 | |
---|
1938 | return s |
---|
1939 | |
---|
1940 | ############################################# |
---|
1941 | def cbin( self, mapping, verbose, expected ): # C binary structure for Cluster |
---|
1942 | |
---|
1943 | if ( verbose ): |
---|
1944 | print '*** cbin for cluster [%d,%d]' % (self.x, self.y) |
---|
1945 | |
---|
1946 | # check index |
---|
1947 | if (self.index != expected): |
---|
1948 | print '[genmap error] in Cluster.cbin() : cluster global index = %d / expected = %d' \ |
---|
1949 | % (self.index, expected ) |
---|
1950 | sys.exit(1) |
---|
1951 | |
---|
1952 | # compute global index for first pseg |
---|
1953 | if ( len(self.psegs) > 0 ): |
---|
1954 | pseg_id = self.psegs[0].index |
---|
1955 | else: |
---|
1956 | pseg_id = 0 |
---|
1957 | |
---|
1958 | # compute global index for first proc |
---|
1959 | if ( len(self.procs) > 0 ): |
---|
1960 | proc_id = self.procs[0].index |
---|
1961 | else: |
---|
1962 | proc_id = 0 |
---|
1963 | |
---|
1964 | # compute global index for first coproc |
---|
1965 | if ( len(self.coprocs) > 0 ): |
---|
1966 | coproc_id = self.coprocs[0].index |
---|
1967 | else: |
---|
1968 | coproc_id = 0 |
---|
1969 | |
---|
1970 | # compute global index for first periph |
---|
1971 | if ( len(self.periphs) > 0 ): |
---|
1972 | periph_id = self.periphs[0].index |
---|
1973 | else: |
---|
1974 | periph_id = 0 |
---|
1975 | |
---|
1976 | byte_stream = bytearray() |
---|
1977 | byte_stream += mapping.int2bytes( 4 , self.x ) # x coordinate |
---|
1978 | byte_stream += mapping.int2bytes( 4 , self.y ) # x coordinate |
---|
1979 | byte_stream += mapping.int2bytes( 4 , len( self.psegs ) ) # number of psegs in cluster |
---|
1980 | byte_stream += mapping.int2bytes( 4 , pseg_id ) # first pseg global index |
---|
1981 | byte_stream += mapping.int2bytes( 4 , len( self.procs ) ) # number of procs in cluster |
---|
1982 | byte_stream += mapping.int2bytes( 4 , proc_id ) # first proc global index |
---|
1983 | byte_stream += mapping.int2bytes( 4 , len( self.coprocs ) ) # number of coprocs in cluster |
---|
1984 | byte_stream += mapping.int2bytes( 4 , coproc_id ) # first coproc global index |
---|
1985 | byte_stream += mapping.int2bytes( 4 , len( self.periphs ) ) # number of periphs in cluster |
---|
1986 | byte_stream += mapping.int2bytes( 4 , periph_id ) # first periph global index |
---|
1987 | |
---|
1988 | if ( verbose ): |
---|
1989 | print 'nb_psegs = %d' % len( self.psegs ) |
---|
1990 | print 'pseg_id = %d' % pseg_id |
---|
1991 | print 'nb_procs = %d' % len( self.procs ) |
---|
1992 | print 'proc_id = %d' % proc_id |
---|
1993 | print 'nb_coprocs = %d' % len( self.coprocs ) |
---|
1994 | print 'coproc_id = %d' % coproc_id |
---|
1995 | print 'nb_periphs = %d' % len( self.periphs ) |
---|
1996 | print 'periph_id = %d' % periph_id |
---|
1997 | |
---|
1998 | return byte_stream |
---|
1999 | |
---|
2000 | ########################################################################################### |
---|
2001 | class Vspace( object ): |
---|
2002 | ########################################################################################### |
---|
2003 | def __init__( self, |
---|
2004 | name, |
---|
2005 | startname ): |
---|
2006 | |
---|
2007 | self.index = 0 # global index ( set by addVspace() ) |
---|
2008 | self.name = name # vspace name |
---|
2009 | self.startname = startname # name of vobj containing the start_vector |
---|
2010 | self.vsegs = [] |
---|
2011 | self.tasks = [] |
---|
2012 | |
---|
2013 | return |
---|
2014 | |
---|
2015 | ################ |
---|
2016 | def xml( self ): # xml for one vspace |
---|
2017 | |
---|
2018 | s = ' <vspace name="%s" startname="%s" >\n' % ( self.name, self.startname ) |
---|
2019 | for vseg in self.vsegs: s += vseg.xml() |
---|
2020 | for task in self.tasks: s += task.xml() |
---|
2021 | s += ' </vspace>\n' |
---|
2022 | |
---|
2023 | return s |
---|
2024 | |
---|
2025 | ############################################# |
---|
2026 | def cbin( self, mapping, verbose, expected ): # C binary structure for Vspace |
---|
2027 | |
---|
2028 | if ( verbose ): |
---|
2029 | print '*** cbin for vspace %s' % (self.name) |
---|
2030 | |
---|
2031 | # check index |
---|
2032 | if (self.index != expected): |
---|
2033 | print '[genmap error] in Vspace.cbin() : vspace global index = %d / expected = %d' \ |
---|
2034 | % (self.index, expected ) |
---|
2035 | sys.exit(1) |
---|
2036 | |
---|
2037 | # compute global index for vobj containing start_vector |
---|
2038 | vobj_start_id = 0xFFFFFFFF |
---|
2039 | for vseg in self.vsegs: |
---|
2040 | if ( vseg.vobjs[0].name == self.startname ): |
---|
2041 | vobj_start_id = vseg.vobjs[0].index |
---|
2042 | if ( vobj_start_id == 0xFFFFFFFF ): |
---|
2043 | print '[genmap error] in Vspace.cbin() : startname %s not found for vspace %s' \ |
---|
2044 | % ( self.startname, self.name ) |
---|
2045 | sys.exit(1) |
---|
2046 | |
---|
2047 | # compute first vseg, vobj, task global index |
---|
2048 | first_vseg_id = self.vsegs[0].index |
---|
2049 | first_vobj_id = self.vsegs[0].vobjs[0].index |
---|
2050 | first_task_id = self.tasks[0].index |
---|
2051 | |
---|
2052 | # compute number of vobjs, tasks, vsegs |
---|
2053 | nb_vsegs = len( self.vsegs ) |
---|
2054 | nb_tasks = len( self.tasks ) |
---|
2055 | nb_vobjs = 0 |
---|
2056 | for vseg in self.vsegs: |
---|
2057 | nb_vobjs += len( vseg.vobjs ) |
---|
2058 | |
---|
2059 | byte_stream = bytearray() |
---|
2060 | byte_stream += mapping.str2bytes( 32, self.name ) # vspace name |
---|
2061 | byte_stream += mapping.int2bytes( 4, vobj_start_id ) # vobj start_vector |
---|
2062 | byte_stream += mapping.int2bytes( 4, nb_vsegs ) # number of vsegs |
---|
2063 | byte_stream += mapping.int2bytes( 4, nb_vobjs ) # number of vobjs |
---|
2064 | byte_stream += mapping.int2bytes( 4, nb_tasks ) # number of tasks |
---|
2065 | byte_stream += mapping.int2bytes( 4, first_vseg_id ) # first vseg global index |
---|
2066 | byte_stream += mapping.int2bytes( 4, first_vobj_id ) # first vobj global index |
---|
2067 | byte_stream += mapping.int2bytes( 4, first_task_id ) # first task global index |
---|
2068 | |
---|
2069 | if ( verbose ): |
---|
2070 | print 'start_id = %d' % vobj_start_id |
---|
2071 | print 'nb_vsegs = %d' % nb_vsegs |
---|
2072 | print 'nb_vobjs = %d' % nb_vobjs |
---|
2073 | print 'nb_tasks = %d' % nb_tasks |
---|
2074 | print 'vseg_id = %d' % first_vseg_id |
---|
2075 | print 'vobj_id = %d' % first_vobj_id |
---|
2076 | print 'task_id = %d' % first_task_id |
---|
2077 | |
---|
2078 | return byte_stream |
---|
2079 | |
---|
2080 | ########################################################################################### |
---|
2081 | class Task( object ): |
---|
2082 | ########################################################################################### |
---|
2083 | def __init__( self, |
---|
2084 | name, |
---|
2085 | trdid, |
---|
2086 | x, |
---|
2087 | y, |
---|
2088 | p, |
---|
2089 | stackname, |
---|
2090 | heapname, |
---|
2091 | startid, |
---|
2092 | usetty = False, |
---|
2093 | usenic = False, |
---|
2094 | usecma = False, |
---|
2095 | usehba = False, |
---|
2096 | usetim = False ): |
---|
2097 | |
---|
2098 | self.index = 0 # global index value set by addTask() |
---|
2099 | self.name = name # tsk name |
---|
2100 | self.trdid = trdid # task index (unique in vspace) |
---|
2101 | self.x = x # cluster x coordinate |
---|
2102 | self.y = y # cluster y coordinate |
---|
2103 | self.p = p # processor local index |
---|
2104 | self.stackname = stackname # name of vobj containing the stack |
---|
2105 | self.heapname = heapname # name of vobj containing the heap |
---|
2106 | self.startid = startid # index in start_vector |
---|
2107 | self.usetty = usetty # request a private TTY channel |
---|
2108 | self.usenic = usenic # request a private NIC channel |
---|
2109 | self.usecma = usecma # request a private CMA channel |
---|
2110 | self.usehba = usehba # request a private HBA channel |
---|
2111 | self.usetim = usetim # request a private TIM channel |
---|
2112 | return |
---|
2113 | |
---|
2114 | ################ |
---|
2115 | def xml( self ): # xml for one task |
---|
2116 | |
---|
2117 | s = ' <task name="%s"' % self.name |
---|
2118 | s += ' trdid="%d"' % self.trdid |
---|
2119 | s += ' x="%d"' % self.x |
---|
2120 | s += ' y="%d"' % self.y |
---|
2121 | s += ' p="%d"' % self.p |
---|
2122 | s += ' stackname="%s"' % self.stackname |
---|
2123 | s += ' heapname="%s"' % self.heapname |
---|
2124 | s += ' startid="%d"' % self.startid |
---|
2125 | if self.usetty != 0: s += ' usetty="1"' |
---|
2126 | if self.usenic != 0: s += ' usenic="1"' |
---|
2127 | if self.usecma != 0: s += ' usehba="1"' |
---|
2128 | if self.usehba != 0: s += ' usehba="1"' |
---|
2129 | if self.usetim != 0: s += ' usehba="1"' |
---|
2130 | s += ' />\n' |
---|
2131 | |
---|
2132 | return s |
---|
2133 | |
---|
2134 | ##################################################### |
---|
2135 | def cbin( self, mapping, verbose, expected, vspace ): # C binary data structure for Task |
---|
2136 | |
---|
2137 | if ( verbose ): |
---|
2138 | print '*** cbin for task %s in vspace %s' % (self.name, vspace.name) |
---|
2139 | |
---|
2140 | # check index |
---|
2141 | if (self.index != expected): |
---|
2142 | print '[genmap error] in Task.cbin() : task global index = %d / expected = %d' \ |
---|
2143 | % (self.index, expected ) |
---|
2144 | sys.exit(1) |
---|
2145 | |
---|
2146 | # compute cluster global index |
---|
2147 | cluster_id = (self.x * mapping.y_size) + self.y |
---|
2148 | |
---|
2149 | # compute vobj local index for stack |
---|
2150 | vobj_stack_id = 0xFFFFFFFF |
---|
2151 | for vseg in vspace.vsegs: |
---|
2152 | if ( vseg.vobjs[0].name == self.stackname ): |
---|
2153 | vobj_stack_id = vseg.vobjs[0].index |
---|
2154 | if ( vobj_stack_id == 0xFFFFFFFF ): |
---|
2155 | print '[genmap error] in Task.cbin() : stackname %s not found for task %s in vspace %s' \ |
---|
2156 | % ( self.stackname, self.name, vspace.name ) |
---|
2157 | sys.exit(1) |
---|
2158 | |
---|
2159 | # compute vobj local index for heap |
---|
2160 | vobj_heap_id = 0xFFFFFFFF |
---|
2161 | for vseg in vspace.vsegs: |
---|
2162 | if ( vseg.vobjs[0].name == self.heapname ): |
---|
2163 | vobj_heap_id = vseg.vobjs[0].index |
---|
2164 | if ( vobj_heap_id == 0xFFFFFFFF ): |
---|
2165 | print '[genmap error] in Task.cbin() : heapname %s not found for task %s in vspace %s' \ |
---|
2166 | % ( self.heapname, self.name, vspace.name ) |
---|
2167 | sys.exit(1) |
---|
2168 | |
---|
2169 | byte_stream = bytearray() |
---|
2170 | byte_stream += mapping.str2bytes( 32, self.name ) # task name in vspace |
---|
2171 | byte_stream += mapping.int2bytes( 4, cluster_id ) # cluster global index |
---|
2172 | byte_stream += mapping.int2bytes( 4, self.p ) # processor local index in cluster |
---|
2173 | byte_stream += mapping.int2bytes( 4, self.trdid ) # thread local index in vspace |
---|
2174 | byte_stream += mapping.int2bytes( 4, vobj_stack_id ) # stack vobj local index |
---|
2175 | byte_stream += mapping.int2bytes( 4, vobj_heap_id ) # heap vobj local index |
---|
2176 | byte_stream += mapping.int2bytes( 4, self.startid ) # index in start vector |
---|
2177 | byte_stream += mapping.int2bytes( 4, self.usetty ) # TTY channel required |
---|
2178 | byte_stream += mapping.int2bytes( 4, self.usenic ) # NIC channel required |
---|
2179 | byte_stream += mapping.int2bytes( 4, self.usecma ) # CMA channel required |
---|
2180 | byte_stream += mapping.int2bytes( 4, self.usehba ) # IOC channel required |
---|
2181 | byte_stream += mapping.int2bytes( 4, self.usetim ) # TIM channel required |
---|
2182 | |
---|
2183 | if ( verbose ): |
---|
2184 | print 'clusterid = %d' % cluster_id |
---|
2185 | print 'lpid = %d' % self.p |
---|
2186 | print 'trdid = %d' % self.trdid |
---|
2187 | print 'stackid = %d' % vobj_stack_id |
---|
2188 | print 'heapid = %d' % vobj_heap_id |
---|
2189 | print 'startid = %d' % self.startid |
---|
2190 | |
---|
2191 | return byte_stream |
---|
2192 | |
---|
2193 | ########################################################################################### |
---|
2194 | class Vseg( object ): |
---|
2195 | ########################################################################################### |
---|
2196 | def __init__( self, |
---|
2197 | name, |
---|
2198 | vbase, |
---|
2199 | mode, |
---|
2200 | x, |
---|
2201 | y, |
---|
2202 | psegname, |
---|
2203 | identity = False, |
---|
2204 | local = False, |
---|
2205 | big = False ): |
---|
2206 | |
---|
2207 | assert mode in VSEGMODES |
---|
2208 | |
---|
2209 | self.index = 0 # global index ( set by addVseg() ) |
---|
2210 | self.name = name # vseg name |
---|
2211 | self.vbase = vbase & 0xFFFFFFFF # virtual base address in vspace |
---|
2212 | self.mode = mode # CXWU access rights |
---|
2213 | self.x = x # x coordinate of destination cluster |
---|
2214 | self.y = y # y coordinate of destination cluster |
---|
2215 | self.psegname = psegname # name of pseg in destination cluster |
---|
2216 | self.identity = identity # identity mapping required |
---|
2217 | self.local = local # only mapped in local PTAB when true |
---|
2218 | self.big = big # to be mapped in a big physical page |
---|
2219 | self.vobjs = [] |
---|
2220 | return |
---|
2221 | |
---|
2222 | ################ |
---|
2223 | def xml( self ): # xml for one vseg |
---|
2224 | |
---|
2225 | s = ' <vseg name="%s" vbase="0x%x" mode="%s" x="%d" y="%d" psegname="%s"' \ |
---|
2226 | % ( self.name, self.vbase, self.mode, self.x, self.y, self.psegname ) |
---|
2227 | if ( self.identity ): s += ' ident="1"' |
---|
2228 | if ( self.local ): s += ' local="1"' |
---|
2229 | if ( self.big ): s += ' big="1"' |
---|
2230 | s += ' >\n' |
---|
2231 | for vobj in self.vobjs: s += vobj.xml() |
---|
2232 | s += ' </vseg>\n' |
---|
2233 | |
---|
2234 | return s |
---|
2235 | |
---|
2236 | ############################################# |
---|
2237 | def cbin( self, mapping, verbose, expected ): # C binary structure for Vseg |
---|
2238 | |
---|
2239 | if ( verbose ): |
---|
2240 | print '*** cbin for vseg[%d] %s' % (self.index, self.name) |
---|
2241 | |
---|
2242 | # check index |
---|
2243 | if (self.index != expected): |
---|
2244 | print '[genmap error] in Vseg.cbin() : vseg global index = %d / expected = %d' \ |
---|
2245 | % (self.index, expected ) |
---|
2246 | sys.exit(1) |
---|
2247 | |
---|
2248 | # compute pseg_id |
---|
2249 | pseg_id = 0xFFFFFFFF |
---|
2250 | cluster_id = (self.x * mapping.y_size) + self.y |
---|
2251 | cluster = mapping.clusters[cluster_id] |
---|
2252 | for pseg in cluster.psegs: |
---|
2253 | if (self.psegname == pseg.name): |
---|
2254 | pseg_id = pseg.index |
---|
2255 | if (pseg_id == 0xFFFFFFFF): |
---|
2256 | print '[genmap error] in Vseg.cbin() : psegname %s not found for vseg %s in cluster %d' \ |
---|
2257 | % ( self.psegname, self.name, cluster_id ) |
---|
2258 | sys.exit(1) |
---|
2259 | |
---|
2260 | # compute numerical value for mode |
---|
2261 | mode_id = 0xFFFFFFFF |
---|
2262 | for x in xrange( len(VSEGMODES) ): |
---|
2263 | if ( self.mode == VSEGMODES[x] ): |
---|
2264 | mode_id = x |
---|
2265 | if ( mode_id == 0xFFFFFFFF ): |
---|
2266 | print '[genmap error] in Vseg.cbin() : undefined vseg mode %s' % self.mode |
---|
2267 | sys.exit(1) |
---|
2268 | |
---|
2269 | # compute vobj_id |
---|
2270 | vobj_id = self.vobjs[0].index |
---|
2271 | |
---|
2272 | byte_stream = bytearray() |
---|
2273 | byte_stream += mapping.str2bytes( 32, self.name ) # vseg name |
---|
2274 | byte_stream += mapping.int2bytes( 4, self.vbase ) # virtual base address |
---|
2275 | byte_stream += mapping.int2bytes( 8, 0 ) # physical base address |
---|
2276 | byte_stream += mapping.int2bytes( 4, 0 ) # vseg size (bytes) |
---|
2277 | byte_stream += mapping.int2bytes( 4, pseg_id ) # physical segment global index |
---|
2278 | byte_stream += mapping.int2bytes( 4, mode_id ) # CXWU flags |
---|
2279 | byte_stream += mapping.int2bytes( 4, len(self.vobjs) ) # number of vobjs in vseg |
---|
2280 | byte_stream += mapping.int2bytes( 4, vobj_id ) # first vobj global index |
---|
2281 | byte_stream += mapping.int2bytes( 4, 0 ) # linked list of vsegs on pseg |
---|
2282 | byte_stream += mapping.int2bytes( 1, 0 ) # mapped when non zero |
---|
2283 | byte_stream += mapping.int2bytes( 1, self.identity ) # identity mapping if non zero |
---|
2284 | byte_stream += mapping.int2bytes( 1, self.local ) # only mapped in local PTAB |
---|
2285 | byte_stream += mapping.int2bytes( 1, self.big ) # to be mapped in big physical page |
---|
2286 | |
---|
2287 | if ( verbose ): |
---|
2288 | print 'vbase = %x' % self.vbase |
---|
2289 | print 'pseg_id = %d' % pseg_id |
---|
2290 | print 'mode = %s' % self.mode |
---|
2291 | print 'nb_vobjs = %d' % len(self.vobjs) |
---|
2292 | print 'vobj_id = %d' % vobj_id |
---|
2293 | |
---|
2294 | return byte_stream |
---|
2295 | |
---|
2296 | ########################################################################################### |
---|
2297 | class Vobj( object ): |
---|
2298 | ########################################################################################### |
---|
2299 | def __init__( self, |
---|
2300 | name, |
---|
2301 | length, |
---|
2302 | vtype, |
---|
2303 | binpath = '', |
---|
2304 | align = 0, |
---|
2305 | init = 0 ): |
---|
2306 | |
---|
2307 | assert vtype in ['ELF','BLOB','PTAB','PERI','MWMR','LOCK', \ |
---|
2308 | 'BUFFER','BARRIER','CONST','MEMSPACE','SCHED'] |
---|
2309 | |
---|
2310 | assert (vtype != 'ELF') or (binpath != '') |
---|
2311 | |
---|
2312 | self.index = 0 # global index ( set by addVobj() ) |
---|
2313 | self.name = name # vobj name (unique in vspace) |
---|
2314 | self.vtype = vtype # vobj type (defined in mapping_info.h) |
---|
2315 | self.length = length # vobj size (bytes) |
---|
2316 | self.binpath = binpath # pathname for (ELF type) |
---|
2317 | self.align = align # required alignment (logarithm of 2) |
---|
2318 | self.init = init # initialisation value (for BARRIER or MWMR types) |
---|
2319 | |
---|
2320 | return |
---|
2321 | |
---|
2322 | ################ |
---|
2323 | def xml( self ): # xml for a vobj |
---|
2324 | |
---|
2325 | s = ' <vobj name="%s" type="%s" length="0x%x"' \ |
---|
2326 | % ( self.name, self.vtype, self.length ) |
---|
2327 | if (self.binpath != ''): s += ' binpath="%s"' % (self.binpath) |
---|
2328 | if (self.align != 0 ): s += ' align="%d"' % (self.align) |
---|
2329 | if (self.init != 0 ): s += ' init="%d"' % (self.init) |
---|
2330 | s += ' />\n' |
---|
2331 | |
---|
2332 | return s |
---|
2333 | |
---|
2334 | ############################################# |
---|
2335 | def cbin( self, mapping, verbose, expected ): # C binary structure for Vobj |
---|
2336 | |
---|
2337 | # check index |
---|
2338 | if (self.index != expected): |
---|
2339 | print '[genmap error] in Vobj.cbin() : vobj global index = %d / expected = %d' \ |
---|
2340 | % (self.index, expected ) |
---|
2341 | sys.exit(1) |
---|
2342 | elif ( verbose ): |
---|
2343 | print '*** cbin for vobj[%d] %s' % (self.index, self.name) |
---|
2344 | |
---|
2345 | # compute numerical value for vtype |
---|
2346 | vtype_int = 0xFFFFFFFF |
---|
2347 | for x in xrange( len(VOBJTYPES) ): |
---|
2348 | if ( self.vtype == VOBJTYPES[x] ): |
---|
2349 | vtype_int = x |
---|
2350 | if ( vtype_int == 0xFFFFFFFF ): |
---|
2351 | print '[genmap error] in Vobj.cbin() : undefined vobj type %s' % self.vtype |
---|
2352 | sys.exit(1) |
---|
2353 | |
---|
2354 | byte_stream = bytearray() |
---|
2355 | byte_stream += mapping.str2bytes( 32, self.name ) # vobj name |
---|
2356 | byte_stream += mapping.str2bytes( 64, self.binpath ) # pathname for .elf file |
---|
2357 | byte_stream += mapping.int2bytes( 4 , vtype_int ) # vobj type |
---|
2358 | byte_stream += mapping.int2bytes( 4 , self.length ) # vobj size |
---|
2359 | byte_stream += mapping.int2bytes( 4 , self.align ) # required alignment |
---|
2360 | byte_stream += mapping.int2bytes( 4 , 0 ) # virtual base address |
---|
2361 | byte_stream += mapping.int2bytes( 4 , self.init ) # init value |
---|
2362 | |
---|
2363 | if ( verbose ): |
---|
2364 | print 'binpath = %s' % self.binpath |
---|
2365 | print 'type = %s' % self.vtype |
---|
2366 | print 'length = %x' % self.length |
---|
2367 | |
---|
2368 | return byte_stream |
---|
2369 | |
---|
2370 | ########################################################################################### |
---|
2371 | class Processor ( object ): |
---|
2372 | ########################################################################################### |
---|
2373 | def __init__( self, |
---|
2374 | x, |
---|
2375 | y, |
---|
2376 | lpid ): |
---|
2377 | |
---|
2378 | self.index = 0 # global index ( set by addProc() ) |
---|
2379 | self.x = x # x cluster coordinate |
---|
2380 | self.y = y # y cluster coordinate |
---|
2381 | self.lpid = lpid # processor local index |
---|
2382 | |
---|
2383 | return |
---|
2384 | |
---|
2385 | ################ |
---|
2386 | def xml( self ): # xml for a processor |
---|
2387 | return ' <proc index="%d" />\n' % (self.lpid) |
---|
2388 | |
---|
2389 | ############################################# |
---|
2390 | def cbin( self, mapping, verbose, expected ): # C binary structure for Proc |
---|
2391 | |
---|
2392 | if ( verbose ): |
---|
2393 | print '*** cbin for proc %d in cluster (%d,%d)' % (self.lpid, self.x, self.y) |
---|
2394 | |
---|
2395 | # check index |
---|
2396 | if (self.index != expected): |
---|
2397 | print '[genmap error] in Proc.cbin() : proc global index = %d / expected = %d' \ |
---|
2398 | % (self.index, expected ) |
---|
2399 | sys.exit(1) |
---|
2400 | |
---|
2401 | byte_stream = bytearray() |
---|
2402 | byte_stream += mapping.int2bytes( 4 , self.lpid ) # local index |
---|
2403 | |
---|
2404 | return byte_stream |
---|
2405 | |
---|
2406 | ########################################################################################### |
---|
2407 | class Pseg ( object ): |
---|
2408 | ########################################################################################### |
---|
2409 | def __init__( self, |
---|
2410 | name, |
---|
2411 | base, |
---|
2412 | size, |
---|
2413 | x, |
---|
2414 | y, |
---|
2415 | segtype ): |
---|
2416 | |
---|
2417 | assert( segtype in PSEGTYPES ) |
---|
2418 | |
---|
2419 | self.index = 0 # global index ( set by addPseg() ) |
---|
2420 | self.name = name # pseg name (unique in cluster) |
---|
2421 | self.base = base # physical base address |
---|
2422 | self.size = size # segment size (bytes) |
---|
2423 | self.x = x # cluster x coordinate |
---|
2424 | self.y = y # cluster y coordinate |
---|
2425 | self.segtype = segtype # RAM / PERI (defined in mapping_info.h) |
---|
2426 | |
---|
2427 | return |
---|
2428 | |
---|
2429 | ################ |
---|
2430 | def xml( self ): # xml for a pseg |
---|
2431 | |
---|
2432 | return ' <pseg name="%s" type="%s" base="0x%x" length="0x%x" />\n' \ |
---|
2433 | % (self.name, self.segtype, self.base, self.size) |
---|
2434 | |
---|
2435 | ###################################################### |
---|
2436 | def cbin( self, mapping, verbose, expected, cluster ): # C binary structure for Pseg |
---|
2437 | |
---|
2438 | if ( verbose ): |
---|
2439 | print '*** cbin for pseg[%d] %s in cluster[%d,%d]' \ |
---|
2440 | % (self.index, self.name, cluster.x, cluster.y) |
---|
2441 | |
---|
2442 | # check index |
---|
2443 | if (self.index != expected): |
---|
2444 | print '[genmap error] in Pseg.cbin() : pseg global index = %d / expected = %d' \ |
---|
2445 | % (self.index, expected ) |
---|
2446 | sys.exit(1) |
---|
2447 | |
---|
2448 | # compute numerical value for segtype |
---|
2449 | segtype_int = 0xFFFFFFFF |
---|
2450 | for x in xrange( len(PSEGTYPES) ): |
---|
2451 | if ( self.segtype == PSEGTYPES[x] ): |
---|
2452 | segtype_int = x |
---|
2453 | if ( segtype_int == 0xFFFFFFFF ): |
---|
2454 | print '[genmap error] in Pseg.cbin() : undefined segment type %s' % self.segtype |
---|
2455 | sys.exit(1) |
---|
2456 | |
---|
2457 | byte_stream = bytearray() |
---|
2458 | byte_stream += mapping.str2bytes( 32, self.name ) # pseg name |
---|
2459 | byte_stream += mapping.int2bytes( 8 , self.base ) # physical base address |
---|
2460 | byte_stream += mapping.int2bytes( 8 , self.size ) # segment length |
---|
2461 | byte_stream += mapping.int2bytes( 4 , segtype_int ) # segment type |
---|
2462 | byte_stream += mapping.int2bytes( 4 , cluster.index ) # cluster global index |
---|
2463 | byte_stream += mapping.int2bytes( 4 , 0 ) # linked list of vsegs |
---|
2464 | |
---|
2465 | if ( verbose ): |
---|
2466 | print 'pbase = %x' % self.base |
---|
2467 | print 'size = %x' % self.size |
---|
2468 | print 'type = %s' % self.segtype |
---|
2469 | |
---|
2470 | return byte_stream |
---|
2471 | |
---|
2472 | ########################################################################################### |
---|
2473 | class Periph ( object ): |
---|
2474 | ########################################################################################### |
---|
2475 | def __init__( self, |
---|
2476 | pseg, # associated pseg |
---|
2477 | ptype, # peripheral type |
---|
2478 | subtype = 'NONE', # peripheral subtype |
---|
2479 | channels = 1, # for multi-channels peripherals |
---|
2480 | arg = 0 ): # optional argument (semantic depends on ptype) |
---|
2481 | |
---|
2482 | assert ptype in PERIPHTYPES |
---|
2483 | |
---|
2484 | assert subtype in PERIPHSUBTYPES |
---|
2485 | |
---|
2486 | self.index = 0 # global index ( set by addPeriph() ) |
---|
2487 | self.channels = channels |
---|
2488 | self.ptype = ptype |
---|
2489 | self.subtype = subtype |
---|
2490 | self.arg = arg |
---|
2491 | self.pseg = pseg |
---|
2492 | self.irqs = [] |
---|
2493 | return |
---|
2494 | |
---|
2495 | ################ |
---|
2496 | def xml( self ): # xml for a periph |
---|
2497 | |
---|
2498 | s = ' <periph type="%s"' % self.ptype |
---|
2499 | s += ' subtype="%s"' % self.subtype |
---|
2500 | s += ' psegname="%s"' % self.pseg.name |
---|
2501 | s += ' channels="%d"' % self.channels |
---|
2502 | s += ' arg="%d" >\n' % self.arg |
---|
2503 | if ( (self.ptype == 'PIC') or (self.ptype == 'XCU') or (self.ptype == 'ICU') ): |
---|
2504 | for irq in self.irqs: s += irq.xml() |
---|
2505 | s += ' </periph>\n' |
---|
2506 | |
---|
2507 | return s |
---|
2508 | |
---|
2509 | ############################################# |
---|
2510 | def cbin( self, mapping, verbose, expected ): # C binary structure for Periph |
---|
2511 | |
---|
2512 | if ( verbose ): |
---|
2513 | print '*** cbin for periph %s in cluster [%d,%d]' \ |
---|
2514 | % (self.ptype, self.pseg.x, self.pseg.y) |
---|
2515 | |
---|
2516 | # check index |
---|
2517 | if (self.index != expected): |
---|
2518 | print '[genmap error] in Periph.cbin() : periph global index = %d / expected = %d' \ |
---|
2519 | % (self.index, expected ) |
---|
2520 | sys.exit(1) |
---|
2521 | |
---|
2522 | # compute pseg global index |
---|
2523 | pseg_id = self.pseg.index |
---|
2524 | |
---|
2525 | # compute first irq global index |
---|
2526 | if ( len(self.irqs) > 0 ): |
---|
2527 | irq_id = self.irqs[0].index |
---|
2528 | else: |
---|
2529 | irq_id = 0 |
---|
2530 | |
---|
2531 | # compute numerical value for ptype |
---|
2532 | ptype_id = 0xFFFFFFFF |
---|
2533 | for x in xrange( len(PERIPHTYPES) ): |
---|
2534 | if ( self.ptype == PERIPHTYPES[x] ): ptype_id = x |
---|
2535 | if ( ptype_id == 0xFFFFFFFF ): |
---|
2536 | print '[genmap error] in Periph.cbin() : undefined peripheral type %s' % self.ptype |
---|
2537 | sys.exit(1) |
---|
2538 | |
---|
2539 | # compute numerical value for subtype |
---|
2540 | subtype_id = 0xFFFFFFFF |
---|
2541 | for x in xrange( len(PERIPHSUBTYPES) ): |
---|
2542 | if ( self.subtype == PERIPHSUBTYPES[x] ): subtype_id = x |
---|
2543 | |
---|
2544 | # compute |
---|
2545 | byte_stream = bytearray() |
---|
2546 | byte_stream += mapping.int2bytes( 4 , ptype_id ) # peripheral type |
---|
2547 | byte_stream += mapping.int2bytes( 4 , subtype_id ) # peripheral subtype |
---|
2548 | byte_stream += mapping.int2bytes( 4 , pseg_id ) # pseg global index |
---|
2549 | byte_stream += mapping.int2bytes( 4 , self.channels ) # number of channels |
---|
2550 | byte_stream += mapping.int2bytes( 4 , self.arg ) # optionnal argument |
---|
2551 | byte_stream += mapping.int2bytes( 4 , len( self.irqs ) ) # number of input irqs |
---|
2552 | byte_stream += mapping.int2bytes( 4 , irq_id ) # first irq global index |
---|
2553 | |
---|
2554 | if ( verbose ): |
---|
2555 | print 'ptype = %d' % ptype_id |
---|
2556 | print 'pseg_id = %d' % pseg_id |
---|
2557 | print 'nb_irqs = %d' % len( self.irqs ) |
---|
2558 | print 'irq_id = %d' % irq_id |
---|
2559 | return byte_stream |
---|
2560 | |
---|
2561 | ########################################################################################### |
---|
2562 | class Irq ( object ): |
---|
2563 | ########################################################################################### |
---|
2564 | def __init__( self, |
---|
2565 | irqtype, # input IRQ type : HWI / WTI / PTI (for XCU only) |
---|
2566 | srcid, # input IRQ index (for XCU or PIC) |
---|
2567 | isrtype, # Type of ISR to be executed |
---|
2568 | channel = 0 ): # channel index for multi-channel ISR |
---|
2569 | |
---|
2570 | assert irqtype in IRQTYPES |
---|
2571 | assert isrtype in ISRTYPES |
---|
2572 | assert srcid < 32 |
---|
2573 | |
---|
2574 | self.index = 0 # global index ( set by addIrq() ) |
---|
2575 | self.irqtype = irqtype # IRQ type |
---|
2576 | self.srcid = srcid # source IRQ index |
---|
2577 | self.isrtype = isrtype # ISR type |
---|
2578 | self.channel = channel # channel index (for multi-channels ISR) |
---|
2579 | return |
---|
2580 | |
---|
2581 | ################ |
---|
2582 | def xml( self ): # xml for Irq |
---|
2583 | |
---|
2584 | return ' <irq srctype="%s" srcid="%d" isr="%s" channel="%d" />\n' \ |
---|
2585 | % ( self.irqtype, self.srcid, self.isrtype, self.channel ) |
---|
2586 | |
---|
2587 | ############################################# |
---|
2588 | def cbin( self, mapping, verbose, expected ): # C binary structure for Irq |
---|
2589 | |
---|
2590 | if ( verbose ): |
---|
2591 | print '*** cbin for irq[%d]' % (self.index) |
---|
2592 | |
---|
2593 | # check index |
---|
2594 | if (self.index != expected): |
---|
2595 | print '[genmap error] in Irq.cbin() : irq global index = %d / expected = %d' \ |
---|
2596 | % (self.index, expected ) |
---|
2597 | sys.exit(1) |
---|
2598 | |
---|
2599 | # compute numerical value for irqtype |
---|
2600 | irqtype_id = 0xFFFFFFFF |
---|
2601 | for x in xrange( len(IRQTYPES) ): |
---|
2602 | if ( self.irqtype == IRQTYPES[x] ): |
---|
2603 | irqtype_id = x |
---|
2604 | if ( irqtype_id == 0xFFFFFFFF ): |
---|
2605 | print '[genmap error] in Irq.cbin() : undefined irqtype %s' % self.irqtype |
---|
2606 | sys.exit(1) |
---|
2607 | |
---|
2608 | # compute numerical value for isrtype |
---|
2609 | isrtype_id = 0xFFFFFFFF |
---|
2610 | for x in xrange( len(ISRTYPES) ): |
---|
2611 | if ( self.isrtype == ISRTYPES[x] ): |
---|
2612 | isrtype_id = x |
---|
2613 | if ( isrtype_id == 0xFFFFFFFF ): |
---|
2614 | print '[genmap error] in Irq.cbin() : undefined isrtype %s' % self.isrtype |
---|
2615 | sys.exit(1) |
---|
2616 | |
---|
2617 | byte_stream = bytearray() |
---|
2618 | byte_stream += mapping.int2bytes( 4, irqtype_id ) |
---|
2619 | byte_stream += mapping.int2bytes( 4, self.srcid ) |
---|
2620 | byte_stream += mapping.int2bytes( 4, isrtype_id ) |
---|
2621 | byte_stream += mapping.int2bytes( 4, self.channel ) |
---|
2622 | byte_stream += mapping.int2bytes( 4, 0 ) |
---|
2623 | byte_stream += mapping.int2bytes( 4, 0 ) |
---|
2624 | |
---|
2625 | if ( verbose ): |
---|
2626 | print 'irqtype = %s' % self.irqtype |
---|
2627 | print 'srcid = %d' % self.srcid |
---|
2628 | print 'isrtype = %s' % self.isrtype |
---|
2629 | print 'channel = %d' % self.channel |
---|
2630 | |
---|
2631 | return byte_stream |
---|
2632 | |
---|
2633 | ########################################################################################### |
---|
2634 | class Coproc ( object ): |
---|
2635 | ########################################################################################### |
---|
2636 | def __init__( self, |
---|
2637 | pseg ): # associated pseg |
---|
2638 | |
---|
2639 | self.index = 0 # global index value set by addCoproc() |
---|
2640 | self.pseg = pseg |
---|
2641 | self.ports = [] |
---|
2642 | |
---|
2643 | return |
---|
2644 | |
---|
2645 | ################ |
---|
2646 | def xml( self ): # xml for Coproc |
---|
2647 | |
---|
2648 | print '[genmap error] in Coproc.xml() : not defined yet' |
---|
2649 | sys.exit(1) |
---|
2650 | |
---|
2651 | return |
---|
2652 | |
---|
2653 | ############################################# |
---|
2654 | def cbin( self, mapping, verbose, expected ): # C binary structure for Coproc |
---|
2655 | |
---|
2656 | if ( verbose ): |
---|
2657 | print '*** cbin for coproc in cluster (%d,%d)' % (self.pseg.x, self.pseg.y) |
---|
2658 | |
---|
2659 | # check index |
---|
2660 | if (self.index != expected): |
---|
2661 | print '[genmap error] in Coproc.cbin() : coproc global index = %d / expected = %d' \ |
---|
2662 | % (self.index, expected ) |
---|
2663 | sys.exit(1) |
---|
2664 | |
---|
2665 | # compute pseg global index |
---|
2666 | pseg_id = self.pseg.index |
---|
2667 | |
---|
2668 | # compute first port global index |
---|
2669 | port_id = self.ports[0].index |
---|
2670 | |
---|
2671 | byte_stream = bytearray() |
---|
2672 | byte_stream += mapping.str2bytes( 32, self.pseg.name ) # probablement inutile (AG) |
---|
2673 | byte_stream += mapping.int2bytes( 4 , pseg_id ) # pseg global index |
---|
2674 | byte_stream += mapping.int2bytes( 4 , len( self.ports ) ) # number of input irqs |
---|
2675 | byte_stream += mapping.int2bytes( 4 , port_id ) # first port global index |
---|
2676 | |
---|
2677 | if ( verbose ): |
---|
2678 | print 'irqtype = %s' % self.irqtype |
---|
2679 | print 'pseg_id = %d' % pseg_id |
---|
2680 | print 'nb_ports = %d' % len( self.ports ) |
---|
2681 | print 'port_id %d' % port_id |
---|
2682 | |
---|
2683 | return byte_stream |
---|
2684 | |
---|
2685 | ########################################################################################### |
---|
2686 | class Cpport ( object ): |
---|
2687 | ########################################################################################### |
---|
2688 | def __init__( self, |
---|
2689 | direction, |
---|
2690 | vspacename, |
---|
2691 | mwmrname ): |
---|
2692 | |
---|
2693 | self.index = 0 # global index ( set by addCpport() ) |
---|
2694 | self.direction = direction # TO_COPROC / FROM_COPROC |
---|
2695 | self.vspacename = vspacename # name of vspace containing mwmr channel |
---|
2696 | self.mwmrname = mwmrname # name of vobj defining mwmr channel |
---|
2697 | |
---|
2698 | return |
---|
2699 | |
---|
2700 | ################ |
---|
2701 | def xml( self ): # xml for Cpport |
---|
2702 | |
---|
2703 | print '[genmap error] in Cpport.xml() : not defined yet' |
---|
2704 | sys.exit(1) |
---|
2705 | |
---|
2706 | return |
---|
2707 | |
---|
2708 | ############################################# |
---|
2709 | def cbin( self, mapping, verbose, expected ): # C binary structure for Cpport |
---|
2710 | |
---|
2711 | if ( verbose ): |
---|
2712 | print '*** cbin for cpport[%d]' % (self.index) |
---|
2713 | |
---|
2714 | # check index |
---|
2715 | if ( self.index != expected ): |
---|
2716 | print '[genmap error] in Cpport.cbin() : port global index = %d / expected = %d' \ |
---|
2717 | % ( self.index, expected ) |
---|
2718 | sys.exit(1) |
---|
2719 | |
---|
2720 | # compute numerical value for direction |
---|
2721 | if ( self.direction == 'TO_COPROC' ): |
---|
2722 | dir_int = 0 |
---|
2723 | else: |
---|
2724 | dir_int = 1 |
---|
2725 | |
---|
2726 | # compute vspace global index |
---|
2727 | vspace_id = 0xFFFFFFFF |
---|
2728 | for vspace in mapping.vspaces: |
---|
2729 | if ( self.vspacename == vspace.name ): |
---|
2730 | vspace_id = vspace.index |
---|
2731 | if (vspace_id == 0xFFFFFFFF): |
---|
2732 | print '[genmap error] in Cpport.cbin() : vspace name %s not found' \ |
---|
2733 | % ( self.vspacename ) |
---|
2734 | sys.exit(1) |
---|
2735 | |
---|
2736 | # compute mwmr global index |
---|
2737 | mwmr_id = 0xFFFFFFFF |
---|
2738 | for vseg in mapping.vspace[vspace_id].vsegs: |
---|
2739 | for vobj in vseg.vobjs: |
---|
2740 | if (self.mwmrname == vobj.name): |
---|
2741 | mwmr_id = vobj.index |
---|
2742 | if (mwmr_id == 0xFFFFFFFF): |
---|
2743 | print '[genmap error] in Cpport.cbin() : mwmr vobj name %s not found in vspace %s' \ |
---|
2744 | % ( self.mwmrname, self.vspacename ) |
---|
2745 | sys.exit(1) |
---|
2746 | |
---|
2747 | byte_stream = bytearray() |
---|
2748 | byte_stream += mapping.int2bytes( 4 , dir_int ) # pseg global index |
---|
2749 | byte_stream += mapping.int2bytes( 4 , vspace_id ) # vspace global index |
---|
2750 | byte_stream += mapping.int2bytes( 4 , mwmr_id ) # mwmr vobj global index |
---|
2751 | |
---|
2752 | if ( verbose ): |
---|
2753 | print 'direction = %s' % self.direction |
---|
2754 | print 'vspace_id = %d' % vspace_id |
---|
2755 | print 'mwmr_id = %d' % mwmr_id |
---|
2756 | |
---|
2757 | return byte_stream |
---|
2758 | |
---|
2759 | |
---|
2760 | # Local Variables: |
---|
2761 | # tab-width: 4; |
---|
2762 | # c-basic-offset: 4; |
---|
2763 | # c-file-offsets:((innamespace . 0)(inline-open . 0)); |
---|
2764 | # indent-tabs-mode: nil; |
---|
2765 | # End: |
---|
2766 | # |
---|
2767 | # vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
---|
2768 | |
---|