Changeset 165 for soft/giet_vm/sys
- Timestamp:
- Jul 4, 2012, 2:51:18 PM (13 years ago)
- Location:
- soft/giet_vm/sys
- Files:
-
- 1 added
- 2 deleted
- 12 edited
Legend:
- Unmodified
- Added
- Removed
-
soft/giet_vm/sys/common.c
r160 r165 9 9 /////////////////////////////////////////////////////////////////////////////////// 10 10 11 #include <sys_handler.h> 11 12 #include <common.h> 12 13 #include <drivers.h> 13 14 #include <stdarg.h> 15 16 //////////////////////////////////////////////////////////////////////////// 17 // _get_lock() 18 //////////////////////////////////////////////////////////////////////////// 19 inline void _get_lock( unsigned int* plock ) 20 { 21 register unsigned int delay = (_proctime() & 0xF) << 4; 22 23 asm volatile ( 24 "_lock_llsc: \n" 25 "ll $2, 0(%0) \n" /* $2 <= _ioc_lock current value */ 26 "bnez $2, _lock_delay \n" /* delay if _ioc_lock already taken */ 27 "li $3, 1 \n" /* $3 <= argument for sc */ 28 "sc $3, 0(%0) \n" /* try to set _ioc_lock */ 29 "bnez $3, _lock_ok \n" /* exit if atomic */ 30 "_lock_delay: \n" 31 "move $4, %1 \n" /* $4 <= delay */ 32 "_lock_loop: \n" 33 "addi $4, $4, -1 \n" /* $4 <= $4 - 1 */ 34 "beqz $4, _lock_loop \n" /* test end delay */ 35 "j _lock_llsc \n" /* retry */ 36 "_lock_ok: \n" 37 : 38 :"r"(plock), "r"(delay) 39 :"$2", "$3", "$4"); 40 } 41 42 //////////////////////////////////////////////////////////////////////////// 43 // _release_lock() 44 //////////////////////////////////////////////////////////////////////////// 45 inline void _release_lock( unsigned int* plock ) 46 { 47 *plock = 0; 48 } 14 49 15 50 //////////////////////////////////////////////////////////////////////////// … … 156 191 return ret; 157 192 } 193 158 194 /////////////////////////////////////////////////////////////////////////////////// 159 195 // _it_mask() … … 163 199 { 164 200 asm volatile( 165 "mfc0 $2, $12 \n" 166 "ori $2, $2, 1 \n" 167 "mtc0 $2, $12 \n" 168 ::: "$2" 201 "lui $27, 0xFFFF \n" 202 "ori $27, $27, 0xFFFE \n" 203 "mfc0 $26, $12 \n" 204 "and $26, $26, $27 \n" 205 "mtc0 $26, $12 \n" 206 ::: "$26", "$27" 169 207 ); 170 208 } … … 176 214 { 177 215 asm volatile( 178 "mfc0 $2 , $12\n"179 " addi $2, $2, -1\n"180 "mtc0 $2 , $12\n"181 ::: "$2 "216 "mfc0 $26, $12 \n" 217 "ori $26, $26, 1 \n" 218 "mtc0 $26, $12 \n" 219 ::: "$26" 182 220 ); 183 221 } 222 184 223 ///////////////////////////////////////////////////////////////////////////// 185 224 // access functions to mapping_info data structure -
soft/giet_vm/sys/common.h
r160 r165 45 45 unsigned int _get_cr(); 46 46 47 void _get_lock(unsigned int* lock); 48 void _release_lock(unsigned int* lock); 49 47 50 mapping_cluster_t* _get_cluster_base( mapping_header_t* header ); 48 51 mapping_pseg_t* _get_pseg_base( mapping_header_t* header ); -
soft/giet_vm/sys/ctx_handler.c
r164 r165 25 25 // ctx[3] <- $3 ctx[11]<- $11 ctx[19]<- $19 ctx[27]<- HI ctx[35]<- PTPR 26 26 // ctx[4] <- $4 ctx[12]<- $12 ctx[20]<- $20 ctx[28]<- $28 ctx[36]<- MODE 27 // ctx[5] <- $5 ctx[13]<- $13 ctx[21]<- $21 ctx[29]<- $29 ctx[37]<- reserved27 // ctx[5] <- $5 ctx[13]<- $13 ctx[21]<- $21 ctx[29]<- $29 ctx[37]<- FBDMA 28 28 // ctx[6] <- $6 ctx[14]<- $14 ctx[22]<- $22 ctx[30]<- $30 ctx[38]<- reserved 29 29 // ctx[7] <- $7 ctx[15]<- $15 ctx[23]<- $23 ctx[31]<- $31 ctx[39]<- reserved … … 64 64 unsigned int *next_context; 65 65 66 unsigned int tasks; 67 unsigned int proc_id; 68 69 proc_id = _procid(); 70 tasks = _scheduler[proc_id].tasks; 66 unsigned int pid = _procid(); 67 unsigned int time = _proctime(); 68 unsigned int tasks = _scheduler[pid].tasks; 71 69 72 70 // return if only one task */ … … 74 72 75 73 // compute the task context base address for the current task 76 curr_task_id = _scheduler[p roc_id].current;77 curr_context = &(_scheduler[p roc_id].context[curr_task_id][0]);74 curr_task_id = _scheduler[pid].current; 75 curr_context = &(_scheduler[pid].context[curr_task_id][0]); 78 76 79 77 // select the next task using a round-robin scheduling policy … … 81 79 82 80 // compute the task context base address for the next task 83 next_context = &(_scheduler[proc_id].context[next_task_id][0]); 84 85 // update the scheduler state, and makes the task switch 86 _scheduler[proc_id].current = next_task_id; 87 _task_switch( curr_context, next_context ); 81 next_context = &(_scheduler[pid].context[next_task_id][0]); 88 82 89 83 #if GIET_DEBUG_SWITCH 90 unsigned int time = _proctime();84 _get_lock( &_tty_put_lock ); 91 85 _puts( "\n[GIET] Context switch for processor "); 92 _putw( p roc_id );86 _putw( pid ); 93 87 _puts( " at cycle "); 94 88 _putw( time ); … … 103 97 _putw( next_task_id ); 104 98 _puts("\n"); 99 _release_lock( &_tty_put_lock ); 105 100 #endif 101 102 // update the scheduler state, and makes the task switch 103 _scheduler[pid].current = next_task_id; 104 _task_switch( curr_context, next_context ); 106 105 107 106 } // end _ctx_switch -
soft/giet_vm/sys/ctx_handler.h
r158 r165 11 11 { 12 12 unsigned int context[GIET_NB_TASKS_MAX][64]; // task contexts 13 unsigned int tasks; // actual number of tasks14 unsigned int current; // current task index13 unsigned int tasks; // actual number of tasks 14 unsigned int current; // current task index 15 15 } static_scheduler_t; 16 16 -
soft/giet_vm/sys/drivers.c
r160 r165 16 16 // 17 17 // The following global parameters must be defined in the giet_config.h file: 18 // - NB_PROCS : number of PROCS per cluster (if not zero) 19 // - NB_DMAS : number of DMA channels per cluster (if not zero) 20 // - NB_TIMERS : number of TIMERS per cluster (if not zero) 21 // - NB_TTYS : number of TTY terminals per cluster (if not zero) 18 // - NB_CLUSTERS : number of clusters 19 // - NB_PROCS : number of PROCS per cluster 20 // - NB_TIMERS : number of TIMERS per cluster 21 // - NB_DMAS : number of DMA channels 22 // - NB_TTYS : number of TTY terminals 23 // - NB_TIMERS : number of TIMERS per cluster 24 // - CLUSTER_SPAN : address increment between clusters 22 25 // 23 26 // The following base addresses must be defined in the sys.ld file: … … 58 61 #endif 59 62 63 #if (NB_TTYS < 1) 64 # error: NB_TTYS cannot be smaller than 1! 65 #endif 66 67 #if (NB_TIMERS < NB_PROCS) 68 # error: NB_TIMERS must be larger or equal to NB_PROCS! 69 #endif 70 71 #if (NB_PROCS > 8) 72 # error: NB_PROCS cannot be larger than 8! 73 #endif 74 75 #if (NB_DMAS < 1) 76 # error: NB_DMAS cannot be 0! 77 #endif 78 79 60 80 ///////////////////////////////////////////////////////////////////////////// 61 81 // Global (uncachable) variables … … 71 91 in_unckdata volatile unsigned int _ioc_lock = 0; 72 92 73 in_unckdata volatile unsigned int _tty_lock[NB_TTYS] = { [0 ... NB_TTYS-1] = 0 };74 93 in_unckdata volatile unsigned char _tty_get_buf[NB_TTYS]; 75 94 in_unckdata volatile unsigned char _tty_get_full[NB_TTYS] = { [0 ... NB_TTYS-1] = 0 }; 95 in_unckdata unsigned int _tty_put_lock; 76 96 77 97 ////////////////////////////////////////////////////////////////////////////// 78 98 // VciMultiTimer driver 79 99 ////////////////////////////////////////////////////////////////////////////// 80 // The number of independant timers per cluster is defined by the 81 // configuration parameter NB_TIMERS. 100 // There is one MULTI-TIMER component per cluster. 101 // The number of timers per cluster must be larger or equal to the number 102 // processors (NB_TIMERS >= NB_PROCS), because each processor uses a private 103 // yimer for context switch. 82 104 // The total number of timers is NB_CLUSTERS * NB_TIMERS 83 // The global timer index = cluster_id*NB_TIMER + timer_id105 // The global timer index = cluster_id*NB_TIMERS + timer_id 84 106 ////////////////////////////////////////////////////////////////////////////// 85 107 … … 87 109 // _timer_write() 88 110 // 89 // Write a 32-bit word in a memory mapped register of a timer device. 90 // Returns 0 if success, > 0 if error. 91 ////////////////////////////////////////////////////////////////////////////// 92 unsigned int _timer_write( unsigned int global_timer_index, 111 // Write a 32-bit word in a memory mapped register of a timer device, 112 // identified by the cluster index and the local timer index. 113 // Returns 0 if success, > 0 if error. 114 ////////////////////////////////////////////////////////////////////////////// 115 unsigned int _timer_write( unsigned int cluster_index, 116 unsigned int timer_index, 93 117 unsigned int register_index, 94 118 unsigned int value ) 95 119 { 96 volatile unsigned int *timer_address; 97 98 unsigned int cluster_id = global_timer_index / NB_TIMERS; 99 unsigned int timer_id = global_timer_index % NB_TIMERS; 100 101 /* parameters checking */ 102 if ( register_index >= TIMER_SPAN) return 1; 103 if ( global_timer_index >= NB_CLUSTERS*NB_TIMERS ) return 1; 120 unsigned int* timer_address; 121 122 // parameters checking 123 if ( register_index >= TIMER_SPAN) return 1; 124 if ( cluster_index >= NB_CLUSTERS) return 1; 125 if ( timer_index >= NB_TIMERS ) return 1; 104 126 105 127 timer_address = (unsigned int*)&seg_timer_base + 106 ( cluster_i d* CLUSTER_SPAN ) +107 ( timer_i d* TIMER_SPAN );108 109 timer_address[register_index] = value; / * write word */128 ( cluster_index * CLUSTER_SPAN ) + 129 ( timer_index * TIMER_SPAN ); 130 131 timer_address[register_index] = value; // write word 110 132 111 133 return 0; … … 115 137 // _timer_read() 116 138 // 117 // Read a 32-bit word in a memory mapped register of a timer device. 118 // Returns 0 if success, > 0 if error. 119 ////////////////////////////////////////////////////////////////////////////// 120 unsigned int _timer_read(unsigned int global_timer_index, 139 // Read a 32-bit word in a memory mapped register of a timer device, 140 // identified by the cluster index and the local timer index. 141 // Returns 0 if success, > 0 if error. 142 ////////////////////////////////////////////////////////////////////////////// 143 unsigned int _timer_read(unsigned int cluster_index, 144 unsigned int timer_index, 121 145 unsigned int register_index, 122 146 unsigned int *buffer) 123 147 { 124 volatile unsigned int *timer_address; 125 126 unsigned int cluster_id = global_timer_index / NB_TIMERS; 127 unsigned int timer_id = global_timer_index % NB_TIMERS; 128 129 /* parameters checking */ 130 if ( register_index >= TIMER_SPAN) return 1; 131 if ( global_timer_index >= NB_CLUSTERS*NB_TIMERS ) return 1; 148 unsigned int *timer_address; 149 150 // parameters checking 151 if ( register_index >= TIMER_SPAN) return 1; 152 if ( cluster_index >= NB_CLUSTERS) return 1; 153 if ( timer_index >= NB_TIMERS ) return 1; 132 154 133 155 timer_address = (unsigned int*)&seg_timer_base + 134 ( cluster_i d* CLUSTER_SPAN ) +135 ( timer_i d* TIMER_SPAN );136 137 *buffer = timer_address[register_index]; / * read word */156 ( cluster_index * CLUSTER_SPAN ) + 157 ( timer_index * TIMER_SPAN ); 158 159 *buffer = timer_address[register_index]; // read word 138 160 139 161 return 0; … … 146 168 // The system terminal is TTY[0]. 147 169 // The TTYs are allocated to applications by the GIET in the boot phase. 148 // The nummber of TTYs allocated to each application, and the TTYused by each170 // The nummber of TTYs allocated to each application, and used by each 149 171 // task can be defined in the mapping_info data structure. 150 172 // For each user task, the tty_id is stored in the context of the task (slot 34), … … 152 174 // The TTY address is always computed as : seg_tty_base + tty_id*TTY_SPAN 153 175 /////////////////////////////////////////////////////////////////////////////////// 154 155 ///////////////////////////////////////////////////////////////////////////////////156 // tty_get_lock()157 //158 // This blocking function is intended to be used by the _tty_write() function159 // to provide exclusive access to the TTY. It is not used yet, because it appears160 // that it creates livelock situations...161 ///////////////////////////////////////////////////////////////////////////////////162 static inline void _tty_get_lock( unsigned int tty_id )163 {164 register unsigned int delay = (_proctime() & 0xF) << 4;165 register unsigned int *plock = (unsigned int*)&_tty_lock[tty_id];166 167 asm volatile (168 "_tty_llsc: \n"169 "ll $2, 0(%0) \n" /* $2 <= _tty_lock current value */170 "bnez $2, _tty_delay \n" /* delay if _tty_lock already taken */171 "li $3, 1 \n" /* $3 <= argument for sc */172 "sc $3, 0(%0) \n" /* try to set _tty_lock */173 "bnez $3, _tty_ok \n" /* exit if atomic */174 "_tty_delay: \n"175 "move $4, %1 \n" /* $4 <= delay */176 "_tty_loop: \n"177 "addi $4, $4, -1 \n" /* $4 <= $4 - 1 */178 "beqz $4, _tty_loop \n" /* test end delay */179 "j _tty_llsc \n" /* retry */180 "_tty_ok: \n"181 :182 :"r"(plock), "r"(delay)183 :"$2", "$3", "$4");184 }185 176 186 177 ////////////////////////////////////////////////////////////////////////////// … … 194 185 // The function returns the number of characters that have been written. 195 186 ////////////////////////////////////////////////////////////////////////////// 196 unsigned int _tty_write(const char *buffer, unsigned int length) 187 unsigned int _tty_write( const char *buffer, 188 unsigned int length) 197 189 { 198 190 volatile unsigned int *tty_address; … … 212 204 for (nwritten = 0; nwritten < length; nwritten++) 213 205 { 214 / * check tty's status */206 // check tty's status 215 207 if ((tty_address[TTY_STATUS] & 0x2) == 0x2) 216 208 break; 217 209 else 218 / * write character */210 // write character 219 211 tty_address[TTY_WRITE] = (unsigned int)buffer[nwritten]; 220 212 } … … 226 218 // 227 219 // This non-blocking function uses the TTY_GET_IRQ[tty_id] interrupt and 228 // the associated //kernel buffer, that has been written by the ISR.220 // the associated kernel buffer, that has been written by the ISR. 229 221 // It fetches one single character from the _tty_get_buf[tty_id] kernel 230 222 // buffer, writes this character to the user buffer, and resets the … … 232 224 // Returns 0 if the kernel buffer is empty, 1 if the buffer is full. 233 225 ////////////////////////////////////////////////////////////////////////////// 234 unsigned int _tty_read_irq(char *buffer, unsigned int length) 226 unsigned int _tty_read_irq( char *buffer, 227 unsigned int length) 235 228 { 236 229 unsigned int proc_id; … … 262 255 // register of the TTY controler, and writes this character to the user buffer. 263 256 // It doesn't use the TTY_GET_IRQ interrupt and the associated kernel buffer. 264 // It doesn't take the lock protecting exclusive access...265 257 // Returns 0 if the register is empty, 1 if the register is full. 266 258 //////////////////////////////////////////////////////////////////////////////// 267 unsigned int _tty_read(char *buffer, unsigned int length) 259 unsigned int _tty_read( char *buffer, 260 unsigned int length) 268 261 { 269 262 volatile unsigned int *tty_address; … … 296 289 // _icu_write() 297 290 // 298 // Write a 32-bit word in a memory mapped register of the ICU device. The 299 // base address is deduced by the proc_id. 300 // Returns 0 if success, > 0 if error. 301 //////////////////////////////////////////////////////////////////////////////// 302 unsigned int _icu_write(unsigned int register_index, unsigned int value) 303 { 304 volatile unsigned int *icu_address; 305 unsigned int proc_id; 306 307 /* parameters checking */ 308 if (register_index >= ICU_END) 309 return 1; 310 311 proc_id = _procid(); 312 icu_address = (unsigned int*)&seg_icu_base + (proc_id * ICU_SPAN); 313 icu_address[register_index] = value; /* write word */ 291 // Write a 32-bit word in a memory mapped register of the MULTI_ICU device, 292 // identified by the cluster index, and a processor local index. 293 // Returns 0 if success, > 0 if error. 294 //////////////////////////////////////////////////////////////////////////////// 295 unsigned int _icu_write( unsigned int cluster_index, 296 unsigned int proc_index, 297 unsigned int register_index, 298 unsigned int value ) 299 { 300 unsigned int *icu_address; 301 302 // parameters checking 303 if ( register_index >= ICU_SPAN) return 1; 304 if ( cluster_index >= NB_CLUSTERS) return 1; 305 if ( proc_index >= NB_PROCS ) return 1; 306 307 icu_address = (unsigned int*)&seg_icu_base + 308 ( cluster_index * CLUSTER_SPAN ) + 309 ( proc_index * ICU_SPAN ); 310 311 icu_address[register_index] = value; // write word 314 312 return 0; 315 313 } … … 318 316 // _icu_read() 319 317 // 320 // Read a 32-bit word in a memory mapped register of the ICU device. The 321 // ICU base address is deduced by the proc_id. 322 // Returns 0 if success, > 0 if error. 323 //////////////////////////////////////////////////////////////////////////////// 324 unsigned int _icu_read(unsigned int register_index, unsigned int *buffer) 325 { 326 volatile unsigned int *icu_address; 327 unsigned int proc_id; 328 329 /* parameters checking */ 330 if (register_index >= ICU_END) 331 return 1; 332 333 proc_id = _procid(); 334 icu_address = (unsigned int*)&seg_icu_base + (proc_id * ICU_SPAN); 335 *buffer = icu_address[register_index]; /* read word */ 318 // Read a 32-bit word in a memory mapped register of the MULTI_ICU device, 319 // identified by the cluster index and a processor local index. 320 // Returns 0 if success, > 0 if error. 321 //////////////////////////////////////////////////////////////////////////////// 322 unsigned int _icu_read( unsigned int cluster_index, 323 unsigned int proc_index, 324 unsigned int register_index, 325 unsigned int* buffer ) 326 { 327 unsigned int *icu_address; 328 329 // parameters checking 330 if ( register_index >= ICU_SPAN) return 1; 331 if ( cluster_index >= NB_CLUSTERS) return 1; 332 if ( proc_index >= NB_PROCS ) return 1; 333 334 icu_address = (unsigned int*)&seg_icu_base + 335 ( cluster_index * CLUSTER_SPAN ) + 336 ( proc_index * ICU_SPAN ); 337 338 *buffer = icu_address[register_index]; // read word 336 339 return 0; 337 340 } … … 341 344 //////////////////////////////////////////////////////////////////////////////// 342 345 // The Greater Dommon Divider is a -very- simple hardware coprocessor 343 // performing the computation of aGCD of two 32 bits integers.346 // performing the computation of the GCD of two 32 bits integers. 344 347 // It has no DMA capability. 345 348 //////////////////////////////////////////////////////////////////////////////// … … 351 354 // Returns 0 if success, > 0 if error. 352 355 //////////////////////////////////////////////////////////////////////////////// 353 unsigned int _gcd_write(unsigned int register_index, unsigned int value) 356 unsigned int _gcd_write( unsigned int register_index, 357 unsigned int value) 354 358 { 355 359 volatile unsigned int *gcd_address; 356 360 357 / * parameters checking */361 // parameters checking 358 362 if (register_index >= GCD_END) 359 363 return 1; 360 364 361 365 gcd_address = (unsigned int*)&seg_gcd_base; 362 gcd_address[register_index] = value; /* write word */ 366 367 gcd_address[register_index] = value; // write word 363 368 return 0; 364 369 } … … 370 375 // Returns 0 if success, > 0 if error. 371 376 //////////////////////////////////////////////////////////////////////////////// 372 unsigned int _gcd_read(unsigned int register_index, unsigned int *buffer) 377 unsigned int _gcd_read( unsigned int register_index, 378 unsigned int *buffer) 373 379 { 374 380 volatile unsigned int *gcd_address; 375 381 376 / * parameters checking */382 // parameters checking 377 383 if (register_index >= GCD_END) 378 384 return 1; 379 385 380 386 gcd_address = (unsigned int*)&seg_gcd_base; 381 *buffer = gcd_address[register_index]; /* read word */ 387 388 *buffer = gcd_address[register_index]; // read word 382 389 return 0; 383 390 } … … 386 393 // VciBlockDevice driver 387 394 //////////////////////////////////////////////////////////////////////////////// 388 // The VciBlockDevice is a si mpleexternal storage contrÃŽler.395 // The VciBlockDevice is a single channel external storage contrÃŽler. 389 396 // The three functions below use the three variables _ioc_lock _ioc_done, and 390 // _ioc_status for synchron sation.397 // _ioc_status for synchronisation. 391 398 // As the IOC component can be used by several programs running in parallel, 392 399 // the _ioc_lock variable guaranties exclusive access to the device. The … … 429 436 "move $4, %1 \n" /* $4 <= delay */ 430 437 "_ioc_loop: \n" 438 "beqz $4, _ioc_loop \n" /* test end delay */ 431 439 "addi $4, $4, -1 \n" /* $4 <= $4 - 1 */ 432 " beqz $4, _ioc_loop \n" /* test end delay*/433 " j _ioc_llsc \n" /* retry */440 "j _ioc_llsc \n" /* retry ll */ 441 "nop \n" 434 442 "_ioc_ok: \n" 435 443 : -
soft/giet_vm/sys/drivers.h
r158 r165 6 6 /////////////////////////////////////////////////////////////////////////////////// 7 7 8 #ifndef _ DRIVERS_H_9 #define _ DRIVERS_H_8 #ifndef _GIET_SYS_DRIVERS_H_ 9 #define _GIET_SYS_DRIVERS_H_ 10 10 11 11 /////////////////////////////////////////////////////////////////////////////////// … … 22 22 extern volatile unsigned char _tty_get_buf[]; 23 23 extern volatile unsigned char _tty_get_full[]; 24 extern unsigned int _tty_put_lock; 24 25 25 26 /////////////////////////////////////////////////////////////////////////////////// 26 // Prototypes of the driversfunctions.27 // Prototypes of the external functions. 27 28 /////////////////////////////////////////////////////////////////////////////////// 28 29 29 unsigned int _timer_write(unsigned int global, unsigned int reg, unsigned int value); 30 unsigned int _timer_read(unsigned int global, unsigned int reg, unsigned int *buffer); 30 unsigned int _timer_write( unsigned int cluster_id, 31 unsigned int timer_id, 32 unsigned int register_id, 33 unsigned int value); 31 34 32 unsigned int _tty_write(const char *buffer, unsigned int length); 33 unsigned int _tty_read(char *buffer, unsigned int length); 34 unsigned int _tty_read_irq(char *buffer, unsigned int length); 35 unsigned int _timer_read( unsigned int cluster_id, 36 unsigned int timer_id, 37 unsigned int register_id, 38 unsigned int* buffer); 35 39 36 unsigned int _ioc_write(unsigned int lba, const void *buffer, unsigned int count); 37 unsigned int _ioc_read(unsigned int lba, void *buffer, unsigned int count); 40 unsigned int _icu_write( unsigned int cluster_id, 41 unsigned int proc_id, 42 unsigned int register_id, 43 unsigned int value); 44 45 unsigned int _icu_read( unsigned int cluster_id, 46 unsigned int proc_id, 47 unsigned int register_id, 48 unsigned int* buffer); 49 50 unsigned int _tty_write( const char* buffer, 51 unsigned int length); 52 53 unsigned int _tty_read( char* buffer, 54 unsigned int length); 55 56 unsigned int _tty_read_irq( char* buffer, 57 unsigned int length); 58 59 unsigned int _ioc_write( unsigned int lba, 60 const void* buffer, 61 unsigned int count); 62 63 unsigned int _ioc_read( unsigned int lba, 64 void* buffer, 65 unsigned int count); 66 38 67 unsigned int _ioc_completed(); 39 68 40 unsigned int _ icu_write(unsigned int register_index, unsigned int value);41 unsigned int _icu_read(unsigned int register_index, unsigned int *buffer);69 unsigned int _gcd_write( unsigned int register_index, 70 unsigned int value); 42 71 43 unsigned int _gcd_ write(unsigned int register_index, unsigned int value);44 unsigned int _gcd_read(unsigned int register_index, unsigned int *buffer);72 unsigned int _gcd_read( unsigned int register_index, 73 unsigned int* buffer); 45 74 46 unsigned int _fb_sync_write(unsigned int offset, const void *buffer, unsigned int length); 47 unsigned int _fb_sync_read(unsigned int offset, const void *buffer, unsigned int length); 48 unsigned int _fb_write(unsigned int offset, const void *buffer, unsigned int length); 49 unsigned int _fb_read(unsigned int offset, const void *buffer, unsigned int length); 75 unsigned int _fb_sync_write(unsigned int offset, 76 const void* buffer, 77 unsigned int length); 78 79 unsigned int _fb_sync_read( unsigned int offset, 80 const void* buffer, 81 unsigned int length); 82 83 unsigned int _fb_write( unsigned int offset, 84 const void* buffer, 85 unsigned int length); 86 87 unsigned int _fb_read( unsigned int offset, 88 const void* buffer, 89 unsigned int length); 90 50 91 unsigned int _fb_completed(); 51 92 -
soft/giet_vm/sys/giet.s
r158 r165 26 26 mfc0 $27, $13 /* $27 <= Cause register */ 27 27 la $26, _cause_vector /* $26 <= _cause_vector */ 28 andi $27, $27, 0x3c /* $27 <= XCODE*4 */29 addu $26, $26, $27 /* $26 <= &_cause_vector[XCODE] */28 andi $27, $27, 0x3c /* $27 <= XCODE*4 */ 29 addu $26, $26, $27 /* $26 <= &_cause_vector[XCODE] */ 30 30 lw $26, ($26) /* $26 <= _cause_vector[XCODE] */ 31 31 jr $26 /* Jump indexed by XCODE */ -
soft/giet_vm/sys/irq_handler.c
r160 r165 29 29 // This functions uses an external ICU component (Interrupt Controler Unit) 30 30 // that concentrates up to 32 input interrupts lines. This component 31 // can support up to NB_PROCS _MAXoutput IRQ.31 // can support up to NB_PROCS output IRQ. 32 32 // 33 33 // This component returns the highest priority active interrupt index (smaller … … 38 38 // The interrupt vector (32 ISR addresses array stored at _interrupt_vector 39 39 // address) is initialised with the default ISR address. The actual ISR 40 // addresses are supposed to be written in the interrupt vector array by the41 // boot code.40 // addresses are supposed to be written in the interrupt vector array 41 // during system initialisation. 42 42 /////////////////////////////////////////////////////////////////////////////////// 43 43 void _int_demux(void) 44 44 { 45 int interrupt_index; 46 _isr_func_t isr; 47 48 // interrupt vector initialisation 49 50 51 /* retrieves the highest priority active interrupt index */ 52 if (!_icu_read(ICU_IT_VECTOR, (unsigned int*)&interrupt_index)) 45 int interrupt_index; 46 _isr_func_t isr; 47 unsigned int pid = _procid(); 48 49 // retrieves the highest priority active interrupt index 50 if (!_icu_read( pid / NB_PROCS, 51 pid % NB_PROCS, 52 ICU_IT_VECTOR, 53 (unsigned int*)&interrupt_index ) ) 53 54 { 54 /* no interrupt is active */ 55 if (interrupt_index == -1) 55 if (interrupt_index == -1) // no interrupt is active 56 56 return; 57 57 58 /* call the ISR corresponding to this index */59 58 isr = _interrupt_vector[interrupt_index]; 60 59 isr(); 61 60 } 61 else 62 { 63 _puts("\n[GIET ERROR] In _demux function : wrong arguments in _icu_read()\n"); 64 _exit(); 65 } 62 66 } 63 67 /////////////////////////////////////////////////////////////////////////////////// … … 70 74 _puts("\n\n!!! Default ISR !!!\n"); 71 75 } 76 72 77 /////////////////////////////////////////////////////////////////////////////////// 73 78 // _isr_dma() 74 // This ISR acknowledges the interrupt from the dma controller, depending on75 // the proc_id. It reset the global variable _dma_busy[i] for software76 // signaling, after copying the DMAstatus into the _dma_status[i] variable.77 /////////////////////////////////////////////////////////////////////////////////// 78 void _isr_dma ()79 // This ISR handles up to 8 IRQs generated by 8 independant channels of the 80 // multi_dma component. It acknowledges the interrupt and reset the synchronisation 81 // variable _dma_busy[i], after copying the status into the _dma_status[i] variable. 82 /////////////////////////////////////////////////////////////////////////////////// 83 void _isr_dma_indexed( unsigned int dma_id ) 79 84 { 80 85 volatile unsigned int* dma_address; 81 unsigned int proc_id; 82 83 proc_id = _procid(); 84 dma_address = (unsigned int*)&seg_dma_base + (proc_id * DMA_SPAN); 85 86 _dma_status[proc_id] = dma_address[DMA_LEN]; /* save status */ 87 _dma_busy[proc_id] = 0; /* release DMA */ 88 dma_address[DMA_RESET] = 0; /* reset IRQ */ 89 } 86 87 dma_address = (unsigned int*)&seg_dma_base + (dma_id * DMA_SPAN); 88 89 dma_address[DMA_RESET] = 0; /* reset IRQ */ 90 91 _dma_status[dma_id] = dma_address[DMA_LEN]; /* save status */ 92 _dma_busy[dma_id] = 0; /* release DMA */ 93 } 94 95 void _isr_dma_0() { _isr_dma_indexed(0); } 96 void _isr_dma_1() { _isr_dma_indexed(1); } 97 void _isr_dma_2() { _isr_dma_indexed(2); } 98 void _isr_dma_3() { _isr_dma_indexed(3); } 99 void _isr_dma_4() { _isr_dma_indexed(4); } 100 void _isr_dma_5() { _isr_dma_indexed(5); } 101 void _isr_dma_6() { _isr_dma_indexed(6); } 102 void _isr_dma_7() { _isr_dma_indexed(7); } 103 90 104 /////////////////////////////////////////////////////////////////////////////////// 91 105 // _isr_ioc() … … 103 117 _ioc_done = 1; /* signals completion */ 104 118 } 119 105 120 /////////////////////////////////////////////////////////////////////////////////// 106 121 // _isr_timer_* (* = 0,1,2,3,4,5,6,7) -
soft/giet_vm/sys/irq_handler.h
r158 r165 18 18 void _isr_default(); 19 19 20 void _isr_dma(); 20 void _isr_dma_0(); 21 void _isr_dma_1(); 22 void _isr_dma_2(); 23 void _isr_dma_3(); 24 void _isr_dma_4(); 25 void _isr_dma_5(); 26 void _isr_dma_6(); 27 void _isr_dma_7(); 21 28 22 29 void _isr_ioc(); 23 30 24 void _isr_timer0(); 25 void _isr_timer1(); 26 void _isr_timer2(); 27 void _isr_timer3(); 31 void _isr_timer_0(); 32 void _isr_timer_1(); 33 void _isr_timer_2(); 34 void _isr_timer_3(); 35 void _isr_timer_4(); 36 void _isr_timer_5(); 37 void _isr_timer_6(); 38 void _isr_timer_7(); 28 39 29 40 void _isr_tty_get(); -
soft/giet_vm/sys/mips32_registers.h
r158 r165 73 73 #define CP2_PARAMS $15 74 74 #define CP2_RELEASE $16 75 #define CP2_DATA_LO 76 #define CP2_DATA_HI 75 #define CP2_DATA_LO $17 76 #define CP2_DATA_HI $18 77 77 #define CP2_ICACHE_INVAL_PA $19 78 78 #define CP2_DCACHE_INVAL_PA $20 … … 87 87 #define CTX_PTPR_ID 35 88 88 #define CTX_MODE_ID 36 89 #define CTX_FBDMA_ID 37 90 #define CTX_TASK_ID 63 89 91 90 92 -
soft/giet_vm/sys/sys.ld
r160 r165 10 10 seg_kernel_uncdata_base = 0x80020000; /* system uncacheable data */ 11 11 seg_kernel_init_base = 0x80030000; /* system page table */ 12 seg_mapping_base = 0xBFC0C000; /* boot mapping_info */ 12 13 13 14 … … 22 23 seg_fb_base = 0x96000000; /* FrameBuffer device */ 23 24 seg_icu_base = 0x9F000000; /* ICU device */ 24 25 /*****************************************/26 seg_mapping_base = 0xBFC0C000; /* boot mapping_info */27 25 28 26 /* … … 65 63 seg_kernel_init : 66 64 { 67 *(.kinitentry)68 65 *(.kinit) 69 66 } -
soft/giet_vm/sys/sys_handler.c
r163 r165 83 83 _puts(" on processor "); 84 84 _putw( proc_id ); 85 _puts("\n\n"); 85 86 86 87 /* infinite loop */ … … 96 97 unsigned int ret; 97 98 asm volatile("mfc0 %0, $15, 1" : "=r"(ret)); 98 return (ret & 0x 3FF);99 return (ret & 0xFFF); 99 100 } 100 101 ////////////////////////////////////////////////////////////////////////////// … … 132 133 ///////////////////////////////////////////////////////////////////////////// 133 134 // _vobj_get_vbase() 135 // This function writes in vobj_buffer the virtual base address of a vobj 136 // identified by the (vspace_name / vobj_name ) couple. 137 // The vobj_type argument is redundant, and for checking purpose. 134 138 // returns 0: success, else: failed. 135 // return the virtual base address of a vobj identified by the (vspace_name / channel_name ) couple.136 // The "type" argument is here for checking purpose.137 139 ///////////////////////////////////////////////////////////////////////////// 138 unsigned int _vobj_get_vbase( char* vspace_name, char* vobj_name, 139 unsigned vobj_type, unsigned int* vobj_buffer) 140 unsigned int _vobj_get_vbase( char* vspace_name, 141 char* vobj_name, 142 unsigned int vobj_type, 143 unsigned int* vobj_vaddr ) 140 144 { 141 145 mapping_header_t* header = (mapping_header_t*)&seg_mapping_base; … … 153 157 { 154 158 // scan vobjs 155 for(vobj_id= vspace[vspace_id].vobj_offset; vobj_id < (vspace[vspace_id].vobj_offset + vspace[vspace_id].vobjs); vobj_id++) 159 for( vobj_id = vspace[vspace_id].vobj_offset; 160 vobj_id < (vspace[vspace_id].vobj_offset + vspace[vspace_id].vobjs); 161 vobj_id++) 156 162 { 157 163 … … 159 165 { 160 166 if(vobj[vobj_id].type != vobj_type) 161 return -1; //wrong type167 return -1; //wrong type 162 168 163 *vobj_ buffer = (unsigned int)vobj[vobj_id].vaddr;169 *vobj_vaddr = (unsigned int)vobj[vobj_id].vaddr; 164 170 return 0; 165 171 } … … 167 173 } 168 174 } 169 return -2; //not found175 return -2; //not found 170 176 } 171 177
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