Changeset 228 for soft/giet_vm/sys/drivers.c
- Timestamp:
- Feb 12, 2013, 6:33:31 PM (11 years ago)
- File:
-
- 1 edited
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soft/giet_vm/sys/drivers.c
r226 r228 103 103 104 104 ////////////////////////////////////////////////////////////////////////////// 105 // 105 // Timers driver 106 106 ////////////////////////////////////////////////////////////////////////////// 107 107 // The timers can be implemented in a vci_timer component or in a vci_xicu … … 119 119 120 120 #if (NB_TIMERS_MAX > 0) 121 in_unckdata volatile unsigned char _user_timer_event[NB_CLUSTERS *NB_TIMERS_MAX]122 = { [0 ... ((NB_CLUSTERS*NB_TIMERS_MAX)-1)] = 0 };121 in_unckdata volatile unsigned char _user_timer_event[NB_CLUSTERS * NB_TIMERS_MAX] 122 = { [0 ... ((NB_CLUSTERS * NB_TIMERS_MAX) - 1)] = 0 }; 123 123 #endif 124 124 … … 131 131 // Returns 0 if success, > 0 if error. 132 132 ////////////////////////////////////////////////////////////////////////////// 133 unsigned int _timer_start( unsigned int cluster_id, 134 unsigned int local_id, 135 unsigned int period ) 136 { 133 unsigned int _timer_start(unsigned int cluster_id, unsigned int local_id, unsigned int period) { 137 134 // parameters checking 138 if ( cluster_id >= NB_CLUSTERS) return 1; 139 if ( local_id >= NB_TIMERS_MAX) return 2; 135 if (cluster_id >= NB_CLUSTERS) { 136 return 1; 137 } 138 if (local_id >= NB_TIMERS_MAX) { 139 return 2; 140 } 140 141 141 142 #if USE_XICU 142 unsigned int* timer_address = (unsigned int*)((char*)&seg_icu_base + 143 (cluster_id * CLUSTER_SIZE) ); 143 unsigned int * timer_address = (unsigned int *) ((char *) &seg_icu_base + (cluster_id * CLUSTER_SIZE)); 144 144 145 145 timer_address[XICU_REG(XICU_PTI_PER, local_id)] = period; 146 146 #else 147 unsigned int* timer_address = (unsigned int*)((char*)&seg_tim_base + 148 (cluster_id * CLUSTER_SIZE) ); 147 unsigned int* timer_address = (unsigned int *) ((char *) &seg_tim_base + (cluster_id * CLUSTER_SIZE)); 149 148 150 149 timer_address[local_id * TIMER_SPAN + TIMER_PERIOD] = period; 151 timer_address[local_id * TIMER_SPAN + TIMER_MODE] = 0x3; 152 #endif 153 154 return 0; 155 } 150 timer_address[local_id * TIMER_SPAN + TIMER_MODE] = 0x3; 151 #endif 152 return 0; 153 } 154 155 156 156 ////////////////////////////////////////////////////////////////////////////// 157 157 // _timer_stop() … … 160 160 // Returns 0 if success, > 0 if error. 161 161 ////////////////////////////////////////////////////////////////////////////// 162 unsigned int _timer_stop( unsigned int cluster_id, 163 unsigned int local_id ) 164 { 162 unsigned int _timer_stop(unsigned int cluster_id, unsigned int local_id) { 165 163 // parameters checking 166 if ( cluster_id >= NB_CLUSTERS) return 1; 167 if ( local_id >= NB_TIMERS_MAX ) return 2; 164 if (cluster_id >= NB_CLUSTERS) { 165 return 1; 166 } 167 if (local_id >= NB_TIMERS_MAX) { 168 return 2; 169 } 168 170 169 171 #if USE_XICU 170 unsigned int* timer_address = (unsigned int*)((char*)&seg_icu_base + 171 (cluster_id * CLUSTER_SIZE) ); 172 unsigned int * timer_address = (unsigned int *) ((char *) &seg_icu_base + (cluster_id * CLUSTER_SIZE)); 172 173 173 174 timer_address[XICU_REG(XICU_PTI_PER, local_id)] = 0; 174 175 #else 175 unsigned int* timer_address = (unsigned int*)((char*)&seg_tim_base + 176 (cluster_id * CLUSTER_SIZE) ); 177 176 unsigned int* timer_address = (unsigned int *) ((char *) &seg_tim_base + (cluster_id * CLUSTER_SIZE)); 178 177 timer_address[local_id * TIMER_SPAN + TIMER_MODE] = 0; 179 178 #endif 180 181 return 0; 182 } 179 return 0; 180 } 181 182 183 183 ////////////////////////////////////////////////////////////////////////////// 184 184 // _timer_reset_irq() … … 189 189 // Returns 0 if success, > 0 if error. 190 190 ////////////////////////////////////////////////////////////////////////////// 191 unsigned int _timer_reset_irq( unsigned int cluster_id, 192 unsigned int local_id ) 193 { 191 unsigned int _timer_reset_irq(unsigned int cluster_id, unsigned int local_id) { 194 192 // parameters checking 195 if ( cluster_id >= NB_CLUSTERS) return 1; 196 if ( local_id >= NB_TIMERS_MAX ) return 2; 193 if (cluster_id >= NB_CLUSTERS) { 194 return 1; 195 } 196 if (local_id >= NB_TIMERS_MAX) { 197 return 2; 198 } 197 199 198 200 #if USE_XICU 199 unsigned int * timer_address = (unsigned int*)((char*)&seg_icu_base +200 (cluster_id * (unsigned)CLUSTER_SIZE));201 unsigned int * timer_address = (unsigned int *) ((char *) &seg_icu_base + 202 (cluster_id * (unsigned) CLUSTER_SIZE)); 201 203 202 204 unsigned int bloup = timer_address[XICU_REG(XICU_PTI_ACK, local_id)]; 203 bloup++; 205 bloup++; // to avoid a warning 204 206 #else 205 unsigned int * timer_address = (unsigned int*)((char*)&seg_tim_base +206 (cluster_id * CLUSTER_SIZE));207 unsigned int * timer_address = (unsigned int *)((char *) &seg_tim_base + 208 (cluster_id * CLUSTER_SIZE)); 207 209 208 210 timer_address[local_id * TIMER_SPAN + TIMER_RESETIRQ] = 0; … … 212 214 } 213 215 216 214 217 ///////////////////////////////////////////////////////////////////////////////// 215 // 218 // VciMultiTty driver 216 219 ///////////////////////////////////////////////////////////////////////////////// 217 220 // There is only one multi_tty controler in the architecture. … … 226 229 // TTY variables 227 230 in_unckdata volatile unsigned char _tty_get_buf[NB_TTYS]; 228 in_unckdata volatile unsigned char _tty_get_full[NB_TTYS] = { [0 ... NB_TTYS -1] = 0 };229 in_unckdata unsigned int 231 in_unckdata volatile unsigned char _tty_get_full[NB_TTYS] = { [0 ... NB_TTYS - 1] = 0 }; 232 in_unckdata unsigned int _tty_put_lock = 0; // protect kernel TTY[0] 230 233 231 234 //////////////////////////////////////////////////////////////////////////////// 232 235 // _tty_error() 233 236 //////////////////////////////////////////////////////////////////////////////// 234 void _tty_error( unsigned int tty_id, unsigned int task_id ) 235 { 237 void _tty_error(unsigned int tty_id, unsigned int task_id) { 236 238 unsigned int proc_id = _procid(); 237 239 238 240 _get_lock(&_tty_put_lock); 239 if ( tty_id == 0xFFFFFFFF )241 if (tty_id == 0xFFFFFFFF) { 240 242 _puts("\n[GIET ERROR] no TTY assigned to the task "); 241 else 243 } 244 else { 242 245 _puts("\n[GIET ERROR] TTY index too large for task "); 243 _putd( task_id ); 246 } 247 _putd(task_id); 244 248 _puts(" on processor "); 245 _putd( proc_id);249 _putd(proc_id); 246 250 _puts("\n"); 247 251 _release_lock(&_tty_put_lock); 248 252 } 253 254 249 255 ///////////////////////////////////////////////////////////////////////////////// 250 256 // _tty_write() … … 256 262 // The function returns the number of characters that have been written. 257 263 ///////////////////////////////////////////////////////////////////////////////// 258 unsigned int _tty_write( const char *buffer, 259 unsigned int length) 260 { 261 unsigned int nwritten; 262 263 unsigned int task_id = _get_current_task_id(); 264 unsigned int tty_id = _get_context_slot(task_id, CTX_TTY_ID); 265 266 if ( tty_id >= NB_TTYS ) 267 { 268 _tty_error( tty_id , task_id ); 264 unsigned int _tty_write(const char * buffer, unsigned int length) { 265 unsigned int nwritten; 266 unsigned int task_id = _get_current_task_id(); 267 unsigned int tty_id = _get_context_slot(task_id, CTX_TTY_ID); 268 269 if (tty_id >= NB_TTYS) { 270 _tty_error(tty_id , task_id); 269 271 return 0; 270 272 } 271 273 272 unsigned int* tty_address = (unsigned int*) &seg_tty_base; 273 274 for (nwritten = 0; nwritten < length; nwritten++) 275 { 274 unsigned int * tty_address = (unsigned int *) &seg_tty_base; 275 276 for (nwritten = 0; nwritten < length; nwritten++) { 276 277 // check tty's status 277 if ((tty_address[tty_id *TTY_SPAN + TTY_STATUS] & 0x2) == 0x2)278 if ((tty_address[tty_id * TTY_SPAN + TTY_STATUS] & 0x2) == 0x2) { 278 279 break; 279 else 280 } 281 else { 280 282 // write character 281 tty_address[tty_id*TTY_SPAN + TTY_WRITE] = (unsigned int)buffer[nwritten]; 283 tty_address[tty_id * TTY_SPAN + TTY_WRITE] = (unsigned int) buffer[nwritten]; 284 } 282 285 } 283 286 return nwritten; 284 287 } 288 289 285 290 ////////////////////////////////////////////////////////////////////////////// 286 291 // _tty_read() … … 294 299 // Returns 0 if the kernel buffer is empty, 1 if the buffer is full. 295 300 ////////////////////////////////////////////////////////////////////////////// 296 unsigned int _tty_read( char *buffer, 297 unsigned int length) 298 { 299 unsigned int task_id = _get_current_task_id(); 300 unsigned int tty_id = _get_context_slot(task_id, CTX_TTY_ID); 301 302 if ( tty_id >= NB_TTYS ) 303 { 304 _tty_error( tty_id, task_id ); 301 unsigned int _tty_read(char * buffer, unsigned int length) { 302 unsigned int task_id = _get_current_task_id(); 303 unsigned int tty_id = _get_context_slot(task_id, CTX_TTY_ID); 304 305 if (tty_id >= NB_TTYS) { 306 _tty_error(tty_id, task_id); 305 307 return 0; 306 308 } 307 309 308 if (_tty_get_full[tty_id] == 0) 309 { 310 if (_tty_get_full[tty_id] == 0) { 310 311 return 0; 311 312 } 312 else 313 { 313 else { 314 314 *buffer = _tty_get_buf[tty_id]; 315 315 _tty_get_full[tty_id] = 0; 316 316 return 1; 317 317 } 318 } 318 } 319 320 319 321 //////////////////////////////////////////////////////////////////////////////// 320 322 // _tty_get_char() … … 324 326 // Returns 0 if success, 1 if tty_id too large. 325 327 //////////////////////////////////////////////////////////////////////////////// 326 unsigned int _tty_get_char( unsigned int tty_id, 327 unsigned char* buffer ) 328 { 328 unsigned int _tty_get_char(unsigned int tty_id, unsigned char * buffer) { 329 329 // checking argument 330 if ( tty_id >= NB_TTYS ) return 1; 330 if (tty_id >= NB_TTYS) { 331 return 1; 332 } 331 333 332 334 // compute terminal base address 333 unsigned int *tty_address = (unsigned int*) &seg_tty_base; 334 335 *buffer = (unsigned char)tty_address[tty_id*TTY_SPAN + TTY_READ]; 336 return 0; 337 } 338 339 //////////////////////////////////////////////////////////////////////////////// 340 // VciMultiIcu and VciXicu drivers 335 unsigned int * tty_address = (unsigned int *) &seg_tty_base; 336 337 *buffer = (unsigned char) tty_address[tty_id * TTY_SPAN + TTY_READ]; 338 return 0; 339 } 340 341 342 //////////////////////////////////////////////////////////////////////////////// 343 // VciMultiIcu and VciXicu drivers 341 344 //////////////////////////////////////////////////////////////////////////////// 342 345 // There is one vci_multi_icu (or vci_xicu) component per cluster, … … 352 355 // Returns 0 if success, > 0 if error. 353 356 //////////////////////////////////////////////////////////////////////////////// 354 unsigned int _icu_set_mask( unsigned int cluster_id,355 unsigned int proc_id,356 unsigned int value,357 unsigned int is_timer )358 {357 unsigned int _icu_set_mask( 358 unsigned int cluster_id, 359 unsigned int proc_id, 360 unsigned int value, 361 unsigned int is_timer) { 359 362 // parameters checking 360 if ( cluster_id >= NB_CLUSTERS) return 1; 361 if ( proc_id >= NB_PROCS_MAX ) return 1; 362 363 unsigned int* icu_address = (unsigned int*)( (char*)&seg_icu_base + 364 (cluster_id * (unsigned)CLUSTER_SIZE) ); 363 if (cluster_id >= NB_CLUSTERS) { 364 return 1; 365 } 366 if (proc_id >= NB_PROCS_MAX) { 367 return 1; 368 } 369 370 unsigned int * icu_address = (unsigned int *) ((char *) &seg_icu_base + 371 (cluster_id * (unsigned) CLUSTER_SIZE)); 365 372 #if USE_XICU 366 if ( is_timer ) icu_address[XICU_REG(XICU_MSK_PTI_ENABLE, proc_id)] = value; 367 else icu_address[XICU_REG(XICU_MSK_HWI_ENABLE, proc_id)] = value; 373 if (is_timer) { 374 icu_address[XICU_REG(XICU_MSK_PTI_ENABLE, proc_id)] = value; 375 } 376 else { 377 icu_address[XICU_REG(XICU_MSK_HWI_ENABLE, proc_id)] = value; 378 } 368 379 #else 369 380 icu_address[proc_id * ICU_SPAN + ICU_MASK_SET] = value; … … 372 383 return 0; 373 384 } 385 386 374 387 //////////////////////////////////////////////////////////////////////////////// 375 388 // _icu_get_index() … … 379 392 // Returns 0 if success, > 0 if error. 380 393 //////////////////////////////////////////////////////////////////////////////// 381 unsigned int _icu_get_index( unsigned int cluster_id, 382 unsigned int proc_id, 383 unsigned int* buffer ) 384 { 394 unsigned int _icu_get_index(unsigned int cluster_id, unsigned int proc_id, unsigned int * buffer) { 385 395 // parameters checking 386 if ( cluster_id >= NB_CLUSTERS) return 1; 387 if ( proc_id >= NB_PROCS_MAX ) return 1; 388 389 unsigned int* icu_address = (unsigned int*)( (char*)&seg_icu_base + 390 (cluster_id * (unsigned)CLUSTER_SIZE) ); 396 if (cluster_id >= NB_CLUSTERS) { 397 return 1; 398 } 399 if (proc_id >= NB_PROCS_MAX) { 400 return 1; 401 } 402 403 unsigned int * icu_address = (unsigned int *) ((char *) &seg_icu_base + 404 (cluster_id * (unsigned) CLUSTER_SIZE)); 391 405 #if USE_XICU 392 unsigned int prio 406 unsigned int prio = icu_address[XICU_REG(XICU_PRIO, proc_id)]; 393 407 unsigned int pti_ok = (prio & 0x00000001); 394 408 unsigned int hwi_ok = (prio & 0x00000002); … … 397 411 unsigned int hwi_id = (prio & 0x001F0000) >> 16; 398 412 unsigned int swi_id = (prio & 0x1F000000) >> 24; 399 if (pti_ok) *buffer = pti_id; 400 else if (hwi_ok) *buffer = hwi_id; 401 else if (swi_ok) *buffer = swi_id; 402 else *buffer = 32; 413 if (pti_ok) { 414 *buffer = pti_id; 415 } 416 else if (hwi_ok) { 417 *buffer = hwi_id; 418 } 419 else if (swi_ok) { 420 *buffer = swi_id; 421 } 422 else { 423 *buffer = 32; 424 } 403 425 #else 404 426 *buffer = icu_address[proc_id * ICU_SPAN + ICU_IT_VECTOR]; … … 408 430 } 409 431 410 //////////////////////////////////////////////////////////////////////////////// 411 // VciGcd driver 432 433 //////////////////////////////////////////////////////////////////////////////// 434 // VciGcd driver 412 435 //////////////////////////////////////////////////////////////////////////////// 413 436 // The Greater Dommon Divider is a -very- simple hardware coprocessor … … 421 444 // Returns 0 if success, > 0 if error. 422 445 //////////////////////////////////////////////////////////////////////////////// 423 unsigned int _gcd_write( unsigned int register_index, 424 unsigned int value) 425 { 446 unsigned int _gcd_write(unsigned int register_index, unsigned int value) { 426 447 // parameters checking 427 if (register_index >= GCD_END) 428 return 1; 429 430 unsigned int* gcd_address = (unsigned int*) &seg_gcd_base; 448 if (register_index >= GCD_END) { 449 return 1; 450 } 451 452 unsigned int * gcd_address = (unsigned int *) &seg_gcd_base; 431 453 432 454 gcd_address[register_index] = value; // write word 433 455 return 0; 434 456 } 457 458 435 459 //////////////////////////////////////////////////////////////////////////////// 436 460 // _gcd_read() … … 438 462 // Returns 0 if success, > 0 if error. 439 463 //////////////////////////////////////////////////////////////////////////////// 440 unsigned int _gcd_read( unsigned int register_index, 441 unsigned int *buffer) 442 { 464 unsigned int _gcd_read(unsigned int register_index, unsigned int * buffer) { 443 465 // parameters checking 444 if (register_index >= GCD_END) 445 return 1; 446 447 unsigned int* gcd_address = (unsigned int*) &seg_gcd_base; 466 if (register_index >= GCD_END) { 467 return 1; 468 } 469 470 unsigned int * gcd_address = (unsigned int *) &seg_gcd_base; 448 471 449 472 *buffer = gcd_address[register_index]; // read word … … 502 525 503 526 // IOC global variables 504 in_unckdata volatile unsigned int _ioc_status= 0;505 in_unckdata volatile unsigned int _ioc_done= 0;506 in_unckdata unsigned int _ioc_lock= 0;507 in_unckdata unsigned int _ioc_iommu_ix1= 0;508 in_unckdata unsigned int 527 in_unckdata volatile unsigned int _ioc_status= 0; 528 in_unckdata volatile unsigned int _ioc_done = 0; 529 in_unckdata unsigned int _ioc_lock = 0; 530 in_unckdata unsigned int _ioc_iommu_ix1 = 0; 531 in_unckdata unsigned int _ioc_iommu_npages; 509 532 510 533 /////////////////////////////////////////////////////////////////////////////// … … 519 542 // Returns 0 if success, > 0 if error. 520 543 /////////////////////////////////////////////////////////////////////////////// 521 unsigned int _ioc_access( unsigned int to_mem,522 unsigned int lba,523 unsigned int user_vaddr,524 unsigned int count )525 {526 unsigned int user_vpn_min;// first virtuel page index in user space527 unsigned int user_vpn_max;// last virtual page index in user space528 unsigned int vpn;// current virtual page index in user space529 unsigned int ppn;// physical page number530 unsigned int flags;// page protection flags531 unsigned int ix2;// page index in IOMMU PT1 page table532 unsigned int addr;// buffer address for IOC peripheral533 unsigned int ppn_first;// first physical page number for user buffer534 544 unsigned int _ioc_access( 545 unsigned int to_mem, 546 unsigned int lba, 547 unsigned int user_vaddr, 548 unsigned int count) { 549 unsigned int user_vpn_min; // first virtuel page index in user space 550 unsigned int user_vpn_max; // last virtual page index in user space 551 unsigned int vpn; // current virtual page index in user space 552 unsigned int ppn; // physical page number 553 unsigned int flags; // page protection flags 554 unsigned int ix2; // page index in IOMMU PT1 page table 555 unsigned int addr; // buffer address for IOC peripheral 556 unsigned int ppn_first; // first physical page number for user buffer 557 535 558 // check buffer alignment 536 if ( (unsigned int)user_vaddr & 0x3 ) return 1; 537 538 unsigned int* ioc_address = (unsigned int*) &seg_ioc_base ; 539 540 unsigned int block_size = ioc_address[BLOCK_DEVICE_BLOCK_SIZE]; 541 unsigned int length = count*block_size; 559 if ((unsigned int) user_vaddr & 0x3) { 560 return 1; 561 } 562 563 unsigned int * ioc_address = (unsigned int *) &seg_ioc_base ; 564 565 unsigned int block_size = ioc_address[BLOCK_DEVICE_BLOCK_SIZE]; 566 unsigned int length = count * block_size; 542 567 543 568 // get user space page table virtual address 544 unsigned int task_id 545 unsigned int user_pt_vbase = _get_context_slot( task_id, CTX_PTAB_ID);546 569 unsigned int task_id = _get_current_task_id(); 570 unsigned int user_pt_vbase = _get_context_slot(task_id, CTX_PTAB_ID); 571 547 572 user_vpn_min = user_vaddr >> 12; 548 573 user_vpn_max = (user_vaddr + length - 1) >> 12; 549 ix2 574 ix2 = 0; 550 575 551 576 // loop on all virtual pages covering the user buffer 552 for ( vpn = user_vpn_min ; vpn <= user_vpn_max ; vpn++ ) 553 { 577 for (vpn = user_vpn_min; vpn <= user_vpn_max; vpn++) { 554 578 // get ppn and flags for each vpn 555 unsigned int ko = _v2p_translate( (page_table_t*)user_pt_vbase, 556 vpn, 557 &ppn, 558 &flags ); 579 unsigned int ko = _v2p_translate((page_table_t *) user_pt_vbase, vpn, &ppn, &flags); 559 580 560 581 // check access rights 561 if ( ko ) return 2; // unmapped 562 if ( (flags & PTE_U) == 0 ) return 3; // not in user space 563 if ( ( (flags & PTE_W) == 0 ) && to_mem ) return 4; // not writable 582 if (ko) { 583 return 2; // unmapped 584 } 585 if ((flags & PTE_U) == 0) { 586 return 3; // not in user space 587 } 588 if (((flags & PTE_W) == 0 ) && to_mem) { 589 return 4; // not writable 590 } 564 591 565 592 // save first ppn value 566 if ( ix2 == 0 ) ppn_first = ppn; 567 568 if ( IOMMU_ACTIVE ) // the user buffer must be remapped in the I/0 space 569 { 593 if (ix2 == 0) { 594 ppn_first = ppn; 595 } 596 597 if (IOMMU_ACTIVE) { 598 // the user buffer must be remapped in the I/0 space 570 599 // check buffer length < 2 Mbytes 571 if ( ix2 > 511 ) return 2; 600 if (ix2 > 511) { 601 return 2; 602 } 572 603 573 604 // map the physical page in IOMMU page table 574 _iommu_add_pte2( _ioc_iommu_ix1, // PT1 index 575 ix2, // PT2 index 576 ppn, // Physical page number 577 flags ); // Protection flags 605 _iommu_add_pte2( 606 _ioc_iommu_ix1, // PT1 index 607 ix2, // PT2 index 608 ppn, // Physical page number 609 flags); // Protection flags 578 610 } 579 else // no IOMMU : check that physical pages are contiguous 580 { 581 if ( (ppn - ppn_first) != ix2 ) return 5; // split physical buffer 611 else { 612 // no IOMMU : check that physical pages are contiguous 613 if ((ppn - ppn_first) != ix2) { 614 return 5; // split physical buffer 615 } 582 616 } 583 617 584 618 // increment page index 585 619 ix2++; … … 590 624 591 625 // invalidate data cache in case of memory write 592 if ( to_mem ) _dcache_buf_invalidate( (void*)user_vaddr, length ); 626 if (to_mem) { 627 _dcache_buf_invalidate((void *) user_vaddr, length); 628 } 593 629 594 630 // compute buffer base address for IOC depending on IOMMU activation 595 if ( IOMMU_ACTIVE ) addr = (_ioc_iommu_ix1) << 21 | (user_vaddr & 0xFFF); 596 else addr = (ppn_first << 12) | (user_vaddr & 0xFFF); 631 if (IOMMU_ACTIVE) { 632 addr = (_ioc_iommu_ix1) << 21 | (user_vaddr & 0xFFF); 633 } 634 else { 635 addr = (ppn_first << 12) | (user_vaddr & 0xFFF); 636 } 597 637 598 638 // get the lock on ioc device 599 _get_lock( &_ioc_lock);639 _get_lock(&_ioc_lock); 600 640 601 641 // peripheral configuration 602 ioc_address[BLOCK_DEVICE_BUFFER] = addr; 603 ioc_address[BLOCK_DEVICE_COUNT] = count; 604 ioc_address[BLOCK_DEVICE_LBA] = lba; 605 if ( to_mem == 0 ) ioc_address[BLOCK_DEVICE_OP] = BLOCK_DEVICE_WRITE; 606 else ioc_address[BLOCK_DEVICE_OP] = BLOCK_DEVICE_READ; 607 608 return 0; 609 } 642 ioc_address[BLOCK_DEVICE_BUFFER] = addr; 643 ioc_address[BLOCK_DEVICE_COUNT] = count; 644 ioc_address[BLOCK_DEVICE_LBA] = lba; 645 if (to_mem == 0) { 646 ioc_address[BLOCK_DEVICE_OP] = BLOCK_DEVICE_WRITE; 647 } 648 else { 649 ioc_address[BLOCK_DEVICE_OP] = BLOCK_DEVICE_READ; 650 } 651 652 return 0; 653 } 654 655 610 656 ///////////////////////////////////////////////////////////////////////////////// 611 657 // _ioc_completed() … … 617 663 // Returns 0 if success, > 0 if error. 618 664 ///////////////////////////////////////////////////////////////////////////////// 619 unsigned int _ioc_completed() 620 { 621 unsigned int ret; 622 unsigned int ix2; 665 unsigned int _ioc_completed() { 666 unsigned int ret; 667 unsigned int ix2; 623 668 624 669 // busy waiting 625 while (_ioc_done == 0) 670 while (_ioc_done == 0) { 626 671 asm volatile("nop"); 672 } 627 673 628 674 // unmap the buffer from IOMMU page table if IOMMU is activated 629 if ( IOMMU_ACTIVE ) 630 { 631 unsigned int* iob_address = (unsigned int*) &seg_iob_base; 632 633 for ( ix2 = 0 ; ix2 < _ioc_iommu_npages ; ix2++ ) 634 { 675 if (IOMMU_ACTIVE) { 676 unsigned int * iob_address = (unsigned int *) &seg_iob_base; 677 678 for (ix2 = 0; ix2 < _ioc_iommu_npages; ix2++) { 635 679 // unmap the page in IOMMU page table 636 _iommu_inval_pte2( _ioc_iommu_ix1, // PT1 index 637 ix2 ); // PT2 index 680 _iommu_inval_pte2( 681 _ioc_iommu_ix1, // PT1 index 682 ix2 ); // PT2 index 638 683 639 684 // clear IOMMU TLB … … 644 689 // test IOC status 645 690 if ((_ioc_status != BLOCK_DEVICE_READ_SUCCESS) 646 && (_ioc_status != BLOCK_DEVICE_WRITE_SUCCESS)) ret = 1; // error 647 else ret = 0; // success 691 && (_ioc_status != BLOCK_DEVICE_WRITE_SUCCESS)) { 692 ret = 1; // error 693 } 694 else { 695 ret = 0; // success 696 } 648 697 649 698 // reset synchronization variables 650 699 _ioc_done = 0; 651 asm volatile 700 asm volatile("sync"); 652 701 _ioc_lock = 0; 653 702 654 703 return ret; 655 704 } 705 706 656 707 /////////////////////////////////////////////////////////////////////////////// 657 708 // _ioc_read() … … 662 713 // Returns 0 if success, > 0 if error. 663 714 /////////////////////////////////////////////////////////////////////////////// 664 unsigned int _ioc_read( unsigned int lba,665 void* buffer,666 unsigned int count )667 { 668 return _ioc_access( 1, // read access669 lba,670 (unsigned int)buffer, 671 count ); 672 } 715 unsigned int _ioc_read(unsigned int lba, void * buffer, unsigned int count) { 716 return _ioc_access( 717 1, // read access 718 lba, 719 (unsigned int) buffer, 720 count); 721 } 722 723 673 724 /////////////////////////////////////////////////////////////////////////////// 674 725 // _ioc_write() … … 679 730 // Returns 0 if success, > 0 if error. 680 731 /////////////////////////////////////////////////////////////////////////////// 681 unsigned int _ioc_write( unsigned int lba,682 const void* buffer,683 unsigned int count )684 { 685 return _ioc_access( 0, // write access686 lba,687 (unsigned int)buffer, 688 count ); 689 } 732 unsigned int _ioc_write(unsigned int lba, const void * buffer, unsigned int count) { 733 return _ioc_access( 734 0, // write access 735 lba, 736 (unsigned int) buffer, 737 count); 738 } 739 740 690 741 /////////////////////////////////////////////////////////////////////////////// 691 742 // _ioc_get_status() … … 693 744 // Returns 0 if success, > 0 if error. 694 745 /////////////////////////////////////////////////////////////////////////////// 695 unsigned int _ioc_get_status(unsigned int* status) 696 { 746 unsigned int _ioc_get_status(unsigned int * status) { 697 747 // get IOC base address 698 unsigned int * ioc_address = (unsigned int*) &seg_ioc_base;748 unsigned int * ioc_address = (unsigned int *) &seg_ioc_base; 699 749 700 750 *status = ioc_address[BLOCK_DEVICE_STATUS]; // read status & reset IRQ 701 751 return 0; 702 752 } 753 703 754 704 755 ////////////////////////////////////////////////////////////////////////////////// … … 719 770 720 771 #if NB_DMAS_MAX > 0 721 in_unckdata unsigned int _dma_lock[NB_DMAS_MAX * NB_CLUSTERS]722 = { [0 ... (NB_DMAS_MAX * NB_CLUSTERS)-1] = 0 };723 724 in_unckdata volatile unsigned int _dma_done[NB_DMAS_MAX * NB_CLUSTERS] 725 = { [0 ... (NB_DMAS_MAX * NB_CLUSTERS)-1] = 0 }; 726 727 in_unckdata volatile unsigned int _dma_status[NB_DMAS_MAX * NB_CLUSTERS];728 729 in_unckdata unsigned int _dma_iommu_ix1 = 1;730 731 in_unckdata unsigned int 772 in_unckdata unsigned int _dma_lock[NB_DMAS_MAX * NB_CLUSTERS] = { 773 [0 ... (NB_DMAS_MAX * NB_CLUSTERS) - 1] = 0 774 }; 775 776 in_unckdata volatile unsigned int _dma_done[NB_DMAS_MAX * NB_CLUSTERS] = { 777 [0 ... (NB_DMAS_MAX * NB_CLUSTERS) - 1] = 0 778 }; 779 780 in_unckdata volatile unsigned int _dma_status[NB_DMAS_MAX * NB_CLUSTERS]; 781 in_unckdata unsigned int _dma_iommu_ix1 = 1; 782 in_unckdata unsigned int _dma_iommu_npages[NB_DMAS_MAX * NB_CLUSTERS]; 732 783 #endif 733 784 … … 735 786 // _dma_reset_irq() 736 787 ////////////////////////////////////////////////////////////////////////////////// 737 unsigned int _dma_reset_irq( unsigned int cluster_id, 738 unsigned int channel_id ) 739 { 788 unsigned int _dma_reset_irq(unsigned int cluster_id, unsigned int channel_id) { 740 789 #if NB_DMAS_MAX > 0 741 790 // parameters checking 742 if ( cluster_id >= NB_CLUSTERS ) return 1; 743 if ( channel_id >= NB_DMAS_MAX ) return 1; 791 if (cluster_id >= NB_CLUSTERS) { 792 return 1; 793 } 794 if (channel_id >= NB_DMAS_MAX) { 795 return 1; 796 } 744 797 745 798 // compute DMA base address 746 unsigned int * dma_address = (unsigned int*)( (char*)&seg_dma_base +747 (cluster_id * (unsigned)CLUSTER_SIZE));748 749 dma_address[channel_id *DMA_SPAN + DMA_RESET] = 0;799 unsigned int * dma_address = (unsigned int *) ((char *) &seg_dma_base + 800 (cluster_id * (unsigned) CLUSTER_SIZE)); 801 802 dma_address[channel_id * DMA_SPAN + DMA_RESET] = 0; 750 803 return 0; 751 804 #else … … 754 807 } 755 808 809 756 810 ////////////////////////////////////////////////////////////////////////////////// 757 811 // _dma_get_status() 758 812 ////////////////////////////////////////////////////////////////////////////////// 759 unsigned int _dma_get_status( unsigned int cluster_id, 760 unsigned int channel_id, 761 unsigned int* status ) 762 { 813 unsigned int _dma_get_status(unsigned int cluster_id, unsigned int channel_id, unsigned int * status) { 763 814 #if NB_DMAS_MAX > 0 764 815 // parameters checking 765 if ( cluster_id >= NB_CLUSTERS ) return 1; 766 if ( channel_id >= NB_DMAS_MAX ) return 1; 816 if (cluster_id >= NB_CLUSTERS) { 817 return 1; 818 } 819 if (channel_id >= NB_DMAS_MAX) { 820 return 1; 821 } 767 822 768 823 // compute DMA base address 769 unsigned int * dma_address = (unsigned int*)( (char*)&seg_dma_base +770 (cluster_id * (unsigned)CLUSTER_SIZE));771 772 *status = dma_address[channel_id *DMA_SPAN + DMA_LEN];824 unsigned int * dma_address = (unsigned int *) ((char *) &seg_dma_base + 825 (cluster_id * (unsigned) CLUSTER_SIZE)); 826 827 *status = dma_address[channel_id * DMA_SPAN + DMA_LEN]; 773 828 return 0; 774 829 #else … … 776 831 #endif 777 832 } 833 778 834 779 835 ////////////////////////////////////////////////////////////////////////////////// … … 798 854 // Returns 0 if success, > 0 if error. 799 855 ////////////////////////////////////////////////////////////////////////////////// 800 unsigned int _dma_transfer( unsigned int dev_type,801 unsigned int to_user,802 unsigned int offset,803 unsigned int user_vaddr,804 unsigned int length )805 {856 unsigned int _dma_transfer( 857 unsigned int dev_type, 858 unsigned int to_user, 859 unsigned int offset, 860 unsigned int user_vaddr, 861 unsigned int length) { 806 862 #if NB_DMAS_MAX > 0 807 unsigned int ko;// unsuccessfull V2P translation808 unsigned int flags;// protection flags809 unsigned int ppn;// physical page number810 unsigned int user_pbase;// user buffer pbase address811 unsigned int device_pbase;// frame buffer pbase address812 unsigned int device_vaddr;// device buffer vbase address863 unsigned int ko; // unsuccessfull V2P translation 864 unsigned int flags; // protection flags 865 unsigned int ppn; // physical page number 866 unsigned int user_pbase; // user buffer pbase address 867 unsigned int device_pbase; // frame buffer pbase address 868 unsigned int device_vaddr; // device buffer vbase address 813 869 814 870 // check user buffer address and length alignment 815 if ( (user_vaddr & 0x3) || (length & 0x3) ) 816 { 871 if ((user_vaddr & 0x3) || (length & 0x3)) { 817 872 _get_lock(&_tty_put_lock); 818 873 _puts("\n[GIET ERROR] in _dma_transfer : user buffer not word aligned\n"); … … 822 877 823 878 // get DMA channel and compute DMA vbase address 824 unsigned int 825 unsigned int dma_id = _get_context_slot( task_id, CTX_DMA_ID);826 unsigned int 827 unsigned int 828 unsigned int * dma_base = (unsigned int*)( (char*)&seg_dma_base +829 (cluster_id * (unsigned)CLUSTER_SIZE));879 unsigned int task_id = _get_current_task_id(); 880 unsigned int dma_id = _get_context_slot(task_id, CTX_DMA_ID); 881 unsigned int cluster_id = dma_id / NB_DMAS_MAX; 882 unsigned int loc_id = dma_id % NB_DMAS_MAX; 883 unsigned int * dma_base = (unsigned int *) ((char *) &seg_dma_base + 884 (cluster_id * (unsigned) CLUSTER_SIZE)); 830 885 831 886 // get page table address 832 unsigned int user_ptab = _get_context_slot( task_id, CTX_PTAB_ID);887 unsigned int user_ptab = _get_context_slot( task_id, CTX_PTAB_ID); 833 888 834 889 // get peripheral buffer virtual address 835 if ( dev_type) device_vaddr = (unsigned int)&seg_nic_base + offset; 836 else device_vaddr = (unsigned int)&seg_fbf_base + offset; 890 if ( dev_type) { 891 device_vaddr = (unsigned int) &seg_nic_base + offset; 892 } 893 else { 894 device_vaddr = (unsigned int) &seg_fbf_base + offset; 895 } 837 896 838 897 // get device buffer physical address 839 ko = _v2p_translate( (page_table_t*)user_ptab, 840 (device_vaddr >> 12), 841 &ppn, 842 &flags ); 843 if ( ko ) 844 { 898 ko = _v2p_translate((page_table_t *) user_ptab, (device_vaddr >> 12), &ppn, &flags); 899 if (ko) { 845 900 _get_lock(&_tty_put_lock); 846 901 _puts("\n[GIET ERROR] in _dma_transfer : device buffer unmapped\n"); … … 851 906 852 907 // Compute user buffer physical address 853 ko = _v2p_translate( (page_table_t*)user_ptab, 854 (user_vaddr >> 12), 855 &ppn, 856 &flags ); 857 if ( ko ) 858 { 908 ko = _v2p_translate( (page_table_t*)user_ptab, (user_vaddr >> 12), &ppn, &flags); 909 if (ko) { 859 910 _get_lock(&_tty_put_lock); 860 911 _puts("\n[GIET ERROR] in _dma_transfer() : user buffer unmapped\n"); … … 862 913 return 3; 863 914 } 864 if ( (flags & PTE_U) == 0 ) 865 { 915 if ((flags & PTE_U) == 0) { 866 916 _get_lock(&_tty_put_lock); 867 917 _puts("[GIET ERROR] in _dma_transfer() : user buffer not in user space\n"); … … 869 919 return 4; 870 920 } 871 if ( ( (flags & PTE_W) == 0 ) && to_user ) 872 { 921 if (((flags & PTE_W) == 0 ) && to_user) { 873 922 _get_lock(&_tty_put_lock); 874 923 _puts("\n[GIET ERROR] in _dma_transfer() : user buffer not writable\n"); … … 878 927 user_pbase = (ppn << 12) | (user_vaddr & 0x00000FFF); 879 928 880 /* This is a draft for IOMMU support881 929 /* This is a draft for IOMMU support 930 882 931 // loop on all virtual pages covering the user buffer 883 932 unsigned int user_vpn_min = user_vaddr >> 12; … … 888 937 for ( vpn = user_vpn_min ; vpn <= user_vpn_max ; vpn++ ) 889 938 { 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 _iommu_add_pte2( ix1,// PT1 index911 ix2,// PT2 index912 ppn,// physical page number913 flags );// protection flags914 915 916 917 918 919 920 921 939 // get ppn and flags for each vpn 940 unsigned int ko = _v2p_translate( (page_table_t*)user_pt_vbase, 941 vpn, 942 &ppn, 943 &flags ); 944 945 // check access rights 946 if ( ko ) return 3; // unmapped 947 if ( (flags & PTE_U) == 0 ) return 4; // not in user space 948 if ( ( (flags & PTE_W) == 0 ) && to_user ) return 5; // not writable 949 950 // save first ppn value 951 if ( ix2 == 0 ) ppn_first = ppn; 952 953 if ( IOMMU_ACTIVE ) // the user buffer must be remapped in the I/0 space 954 { 955 // check buffer length < 2 Mbytes 956 if ( ix2 > 511 ) return 2; 957 958 // map the physical page in IOMMU page table 959 _iommu_add_pte2( ix1, // PT1 index 960 ix2, // PT2 index 961 ppn, // physical page number 962 flags ); // protection flags 963 } 964 else // no IOMMU : check that physical pages are contiguous 965 { 966 if ( (ppn - ppn_first) != ix2 ) return 6; // split physical buffer 967 } 968 969 // increment page index 970 ix2++; 922 971 } // end for vpn 923 972 … … 928 977 929 978 // invalidate data cache in case of memory write 930 if ( to_user ) _dcache_buf_invalidate( (void*)user_vaddr, length ); 931 979 if (to_user) { 980 _dcache_buf_invalidate((void *) user_vaddr, length); 981 } 982 932 983 // get the lock 933 _get_lock( &_dma_lock[dma_id]);984 _get_lock(&_dma_lock[dma_id]); 934 985 935 986 // DMA configuration 936 if ( to_user ) 937 { 938 dma_base[loc_id*DMA_SPAN + DMA_SRC] = (unsigned int)device_pbase; 939 dma_base[loc_id*DMA_SPAN + DMA_DST] = (unsigned int)user_pbase; 940 } 941 else 942 { 943 dma_base[loc_id*DMA_SPAN + DMA_SRC] = (unsigned int)user_pbase; 944 dma_base[loc_id*DMA_SPAN + DMA_DST] = (unsigned int)device_pbase; 945 } 946 dma_base[loc_id*DMA_SPAN + DMA_LEN] = (unsigned int)length; 947 948 return 0; 949 987 if (to_user) { 988 dma_base[loc_id * DMA_SPAN + DMA_SRC] = (unsigned int) device_pbase; 989 dma_base[loc_id * DMA_SPAN + DMA_DST] = (unsigned int) user_pbase; 990 } 991 else { 992 dma_base[loc_id * DMA_SPAN + DMA_SRC] = (unsigned int) user_pbase; 993 dma_base[loc_id * DMA_SPAN + DMA_DST] = (unsigned int) device_pbase; 994 } 995 dma_base[loc_id * DMA_SPAN + DMA_LEN] = (unsigned int) length; 996 997 return 0; 950 998 #else //NB_DMAS_MAX == 0 951 952 999 return -1; 953 954 1000 #endif 955 1001 } // end _dma_transfer() 1002 956 1003 957 1004 ////////////////////////////////////////////////////////////////////////////////// … … 963 1010 // (1 == read error / 2 == DMA idle error / 3 == write error) 964 1011 ////////////////////////////////////////////////////////////////////////////////// 965 unsigned int _dma_completed() 966 { 1012 unsigned int _dma_completed() { 967 1013 #if NB_DMAS_MAX > 0 968 unsigned int 969 unsigned int dma_id = _get_context_slot( task_id, CTX_DMA_ID);970 unsigned int 1014 unsigned int task_id = _get_current_task_id(); 1015 unsigned int dma_id = _get_context_slot(task_id, CTX_DMA_ID); 1016 unsigned int dma_ret; 971 1017 972 1018 // busy waiting with a pseudo random delay between bus access 973 while (_dma_done[dma_id] == 0) 974 {975 unsigned int delay = (( _proctime() ^ _procid()<<4 ) & 0x3F) + 1;976 asm volatile("move $3, %0\n"977 "loop_nic_completed:\n"978 "addi $3, $3, -1\n"979 "bnez $3, loop_nic_completed\n"980 "nop\n"981 982 : "r"(delay)983 : "$3");984 } 985 986 /* draft support for IOMMU1019 while (_dma_done[dma_id] == 0) { 1020 unsigned int delay = (( _proctime() ^ _procid() << 4) & 0x3F) + 1; 1021 asm volatile( 1022 "move $3, %0 \n" 1023 "loop_nic_completed: \n" 1024 "addi $3, $3, -1 \n" 1025 "bnez $3, loop_nic_completed \n" 1026 "nop \n" 1027 : 1028 : "r" (delay) 1029 : "$3"); 1030 } 1031 1032 /* draft support for IOMMU 987 1033 // unmap the buffer from IOMMU page table if IOMMU is activated 988 1034 if ( GIET_IOMMU_ACTIVE ) 989 1035 { 990 991 992 993 994 995 996 997 998 _iommu_inval_pte2( ix1,// PT1 index999 1000 1001 1002 1003 1004 } 1005 */1036 unsigned int* iob_address = (unsigned int*)&seg_iob_base; 1037 1038 unsigned int ix1 = _dma_iommu_ix1 + dma_id; 1039 unsigned int ix2; 1040 1041 for ( ix2 = 0 ; ix2 < _dma_iommu_npages[dma_id] ; ix2++ ) 1042 { 1043 // unmap the page in IOMMU page table 1044 _iommu_inval_pte2( ix1, // PT1 index 1045 ix2 ); // PT2 index 1046 1047 // clear IOMMU TLB 1048 iob_address[IOB_INVAL_PTE] = (ix1 << 21) | (ix2 << 12); 1049 } 1050 } 1051 */ 1006 1052 1007 1053 // reset synchronization variables … … 1019 1065 1020 1066 ////////////////////////////////////////////////////////////////////////////////// 1021 // 1067 // VciFrameBuffer driver 1022 1068 ////////////////////////////////////////////////////////////////////////////////// 1023 1069 // The vci_frame_buffer device can be accessed directly by software with memcpy(), … … 1041 1087 // - length : number of bytes to be transfered. 1042 1088 ////////////////////////////////////////////////////////////////////////////////// 1043 unsigned int _fb_sync_write( unsigned int offset, 1044 const void* buffer, 1045 unsigned int length ) 1046 { 1047 unsigned char *fb_address = (unsigned char*)&seg_fbf_base + offset; 1048 memcpy((void*)fb_address, (void*)buffer, length); 1049 return 0; 1050 } 1089 unsigned int _fb_sync_write(unsigned int offset, const void * buffer, unsigned int length) { 1090 unsigned char * fb_address = (unsigned char *) &seg_fbf_base + offset; 1091 memcpy((void *) fb_address, (void *) buffer, length); 1092 return 0; 1093 } 1094 1051 1095 1052 1096 ////////////////////////////////////////////////////////////////////////////////// … … 1057 1101 // - length : number of bytes to be transfered. 1058 1102 ////////////////////////////////////////////////////////////////////////////////// 1059 unsigned int _fb_sync_read( unsigned int offset, 1060 const void* buffer, 1061 unsigned int length ) 1062 { 1063 unsigned char *fb_address = (unsigned char*)&seg_fbf_base + offset; 1064 memcpy((void*)buffer, (void*)fb_address, length); 1065 return 0; 1066 } 1103 unsigned int _fb_sync_read(unsigned int offset, const void * buffer, unsigned int length) { 1104 unsigned char * fb_address = (unsigned char *) &seg_fbf_base + offset; 1105 memcpy((void *) buffer, (void *) fb_address, length); 1106 return 0; 1107 } 1108 1067 1109 1068 1110 ////////////////////////////////////////////////////////////////////////////////// … … 1074 1116 // Returns 0 if success, > 0 if error. 1075 1117 ////////////////////////////////////////////////////////////////////////////////// 1076 unsigned int _fb_write( unsigned int offset, 1077 const void* buffer, 1078 unsigned int length ) 1079 { 1080 return _dma_transfer( 0, // frame buffer 1081 0, // write 1082 offset, 1083 (unsigned int)buffer, 1084 length ); 1085 } 1118 unsigned int _fb_write(unsigned int offset, const void * buffer, unsigned int length) { 1119 return _dma_transfer( 1120 0, // frame buffer 1121 0, // write 1122 offset, 1123 (unsigned int) buffer, 1124 length); 1125 } 1126 1086 1127 1087 1128 ////////////////////////////////////////////////////////////////////////////////// … … 1093 1134 // Returns 0 if success, > 0 if error. 1094 1135 ////////////////////////////////////////////////////////////////////////////////// 1095 unsigned int _fb_read( unsigned int offset, 1096 const void* buffer, 1097 unsigned int length ) 1098 { 1099 return _dma_transfer( 0, // frame buffer 1100 1, // read 1101 offset, 1102 (unsigned int)buffer, 1103 length ); 1104 } 1136 unsigned int _fb_read(unsigned int offset, const void * buffer, unsigned int length) { 1137 return _dma_transfer( 1138 0, // frame buffer 1139 1, // read 1140 offset, 1141 (unsigned int) buffer, 1142 length); 1143 } 1144 1105 1145 1106 1146 ////////////////////////////////////////////////////////////////////////////////// … … 1111 1151 // (1 == read error / 2 == DMA idle error / 3 == write error) 1112 1152 ////////////////////////////////////////////////////////////////////////////////// 1113 unsigned int _fb_completed() 1114 { 1153 unsigned int _fb_completed() { 1115 1154 return _dma_completed(); 1116 1155 } 1117 1156 1118 1157 ////////////////////////////////////////////////////////////////////////////////// 1119 // 1158 // VciMultiNic driver 1120 1159 ////////////////////////////////////////////////////////////////////////////////// 1121 1160 // The VciMultiNic device can be accessed directly by software with memcpy(), … … 1139 1178 // - length : number of bytes to be transfered. 1140 1179 ////////////////////////////////////////////////////////////////////////////////// 1141 unsigned int _nic_sync_write( unsigned int offset, 1142 const void* buffer, 1143 unsigned int length ) 1144 { 1145 unsigned char *nic_address = (unsigned char*)&seg_nic_base + offset; 1146 memcpy((void*)nic_address, (void*)buffer, length); 1147 return 0; 1148 } 1180 unsigned int _nic_sync_write(unsigned int offset, const void * buffer, unsigned int length) { 1181 unsigned char * nic_address = (unsigned char *) &seg_nic_base + offset; 1182 memcpy((void *) nic_address, (void *) buffer, length); 1183 return 0; 1184 } 1185 1149 1186 1150 1187 ////////////////////////////////////////////////////////////////////////////////// … … 1155 1192 // - length : number of bytes to be transfered. 1156 1193 ////////////////////////////////////////////////////////////////////////////////// 1157 unsigned int _nic_sync_read( unsigned int offset, 1158 const void* buffer, 1159 unsigned int length ) 1160 { 1161 unsigned char *nic_address = (unsigned char*)&seg_nic_base + offset; 1162 memcpy((void*)buffer, (void*)nic_address, length); 1163 return 0; 1164 } 1194 unsigned int _nic_sync_read(unsigned int offset, const void * buffer, unsigned int length) { 1195 unsigned char *nic_address = (unsigned char *) &seg_nic_base + offset; 1196 memcpy((void *) buffer, (void *) nic_address, length); 1197 return 0; 1198 } 1199 1165 1200 1166 1201 ////////////////////////////////////////////////////////////////////////////////// … … 1172 1207 // Returns 0 if success, > 0 if error. 1173 1208 ////////////////////////////////////////////////////////////////////////////////// 1174 unsigned int _nic_write( unsigned int offset, 1175 const void* buffer, 1176 unsigned int length ) 1177 { 1178 return _dma_transfer( 1, // NIC 1179 0, // write 1180 offset, 1181 (unsigned int)buffer, 1182 length ); 1183 } 1209 unsigned int _nic_write(unsigned int offset, const void * buffer, unsigned int length) { 1210 return _dma_transfer( 1211 1, // NIC 1212 0, // write 1213 offset, 1214 (unsigned int) buffer, 1215 length ); 1216 } 1217 1184 1218 1185 1219 ////////////////////////////////////////////////////////////////////////////////// … … 1191 1225 // Returns 0 if success, > 0 if error. 1192 1226 ////////////////////////////////////////////////////////////////////////////////// 1193 unsigned int _nic_read( unsigned int offset, 1194 const void* buffer, 1195 unsigned int length ) 1196 { 1197 return _dma_transfer( 1, // NIC 1198 1, // read 1199 offset, 1200 (unsigned int)buffer, 1201 length ); 1202 } 1227 unsigned int _nic_read(unsigned int offset, const void * buffer, unsigned int length) { 1228 return _dma_transfer( 1229 1, // NIC 1230 1, // read 1231 offset, 1232 (unsigned int) buffer, 1233 length ); 1234 } 1235 1203 1236 1204 1237 ////////////////////////////////////////////////////////////////////////////////// … … 1209 1242 // (1 == read error / 2 == DMA idle error / 3 == write error) 1210 1243 ////////////////////////////////////////////////////////////////////////////////// 1211 unsigned int _nic_completed() 1212 { 1244 unsigned int _nic_completed() { 1213 1245 return _dma_completed(); 1214 1246 } 1215 1247 1248 // Local Variables: 1249 // tab-width: 4 1250 // c-basic-offset: 4 1251 // c-file-offsets:((innamespace . 0)(inline-open . 0)) 1252 // indent-tabs-mode: nil 1253 // End: 1254 // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 1255
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