Changeset 231 for soft/giet_vm/sys/common.c
- Timestamp:
- Mar 5, 2013, 1:42:57 PM (12 years ago)
- File:
-
- 1 edited
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soft/giet_vm/sys/common.c
r228 r231 23 23 24 24 // SR save (used by _it_mask() / it_restore() 25 unsigned int _status_register_save ;25 unsigned int _status_register_save[NB_CLUSTERS*NB_PROCS_MAX]; 26 26 27 27 /////////////////////////////////////////////////////////////////////////////////// … … 103 103 // _it_mask() 104 104 // Access CP0 and mask IRQs 105 // This function uses a global _status_register_save array 106 // This function is NOT USED and NOT TESTED 105 107 /////////////////////////////////////////////////////////////////////////////////// 106 108 inline void _it_mask() { 107 109 unsigned int sr_value; 110 unsigned int proc_id; 108 111 asm volatile( 109 112 "li $3, 0xFFFFFFFE \n" … … 111 114 "and $3, $3, %0 \n" 112 115 "mtc0 $3, $12 \n" 113 : "=r"(sr_value) 116 "mfc0 %1, $15, 1 \n" 117 : "=r"(sr_value), "=r"(proc_id) 114 118 : 115 119 : "$3"); 116 _status_register_save = sr_value;120 _status_register_save[proc_id] = sr_value; 117 121 } 118 122 … … 121 125 // _it_restore() 122 126 // Access CP0 and enable IRQs 127 // This function uses a global _status_register_save array 128 // This function is NOT USED and NOT TESTED 123 129 /////////////////////////////////////////////////////////////////////////////////// 124 130 inline void _it_restore() { 125 unsigned int sr_value = _status_register_save; 126 asm volatile( 127 "mtc0 %0, $12 \n" 128 : 129 : "r"(sr_value)); 131 unsigned int proc_id; 132 // get the processor id to index the _status_register_save table 133 asm volatile("mfc0 %0, $15, 1" : "=r" (proc_id)); 134 // restore the saved value into the status register 135 asm volatile("mtc0 %0, $12" : : "r" (_status_register_save[proc_id])); 136 } 137 138 /////////////////////////////////////////////////////////////////////////////////// 139 // _it_disable() 140 // Access CP0 and disables IRQs 141 /////////////////////////////////////////////////////////////////////////////////// 142 inline void _it_disable() { 143 asm volatile( 144 "li $3, 0xFFFFFFFE \n" 145 "mfc0 $4, $12 \n" 146 "and $3, $3, $4 \n" 147 "mtc0 $3, $12 \n" 148 ::: "$3", "$4"); 149 } 150 151 /////////////////////////////////////////////////////////////////////////////////// 152 // _it_enable() 153 // Access CP0 and enables IRQs 154 /////////////////////////////////////////////////////////////////////////////////// 155 inline void _it_enable() { 156 asm volatile( 157 "li $3, 0x00000001 \n" 158 "mfc0 $4, $12 \n" 159 "or $3, $3, $4 \n" 160 "mtc0 $3, $12 \n" 161 ::: "$3", "$4"); 130 162 } 131 163
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