Changeset 246
- Timestamp:
- Jul 9, 2013, 3:54:53 PM (11 years ago)
- Location:
- soft/giet_vm
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
soft/giet_vm/boot/boot_init.c
r245 r246 156 156 { 157 157 unsigned int value; 158 unsigned int lsb = (unsigned int) paddr;159 unsigned int msb = (unsigned int) (paddr >> 32);158 unsigned int lsb = (unsigned int) paddr; 159 unsigned int msb = (unsigned int) (paddr >> 32); 160 160 161 161 asm volatile( … … 489 489 } 490 490 491 491 492 // get page table physical base address 492 493 pt1_pbase = boot_ptabs_paddr[vspace_id]; 493 494 494 495 // get ptd in PT1 495 ptd = boot_physical_read( pt1_pbase + 4*ix1);496 ptd = boot_physical_read(pt1_pbase + 4 * ix1); 496 497 497 498 if ((ptd & PTE_V) == 0) // invalid PTD: compute PT2 base address, … … 508 509 { 509 510 pt2_pbase = pt1_pbase + PT1_SIZE + PT2_SIZE * pt2_id; 510 ptd = PTE_V | PTE_T | (unsigned int) (pt2_pbase >> 12);511 boot_physical_write( pt1_pbase + 4 *ix1, ptd);511 ptd = PTE_V | PTE_T | (unsigned int) (pt2_pbase >> 12); 512 boot_physical_write( pt1_pbase + 4 * ix1, ptd); 512 513 boot_next_free_pt2[vspace_id] = pt2_id + 1; 513 514 } … … 519 520 520 521 // set PTE in PT2 : flags & PPN in two 32 bits words 521 pte_paddr = pt2_pbase + 8 *ix2;522 boot_physical_write( pte_paddr, flags);523 boot_physical_write( pte_paddr + 4, ppn);524 525 if ( verbose)526 {527 boot_puts(" / pt1_pbase = ");528 boot_putl( pt1_pbase );529 boot_puts(" / ptd = ");530 boot_putl( ptd );531 boot_puts(" / pt2_pbase = ");532 boot_putl( pt2_pbase );533 boot_puts(" / pte_paddr = ");534 boot_putl( pte_paddr );535 boot_puts(" / ppn = ");536 boot_putx( ppn );537 boot_puts("/\n");538 }522 pte_paddr = pt2_pbase + 8 * ix2; 523 boot_physical_write(pte_paddr , flags); 524 boot_physical_write(pte_paddr + 4, ppn); 525 526 if (verbose) 527 { 528 boot_puts(" / pt1_pbase = "); 529 boot_putl( pt1_pbase ); 530 boot_puts(" / ptd = "); 531 boot_putl( ptd ); 532 boot_puts(" / pt2_pbase = "); 533 boot_putl( pt2_pbase ); 534 boot_puts(" / pte_paddr = "); 535 boot_putl( pte_paddr ); 536 boot_puts(" / ppn = "); 537 boot_putx( ppn ); 538 boot_puts("/\n"); 539 } 539 540 540 541 } // end boot_add_pte() … … 567 568 { 568 569 vpn = vseg[vseg_id].vbase >> 12; 569 ppn = (unsigned int)(vseg[vseg_id].pbase >> 12); 570 ppn = (unsigned int) (vseg[vseg_id].pbase >> 12); 571 570 572 npages = vseg[vseg_id].length >> 12; 571 573 if ((vseg[vseg_id].length & 0xFFF) != 0) npages++; 572 574 573 575 flags = PTE_V; 574 if (vseg[vseg_id].mode & C_MODE_MASK) 575 if (vseg[vseg_id].mode & X_MODE_MASK) 576 if (vseg[vseg_id].mode & W_MODE_MASK) 577 if (vseg[vseg_id].mode & U_MODE_MASK) 576 if (vseg[vseg_id].mode & C_MODE_MASK) flags = flags | PTE_C; 577 if (vseg[vseg_id].mode & X_MODE_MASK) flags = flags | PTE_X; 578 if (vseg[vseg_id].mode & W_MODE_MASK) flags = flags | PTE_W; 579 if (vseg[vseg_id].mode & U_MODE_MASK) flags = flags | PTE_U; 578 580 579 581 #if BOOT_DEBUG_PT … … 705 707 vobj[vobj_id].paddr = cur_paddr; 706 708 707 // initiali se boot_ptabs_vaddr[] & boot_ptabs-paddr[] if PTAB709 // initialize boot_ptabs_vaddr[] & boot_ptabs-paddr[] if PTAB 708 710 if (vobj[vobj_id].type == VOBJ_TYPE_PTAB) 709 711 { … … 725 727 boot_ptabs_vaddr[vspace_id] = vobj[vobj_id].vaddr; 726 728 boot_ptabs_paddr[vspace_id] = vobj[vobj_id].paddr; 727 729 728 730 // reset all valid bits in PT1 729 731 for ( offset = 0 ; offset < 8192 ; offset = offset + 4) 730 732 { 731 boot_physical_write( 733 boot_physical_write(cur_paddr + offset, 0); 732 734 } 733 735 … … 998 1000 999 1001 for (vseg_id = vspace[vspace_id].vseg_offset; 1000 1001 1002 vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs); 1003 vseg_id++) 1002 1004 { 1003 1005 boot_vseg_map(&vseg[vseg_id], vspace_id); … … 1132 1134 boot_puts(vobj[vobj_id].name); 1133 1135 boot_puts(" / paddr = "); 1134 boot_put x(vobj[vobj_id].paddr);1136 boot_putl(vobj[vobj_id].paddr); 1135 1137 boot_puts(" / length = "); 1136 1138 boot_putx(vobj[vobj_id].length); … … 1179 1181 boot_puts(vobj[vobj_id].name); 1180 1182 boot_puts(" / Paddr :"); 1181 boot_put x(vobj[vobj_id].paddr);1183 boot_putl(vobj[vobj_id].paddr); 1182 1184 boot_puts(" / init = "); 1183 1185 boot_putx(*addr); … … 1884 1886 1885 1887 // mmu activation ( with page table [Ã] ) 1886 boot_set_mmu_ptpr( (unsigned int)(boot_ptabs_paddr[0] >> 13));1888 boot_set_mmu_ptpr((unsigned int) (boot_ptabs_paddr[0] >> 13)); 1887 1889 boot_set_mmu_mode(0xF); 1888 1890 … … 1890 1892 boot_putd(boot_proctime()); 1891 1893 boot_puts("\n"); 1894 1892 1895 1893 1896 // vobjs initialisation -
soft/giet_vm/boot/reset.S
r240 r246 52 52 53 53 # get the lock protecting TTY0 54 la k0, boot_tty0_lock55 ll k1, 0(k0)56 bnez k1, boot_excep57 li k1, 158 sc k1, 0(k0)59 beqz k1, boot_excep60 nop54 #la k0, boot_tty0_lock 55 #ll k1, 0(k0) 56 #bnez k1, boot_excep 57 #li k1, 1 58 #sc k1, 0(k0) 59 #beqz k1, boot_excep 60 #nop 61 61 62 62 # display error messages on TTY0 -
soft/giet_vm/mappings/1c_4p_four_tsar_generic_mmu.xml
r231 r246 149 149 <vseg name = "seg_stack_p" vbase = "0x00010000" mode = "C_WU" clusterid = "0" psegname = "PSEG_RAM" > 150 150 <vobj name = "stack_p" type = "BUFFER" length = "0x00010000" /> 151 </vseg>151 </vseg> 152 152 <vseg name = "seg_stack_c" vbase = "0x00020000" mode = "C_WU" clusterid = "0" psegname = "PSEG_RAM" > 153 153 <vobj name = "stack_c" type = "BUFFER" length = "0x00010000" /> -
soft/giet_vm/mappings/4c_1p_four.xml
r232 r246 246 246 <vseg name = "seg_data" vbase = "0x00800000" mode = "C_WU" clusterid = "3" psegname = "PSEG_RAM" > 247 247 <vobj name = "data" type = "ELF" length = "0x00010000" binpath = "build/display/display.elf" /> 248 </vseg>248 </vseg> 249 249 <vseg name = "seg_ptab" vbase = "0x00300000" mode = "C___" clusterid = "3" psegname = "PSEG_RAM" > 250 250 <vobj name = "ptab" type = "PTAB" length = "0x00012000" align = "13" /> -
soft/giet_vm/sys/ctx_handler.c
r238 r246 105 105 unsigned int* curr_ctx_vaddr = &(psched->context[curr_task_id][0]); 106 106 unsigned int* next_ctx_vaddr = &(psched->context[next_task_id][0]); 107 unsigned int procid = _procid(); 108 unsigned int local_id = procid % NB_PROCS_MAX; 109 unsigned int cluster_id = procid / NB_PROCS_MAX; 107 110 108 111 // set current task index 109 112 psched->current = next_task_id; 110 113 111 //_timer_reset_irq_cpt(cluster_id, local_id); 112 // commented until not properly supported in soclib 113 // (the function is not yet present in drivers.c) 114 _timer_reset_irq_cpt(cluster_id, local_id); 114 115 115 116 _task_switch(curr_ctx_vaddr, next_ctx_vaddr); -
soft/giet_vm/sys/drivers.c
r238 r246 248 248 249 249 250 //////////////////////////////////////////////// 250 251 /////////////////////////////////////////////////////////////////////// 251 252 // _timer_reset_irq_cpt() 252 //////////////////////////////////////////////// 253 //unsigned int _timer_reset_irq_cpt(unsigned int cluster_id, unsigned int local_id) { 254 // // parameters checking 255 // if (cluster_id >= NB_CLUSTERS) { 256 // return 1; 257 // } 258 // if (local_id >= NB_TIM_CHANNELS) { 259 // return 2; 260 // } 261 // 262 //#if USE_XICU 263 //#error // not implemented 264 //#else 265 // unsigned int * timer_address = (unsigned int *) ((char *) &seg_tim_base + (cluster_id * GIET_CLUSTER_INCREMENT)); 266 // unsigned int timer_period = timer_address[local_id * TIMER_SPAN + TIMER_PERIOD]; 267 // 268 // timer_address[local_id * TIMER_SPAN + TIMER_PERIOD] = timer_period; 269 //#endif 270 // 271 // return 0; 272 //} 253 /////////////////////////////////////////////////////////////////////// 254 // This function resets the period at the end of which 255 // an interrupt is sent. To do so, we re-write the period 256 // ini the proper register, what causes the count to restart. 257 // The period value is read from the same (TIMER_PERIOD) register, 258 // this is why in appearance we do nothing useful (read a value 259 // from a register and write this value in the same register) 260 // This function is called during a context switch (user or preemptive) 261 /////////////////////////////////////////////////////////////////////// 262 unsigned int _timer_reset_irq_cpt(unsigned int cluster_id, unsigned int local_id) { 263 // parameters checking 264 if (cluster_id >= NB_CLUSTERS) { 265 return 1; 266 } 267 if (local_id >= NB_TIM_CHANNELS) { 268 return 2; 269 } 270 271 #if USE_XICU 272 unsigned int * timer_address = (unsigned int *) ((char *) &seg_icu_base + (cluster_id * GIET_CLUSTER_INCREMENT)); 273 unsigned int timer_period = timer_address[XICU_REG(XICU_PTI_PER, local_id)]; 274 275 // we write 0 first because if the timer is currently running, the corresponding timer counter is not reset 276 timer_address[XICU_REG(XICU_PTI_PER, local_id)] = 0; 277 timer_address[XICU_REG(XICU_PTI_PER, local_id)] = timer_period; 278 #else 279 // We suppose that the TIMER_MODE register value is 0x3 280 unsigned int * timer_address = (unsigned int *) ((char *) &seg_tim_base + (cluster_id * GIET_CLUSTER_INCREMENT)); 281 unsigned int timer_period = timer_address[local_id * TIMER_SPAN + TIMER_PERIOD]; 282 283 timer_address[local_id * TIMER_SPAN + TIMER_PERIOD] = timer_period; 284 #endif 285 286 return 0; 287 } 273 288 274 289 … … 599 614 unsigned int buf_xaddr = 0; // user buffer virtual address in IO space (if IOMMU) 600 615 paddr_t buf_paddr = 0; // user buffer physical address (if no IOMMU), 601 616 602 617 // check buffer alignment 603 618 if ((unsigned int) user_vaddr & 0x3) … … 626 641 { 627 642 // get ppn and flags for each vpn 628 unsigned int ko = _v2p_translate( (page_table_t*)user_pt_vbase,629 vpn,630 &ppn,631 643 unsigned int ko = _v2p_translate((page_table_t *) user_pt_vbase, 644 vpn, 645 &ppn, 646 &flags); 632 647 // check access rights 633 if (ko) 648 if (ko) 634 649 { 635 650 _get_lock(&_tty_put_lock); … … 1254 1269 // - length : number of bytes to be transfered. 1255 1270 ////////////////////////////////////////////////////////////////////////////////// 1256 unsigned int _fb_sync_write( unsigned int offset, 1257 const void* buffer, 1258 unsigned int length) 1259 { 1260 unsigned char* fb_address = (unsigned char *) &seg_fbf_base + offset; 1271 1272 unsigned int _fb_sync_write(unsigned int offset, 1273 const void * buffer, 1274 unsigned int length) 1275 { 1276 unsigned char * fb_address = (unsigned char *) &seg_fbf_base + offset; 1261 1277 memcpy((void *) fb_address, (void *) buffer, length); 1262 1278 return 0; -
soft/giet_vm/sys/drivers.h
r237 r246 19 19 unsigned int _timer_stop(unsigned int cluster_id, unsigned int local_id); 20 20 unsigned int _timer_reset_irq(unsigned int cluster_id, unsigned int local_id); 21 //unsigned int _timer_reset_irq_cpt(unsigned int cluster_id, unsigned int local_id);21 unsigned int _timer_reset_irq_cpt(unsigned int cluster_id, unsigned int local_id); 22 22 23 23 -
soft/giet_vm/sys/irq_handler.c
r238 r246 152 152 { 153 153 // save status & reset IRQ 154 if (_ioc_get_status((unsigned int *) &_ioc_status 154 if (_ioc_get_status((unsigned int *) &_ioc_status)) 155 155 { 156 156 _get_lock(&_tty_put_lock); -
soft/giet_vm/sys/kernel_init.c
r238 r246 63 63 64 64 65 65 66 ////////////////////////////////////////////////////////////////////////////////// 66 67 // This function is the entry point for the last step of the boot sequence. … … 101 102 for (ltid = 0; ltid < tasks; ltid++) 102 103 { 103 unsigned int vsid 104 unsigned int ptab 105 unsigned int ptpr 104 unsigned int vsid = _get_task_slot(ltid , CTX_VSID_ID); 105 unsigned int ptab = _get_task_slot(ltid , CTX_PTAB_ID); 106 unsigned int ptpr = _get_task_slot(ltid , CTX_PTPR_ID); 106 107 107 108 _ptabs[vsid] = ptab; -
soft/giet_vm/sys/vm_handler.c
r238 r246 38 38 39 39 // get ptba and update PT2 40 if ((pt->pt1[ix1] & PTE_V) == 0) { 40 if ((pt->pt1[ix1] & PTE_V) == 0) 41 { 41 42 _puts("\n[GIET ERROR] in iommu_add_pte2 function\n"); 42 43 _puts("the IOMMU PT1 entry is not mapped / ix1 = "); … … 66 67 67 68 // get ptba and inval PTE2 68 if ((pt->pt1[ix1] & PTE_V) == 0) { 69 if ((pt->pt1[ix1] & PTE_V) == 0) 70 { 69 71 _puts("\n[GIET ERROR] in iommu_inval_pte2 function\n"); 70 72 _puts("the IOMMU PT1 entry is not mapped / ix1 = "); … … 85 87 // Returns 0 if success, 1 if PTE1 or PTE2 unmapped 86 88 ////////////////////////////////////////////////////////////////////////////// 87 unsigned int _v2p_translate( page_table_t*pt,88 unsigned intvpn,89 unsigned int* ppn,90 unsigned int* flags)89 unsigned int _v2p_translate(page_table_t * pt, 90 unsigned int vpn, 91 unsigned int * ppn, 92 unsigned int * flags) 91 93 { 92 paddr_t 93 paddr_t 94 paddr_t ptba; 95 paddr_t pte2; 94 96 95 register unsigned int 96 register unsigned int 97 register unsigned int 98 register unsigned int 97 register unsigned int pte2_msb; 98 register unsigned int pte2_lsb; 99 register unsigned int flags_value; 100 register unsigned int ppn_value; 99 101 100 102 unsigned int ix1 = vpn >> 9; … … 102 104 103 105 // check PTE1 mapping 104 if ((pt->pt1[ix1] & PTE_V) == 0) return 1; 106 if ((pt->pt1[ix1] & PTE_V) == 0) 107 { 108 return 1; 109 } 105 110 else 106 111 { 107 112 // get physical addresses of pte2 108 ptba = (paddr_t) (pt->pt1[ix1] & 0x0FFFFFFF) << 12;109 pte2 = ptba + 8 *ix2;110 pte2_lsb = (unsigned int) pte2;111 pte2_msb = (unsigned int) (pte2 >> 32);113 ptba = (paddr_t) (pt->pt1[ix1] & 0x0FFFFFFF) << 12; 114 pte2 = ptba + 8 * ix2; 115 pte2_lsb = (unsigned int) pte2; 116 pte2_msb = (unsigned int) (pte2 >> 32); 112 117 113 118 // gets ppn_value and flags_value, after temporary DTLB desactivation … … 135 140 136 141 // check PTE2 mapping 137 if ((flags_value & PTE_V) == 0) return 1; 142 if ((flags_value & PTE_V) == 0) { 143 return 1; 144 } 138 145 139 146 // set return values
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