Changeset 316 for soft/giet_vm/giet_boot/boot.c
- Timestamp:
- Jun 8, 2014, 4:48:49 PM (10 years ago)
- File:
-
- 1 edited
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soft/giet_vm/giet_boot/boot.c
r309 r316 412 412 413 413 flags = PTE_V; 414 if (vseg[vseg_id].mode & C_MODE_MASK) flags = flags | PTE_C; 415 if (vseg[vseg_id].mode & X_MODE_MASK) flags = flags | PTE_X; 416 if (vseg[vseg_id].mode & W_MODE_MASK) flags = flags | PTE_W; 417 if (vseg[vseg_id].mode & U_MODE_MASK) flags = flags | PTE_U; 414 if (vseg[vseg_id].mode & C_MODE_MASK) flags |= PTE_C; 415 if (vseg[vseg_id].mode & X_MODE_MASK) flags |= PTE_X; 416 if (vseg[vseg_id].mode & W_MODE_MASK) flags |= PTE_W; 417 if (vseg[vseg_id].mode & U_MODE_MASK) flags |= PTE_U; 418 419 // These three flags (Local, Remote and Dirty) are set to 1 to reduce 420 // latency of TLB miss (L/R) and write (D): Avoid hardware update 421 // mechanism for these flags. This optimization can be performed 422 // because GIET_VM does nothing with these flags. 423 424 flags |= PTE_L; 425 flags |= PTE_R; 426 flags |= PTE_D; 418 427 419 428 #if BOOT_DEBUG_PT … … 445 454 446 455 flags = PTE_V; 447 if (vseg[vseg_id].mode & C_MODE_MASK) flags = flags | PTE_C; 448 if (vseg[vseg_id].mode & X_MODE_MASK) flags = flags | PTE_X; 449 if (vseg[vseg_id].mode & W_MODE_MASK) flags = flags | PTE_W; 450 if (vseg[vseg_id].mode & U_MODE_MASK) flags = flags | PTE_U; 456 if (vseg[vseg_id].mode & C_MODE_MASK) flags |= PTE_C; 457 if (vseg[vseg_id].mode & X_MODE_MASK) flags |= PTE_X; 458 if (vseg[vseg_id].mode & W_MODE_MASK) flags |= PTE_W; 459 if (vseg[vseg_id].mode & U_MODE_MASK) flags |= PTE_U; 460 461 // Flags set for optimization (as explained above) 462 463 flags |= PTE_L; 464 flags |= PTE_R; 465 flags |= PTE_D; 451 466 452 467 #if BOOT_DEBUG_PT … … 2049 2064 case PERIPH_TYPE_IOB: // vci_io_bridge component 2050 2065 { 2066 #if 0 2051 2067 // initialize r_xicu_base & r_xicu_size registers 2052 2068 unsigned int base = (unsigned int)&seg_xcu_base; … … 2073 2089 // pseg_base[IOB_IOMMU_ACTIVE] = 1; 2074 2090 } 2091 #endif 2075 2092 break; 2076 2093 }
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