Changeset 345 for soft/giet_vm/giet_drivers/mmc_driver.c
- Timestamp:
- Jun 25, 2014, 2:19:37 PM (10 years ago)
- File:
-
- 1 edited
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soft/giet_vm/giet_drivers/mmc_driver.c
r333 r345 21 21 #include <tty_driver.h> 22 22 #include <utils.h> 23 #include <io.h> 23 24 24 25 #if !defined(X_SIZE) … … 46 47 #endif 47 48 49 /////////////////////////////////////////////////////////////////////////////// 50 // This low level function returns the value contained in register "index" 51 // in the MMC component contained in cluster "cluster_xy" 52 /////////////////////////////////////////////////////////////////////////////// 53 static 54 unsigned int _mmc_get_register( unsigned int cluster_xy, // cluster index 55 unsigned int func, // function index 56 unsigned int index ) // register index 57 { 58 unsigned int vaddr = 59 SEG_MMC_BASE + 60 (cluster_xy * PERI_CLUSTER_INCREMENT) + 61 (MMC_REG(func, index) << 2); 62 63 return ioread32( (void*)vaddr ); 64 } 65 66 /////////////////////////////////////////////////////////////////////////////// 67 // This low level function sets a new value in register "index" 68 // in the MMC component contained in cluster "cluster_xy" 69 /////////////////////////////////////////////////////////////////////////////// 70 static 71 void _mmc_set_register( unsigned int cluster_xy, // cluster index 72 unsigned int func, // func index 73 unsigned int index, // register index 74 unsigned int value ) // value to be written 75 { 76 unsigned int vaddr = 77 SEG_MMC_BASE + 78 (cluster_xy * PERI_CLUSTER_INCREMENT) + 79 (MMC_REG(func, index) << 2); 80 81 iowrite32( (void*)vaddr, value ); 82 } 83 48 84 /////////////////////////////////////////////////////////////////////////////////// 49 85 // This function invalidates all cache lines covering a memory buffer defined … … 67 103 } 68 104 69 unsigned int* mmc_address = (unsigned int*)( SEG_MMC_BASE +70 (cluster_xy * PERI_CLUSTER_INCREMENT) );71 72 105 // get the hard lock protecting exclusive access to MEMC 73 while ( mmc_address[MEMC_LOCK] ) { asm volatile("nop"); }106 while ( _mmc_get_register(cluster_xy, 0, MEMC_LOCK) ); 74 107 75 108 // write inval arguments 76 mmc_address[MEMC_ADDR_LO] = (unsigned int)buf_paddr;77 mmc_address[MEMC_ADDR_HI] = (unsigned int)(buf_paddr>>32);78 mmc_address[MEMC_BUF_LENGTH] = buf_length;79 mmc_address[MEMC_CMD_TYPE] = MEMC_CMD_INVAL;109 _mmc_set_register(cluster_xy, 0, MEMC_ADDR_LO , (unsigned int)buf_paddr); 110 _mmc_set_register(cluster_xy, 0, MEMC_ADDR_HI , (unsigned int)(buf_paddr>>32)); 111 _mmc_set_register(cluster_xy, 0, MEMC_BUF_LENGTH, buf_length); 112 _mmc_set_register(cluster_xy, 0, MEMC_CMD_TYPE , MEMC_CMD_INVAL); 80 113 81 114 // release the lock 82 mmc_address[MEMC_LOCK] = 0;115 _mmc_set_register(cluster_xy, 0, MEMC_LOCK, 0); 83 116 } 84 117 /////////////////////////////////////////////////////////////////////////////////// … … 103 136 } 104 137 105 unsigned int* mmc_address = (unsigned int*)( SEG_MMC_BASE +106 (cluster_xy * PERI_CLUSTER_INCREMENT) );107 108 138 // get the hard lock protecting exclusive access to MEMC 109 while ( mmc_address[MEMC_LOCK] ) { asm volatile("nop"); }139 while ( _mmc_get_register(cluster_xy, 0, MEMC_LOCK) ); 110 140 111 141 // write inval arguments 112 mmc_address[MEMC_ADDR_LO] = (unsigned int)buf_paddr;113 mmc_address[MEMC_ADDR_HI] = (unsigned int)(buf_paddr>>32);114 mmc_address[MEMC_BUF_LENGTH] = buf_length;115 mmc_address[MEMC_CMD_TYPE] = MEMC_CMD_SYNC;142 _mmc_set_register(cluster_xy, 0, MEMC_ADDR_LO , (unsigned int)buf_paddr); 143 _mmc_set_register(cluster_xy, 0, MEMC_ADDR_HI , (unsigned int)(buf_paddr>>32)); 144 _mmc_set_register(cluster_xy, 0, MEMC_BUF_LENGTH, buf_length); 145 _mmc_set_register(cluster_xy, 0, MEMC_CMD_TYPE , MEMC_CMD_SYNC); 116 146 117 // release the lock protecting MEMC118 mmc_address[MEMC_LOCK] = 0;147 // release the lock 148 _mmc_set_register(cluster_xy, 0, MEMC_LOCK, 0); 119 149 } 120 150
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