Changeset 481 for soft/giet_vm/giet_drivers/mmc_driver.c

Timestamp:

Jan 1, 2015, 8:23:48 PM (10 years ago)

Author:

alain

Message:

1) The NIC, IOC, DMA and HBA drivers have been adapted to support the new _v2p_translate() function prototype (returns void).
2) The _mmc_inval() and _mmc_sync() functions does not use anymore the hard lock in the MMC, but use a soft spin_lock.
3) The NIC driver does not use anymore the GIET_NIC_BUFSIZE, GIET_NIC_NBUFS, and GIET_NIC_TIMEOUT parameters (removed from giet_config.h file).
4) The NIC driver registers map has been modified to support 64 bytes buffer descriptors for chained buffers.

File:

• soft/giet_vm/giet_drivers/mmc_driver.c (modified) (4 diffs)

soft/giet_vm/giet_drivers/mmc_driver.c

@@ -6 +6 @@
 ///////////////////////////////////////////////////////////////////////////////////
 
-#include <giet_config.h>
+#include <hard_config.h>
 #include <mmc_driver.h>
 #include <tty0.h>
+#include <locks.h>
 #include <utils.h>
+
 #include <io.h>
 
@@ -89 +91 @@
     }
 
-    // get the hard lock protecting exclusive access to MEMC
-    while ( _mmc_get_register(cluster_xy, 0, MEMC_LOCK) );
+    // get the hard queuing lock protecting exclusive access to MEMC
+    _spin_lock_acquire( &_mmc_lock[x][y] );
 
     // write inval arguments
-    _mmc_set_register(cluster_xy, 0, MEMC_ADDR_LO   , (unsigned int)buf_paddr);
-    _mmc_set_register(cluster_xy, 0, MEMC_ADDR_HI   , (unsigned int)(buf_paddr>>32));
-    _mmc_set_register(cluster_xy, 0, MEMC_BUF_LENGTH, buf_length);
-    _mmc_set_register(cluster_xy, 0, MEMC_CMD_TYPE  , MEMC_CMD_INVAL);
+    _mmc_set_register( cluster_xy , 0 , MEMC_ADDR_LO   , (unsigned int)buf_paddr );
+    _mmc_set_register( cluster_xy , 0 , MEMC_ADDR_HI   , (unsigned int)(buf_paddr>>32) );
+    _mmc_set_register( cluster_xy , 0 , MEMC_BUF_LENGTH, buf_length );
+    _mmc_set_register( cluster_xy , 0 , MEMC_CMD_TYPE  , MEMC_CMD_INVAL );
 
     // release the lock 
-    _mmc_set_register(cluster_xy, 0, MEMC_LOCK, 0);
+    _spin_lock_release( &_mmc_lock[x][y] );
 }
 
@@ -118 +120 @@
     }
 
-    // get the hard lock protecting exclusive access to MEMC
-    while ( _mmc_get_register(cluster_xy, 0, MEMC_LOCK) );
+    // get the hard queuing lock protecting exclusive access to MEMC
+    _spin_lock_acquire( &_mmc_lock[x][y] );
 
     // write inval arguments
@@ -128 +130 @@
 
     // release the lock 
-    _mmc_set_register(cluster_xy, 0, MEMC_LOCK, 0);
+    _spin_lock_release( &_mmc_lock[x][y] );
 }