Ignore:
Timestamp:
Jul 15, 2015, 6:13:17 PM (9 years ago)
Author:
bellefin
Message:

CMA driver: update the channel status values of the CMA component

Location:
soft/giet_vm/giet_drivers
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • soft/giet_vm/giet_drivers/cma_driver.c

    r506 r612  
    5252        _puts("impossible access to source chbuf descriptor\n");
    5353
    54     else if (status == CHANNEL_SRC_DATA_ERROR )
    55         _puts("impossible access to source data buffer\n");
     54    else if (status == CHANNEL_SRC_STATUS_ERROR )
     55        _puts("impossible access to source buffer status\n");
    5656
    5757    else if (status == CHANNEL_DST_DESC_ERROR )
    5858        _puts("impossible access to destination chbuf descriptor\n");
    5959
    60     else if (status == CHANNEL_DST_DATA_ERROR )
    61         _puts("impossible access to destination data buffer\n");
     60    else if (status == CHANNEL_DST_STATUS_ERROR )
     61        _puts("impossible access to destination buffer status\n");
     62
     63    else if (status == CHANNEL_DATA_ERROR )
     64        _puts("impossible access to source or destination data buffer\n");
    6265
    6366    else
  • soft/giet_vm/giet_drivers/cma_driver.h

    r506 r612  
    5454    CHANNEL_IDLE,
    5555
    56     CHANNEL_SRC_DATA_ERROR,
    57     CHANNEL_DST_DATA_ERROR,
     56    CHANNEL_DATA_ERROR,
    5857    CHANNEL_SRC_DESC_ERROR,
    5958    CHANNEL_DST_DESC_ERROR,
     59    CHANNEL_SRC_STATUS_ERROR,
     60    CHANNEL_DST_STATUS_ERROR,
    6061
     62    CHANNEL_READ_SRC_DESC,
     63    CHANNEL_READ_SRC_DESC_WAIT,
    6164    CHANNEL_READ_SRC_STATUS,
    6265    CHANNEL_READ_SRC_STATUS_WAIT,
    6366    CHANNEL_READ_SRC_STATUS_DELAY,
    64     CHANNEL_READ_SRC_BUFADDR,
    65     CHANNEL_READ_SRC_BUFADDR_WAIT,
    6667
     68    CHANNEL_READ_DST_DESC,
     69    CHANNEL_READ_DST_DESC_WAIT,
    6770    CHANNEL_READ_DST_STATUS,
    6871    CHANNEL_READ_DST_STATUS_WAIT,
    6972    CHANNEL_READ_DST_STATUS_DELAY,
    70     CHANNEL_READ_DST_BUFADDR,
    71     CHANNEL_READ_DST_BUFADDR_WAIT,
    7273
    73     CHANNEL_READ_BURST,
    74     CHANNEL_READ_REQ_FIRST,
    75     CHANNEL_READ_WAIT_FIRST,
    76     CHANNEL_READ_REQ_SECOND,
    77     CHANNEL_READ_WAIT_SECOND,
    78 
    79     CHANNEL_WRITE_BURST,
    80     CHANNEL_WRITE_REQ_FIRST,
    81     CHANNEL_WRITE_WAIT_FIRST,
    82     CHANNEL_WRITE_REQ_SECOND,
    83     CHANNEL_WRITE_WAIT_SECOND,
     74    CHANNEL_BURST,
     75    CHANNEL_READ_REQ,
     76    CHANNEL_READ_REQ_WAIT,
     77    CHANNEL_RSP_WAIT,
     78    CHANNEL_WRITE_REQ,
     79    CHANNEL_WRITE_REQ_WAIT,
     80    CHANNEL_BURST_RSP_WAIT,
    8481
    8582    CHANNEL_SRC_STATUS_WRITE,
     
    8784    CHANNEL_DST_STATUS_WRITE,
    8885    CHANNEL_DST_STATUS_WRITE_WAIT,
    89     CHANNEL_SRC_NEXT_BUFFER,
    90     CHANNEL_DST_NEXT_BUFFER,
     86    CHANNEL_NEXT_BUFFERS,
    9187};
    9288
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