Changeset 613 for soft/giet_vm/giet_drivers
- Timestamp:
- Jul 15, 2015, 6:14:15 PM (9 years ago)
- Location:
- soft/giet_vm/giet_drivers
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
soft/giet_vm/giet_drivers/nic_driver.c
r481 r613 126 126 unsigned int extend = (X_IO << Y_WIDTH) + Y_IO; 127 127 128 unsigned int buf_0_addr; 129 unsigned int buf_1_addr; 130 unsigned int sts_0_addr; 131 unsigned int sts_1_addr; 132 133 unsigned int desc_lo_0; 134 unsigned int desc_lo_1; 135 unsigned int desc_hi_0; 136 unsigned int desc_hi_1; 137 128 138 if ( is_rx ) 129 139 { 130 _nic_set_channel_register( channel, NIC_RX_DESC_LO_0, base ); 131 _nic_set_channel_register( channel, NIC_RX_DESC_LO_1, base + 0x1000 ); 132 _nic_set_channel_register( channel, NIC_RX_DESC_HI_0, extend ); 133 _nic_set_channel_register( channel, NIC_RX_DESC_HI_1, extend ); 140 buf_0_addr = base; 141 buf_1_addr = base + 0x1000; 142 sts_0_addr = base + 0x4000; 143 sts_1_addr = base + 0x4040; 144 145 desc_lo_0 = (sts_0_addr >> 6) + ((buf_0_addr & 0xFC0) << 20); 146 desc_lo_1 = (sts_1_addr >> 6) + ((buf_1_addr & 0xFC0) << 20); 147 desc_hi_0 = ((buf_0_addr & 0xFFFFF000) >> 12) + ((extend & 0xFFF) << 20); 148 desc_hi_1 = ((buf_1_addr & 0xFFFFF000) >> 12) + ((extend & 0xFFF) << 20); 149 150 _nic_set_channel_register( channel, NIC_RX_DESC_LO_0, desc_lo_0 ); 151 _nic_set_channel_register( channel, NIC_RX_DESC_LO_1, desc_lo_1 ); 152 _nic_set_channel_register( channel, NIC_RX_DESC_HI_0, desc_hi_0 ); 153 _nic_set_channel_register( channel, NIC_RX_DESC_HI_1, desc_hi_1 ); 134 154 _nic_set_channel_register( channel, NIC_RX_RUN , 1 ); 135 155 } 136 156 else 137 157 { 138 _nic_set_channel_register( channel, NIC_TX_DESC_LO_0, base + 0x2000 ); 139 _nic_set_channel_register( channel, NIC_TX_DESC_LO_1, base + 0x3000 ); 140 _nic_set_channel_register( channel, NIC_TX_DESC_HI_0, extend ); 141 _nic_set_channel_register( channel, NIC_TX_DESC_HI_1, extend ); 158 buf_0_addr = base + 0x2000; 159 buf_1_addr = base + 0x3000; 160 sts_0_addr = base + 0x4080; 161 sts_1_addr = base + 0x40c0; 162 163 desc_lo_0 = (sts_0_addr >> 6) + ((buf_0_addr & 0xFC0) << 20); 164 desc_lo_1 = (sts_1_addr >> 6) + ((buf_1_addr & 0xFC0) << 20); 165 desc_hi_0 = ((buf_0_addr & 0xFFFFF000) >> 12) + ((extend & 0xFFF) << 20); 166 desc_hi_1 = ((buf_1_addr & 0xFFFFF000) >> 12) + ((extend & 0xFFF) << 20); 167 168 _nic_set_channel_register( channel, NIC_TX_DESC_LO_0, desc_lo_0 ); 169 _nic_set_channel_register( channel, NIC_TX_DESC_LO_1, desc_lo_1 ); 170 _nic_set_channel_register( channel, NIC_TX_DESC_HI_0, desc_hi_0 ); 171 _nic_set_channel_register( channel, NIC_TX_DESC_HI_1, desc_hi_1 ); 142 172 _nic_set_channel_register( channel, NIC_TX_RUN , 1 ); 143 173 } -
soft/giet_vm/giet_drivers/nic_driver.h
r481 r613 78 78 ////////////////////////////////////////////////////////////////////////////////////////////// 79 79 // Channel Addressable Registers 80 // A buffer descriptor occupies 64 bytes, but only 8 bytes (two 32 bits words) are useful: 81 // LOW WORD contains the 32 LSB bits of the buffer paddr 82 // HIGH WORD contains the 16 MSB bits of the buffer paddr, plus status (bit 31) 83 ////////////////////////////////////////////////////////////////////////////////////////////// 80 // A buffer descriptor occupies 8 bytes (two 32 bits words): 81 // - the 26 LSB bits of LOW WORD contain bits[31:6] of the buffer satus paddr 82 // - bits[31:26] of LOW WORD and bits[19:0] of HIGH WORD contain bits[31:6] of the buffer paddr 83 // - the 12 MSB bits of HIGH WORD contain the common address extension of the buffer and its status 84 // The buffer status occupies 64 bytes but only the last bit is useful (1 for full and 0 for empty) 85 // The buffer address and its status address must be 64 bytes aligned (bits[5:0] equal to 0) 86 /////////////////////////////////////////////////////////////////////////////////////////////// 84 87 85 88 enum SoclibMultiNicChannelRegisters 86 89 { 87 NIC_RX_DESC_LO_0 = 0, // RX_0 descriptor low word (Read/Write) 88 NIC_RX_DESC_HI_0 = 1, // RX_0 descriptor high word (Read/Write) 89 NIC_RX_DESC_LO_1 = 16, // RX_1 descriptor low word (Read/Write) 90 NIC_RX_DESC_HI_1 = 17, // RX_1 descriptor high word (Read/Write) 91 NIC_TX_DESC_LO_0 = 32, // TX_0 descriptor low word (Read/Write) 92 NIC_TX_DESC_HI_0 = 33, // TX_0 descriptor high word (Read/Write) 93 NIC_TX_DESC_LO_1 = 48, // TX_1 descriptor low word (Read/Write) 94 NIC_TX_DESC_HI_1 = 49, // TX_1 descriptor high word (Read/Write) 95 NIC_MAC_4 = 64, // channel mac address 32 LSB bits (Read Only) 96 NIC_MAC_2 = 65, // channel mac address 16 LSB bits (Read Only) 97 NIC_RX_RUN = 66, // RX packets can be received (write_only) 98 NIC_TX_RUN = 67, // TX packets can be transmitted (write_only) 90 NIC_RX_STS_0 = 0, // RX_0 status (full or empty) (Read/Write) 91 NIC_RX_STS_1 = 16, // RX_1 status (full or empty) (Read/Write) 92 NIC_TX_STS_0 = 32, // TX_0 status (full or empty) (Read/Write) 93 NIC_TX_STS_1 = 48, // TX_1 status (full or empty) (Read/Write) 94 NIC_RX_DESC_LO_0 = 64, // RX_0 descriptor low word (Read/Write) 95 NIC_RX_DESC_HI_0 = 65, // RX_0 descriptor high word (Read/Write) 96 NIC_RX_DESC_LO_1 = 66, // RX_1 descriptor low word (Read/Write) 97 NIC_RX_DESC_HI_1 = 67, // RX_1 descriptor high word (Read/Write) 98 NIC_TX_DESC_LO_0 = 68, // TX_0 descriptor low word (Read/Write) 99 NIC_TX_DESC_HI_0 = 69, // TX_0 descriptor high word (Read/Write) 100 NIC_TX_DESC_LO_1 = 70, // TX_1 descriptor low word (Read/Write) 101 NIC_TX_DESC_HI_1 = 71, // TX_1 descriptor high word (Read/Write) 102 NIC_MAC_4 = 72, // channel mac address 32 LSB bits (Read Only) 103 NIC_MAC_2 = 73, // channel mac address 16 LSB bits (Read Only) 104 NIC_RX_RUN = 74, // RX packets can be received (write_only) 105 NIC_TX_RUN = 75, // TX packets can be transmitted (write_only) 99 106 }; 100 107
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