Changeset 631

Timestamp:

Jul 18, 2015, 3:14:25 PM (9 years ago)

Author:

alain

Message:

Adapt the boot code to the new NORUN bit-vector mechanism in task context.

File:

• soft/giet_vm/giet_boot/boot.c (modified) (10 diffs)

soft/giet_vm/giet_boot/boot.c

@@ -20 +20 @@
 // - build the various page tables (one page table per vspace). 
 // - initialize the shedulers (one scheduler per processor).
-// - initialize the external peripherals.
 //
 // 1) The binary files to be loaded are:
-//    - the "map.bin" file contains the hardware architecture description and the
-//      mapping directives. It must be stored in the the seg_boot_mapping segment 
+//    - the "map.bin" file contains the hardware architecture description, 
+//      the set of user applications that will be mapped on the architecture, 
+//      and the mapping directives. The mapping includes the placement of tasks 
+//      on processors, and the placement of virtual segments on the physical 
+//      segments. It must be stored in the the seg_boot_mapping segment 
 //      (at address SEG_BOOT_MAPPING_BASE defined in hard_config.h file).
 //    - the "kernel.elf" file contains the kernel binary code and data.
 //    - the various "application.elf" files.
 //
-// 2) The "map.bin" file contains the C binary structure defining: 
-//    - the hardware architecture: number of clusters, number or processors, 
-//      size of the memory segments, and peripherals in each cluster.
-//    - The structure of the various multi-threaded software applications:
-//      number of tasks, communication channels.
-//    - The mapping: placement of virtual segments (vseg) in the physical 
-//      segments (pseg), placement of software tasks on the processors, 
-//
-// 3) The GIET-VM uses the paged virtual memory to provides two services:
+// 2) The GIET-VM uses the paged virtual memory to provides two services:
 //    - classical memory protection, when several independant applications compiled
 //      in different virtual spaces are executing on the same hardware platform.
 //    - data placement in NUMA architectures, to control the placement 
 //      of the software objects (vsegs) on the physical memory banks (psegs).
-//
 //    The max number of vspaces (GIET_NB_VSPACE_MAX) is a configuration parameter.
-//    For each application, the tasks are statically allocateded on processors.
 //    The page table are statically build in the boot phase, and they do not 
-//    change during execution. 
+//    change during execution. For each application, the page tables are replicated
+//    in all clusters.
 //    The GIET_VM uses both small pages (4 Kbytes), and big pages (2 Mbytes). 
-//
 //    Each page table (one page table per virtual space) is monolithic, and 
 //    contains one PT1 (8 Kbytes) and a variable number of PT2s (4 Kbytes each). 
-//    For each vspace, the number of PT2s is defined by the size of the PTAB vseg 
-//    in the mapping.
+//    For each vspace, the max number of PT2s is defined by the size of the PTAB 
+//    vseg in the mapping.
 //    The PT1 is indexed by the ix1 field (11 bits) of the VPN. An entry is 32 bits.
 //    A PT2 is indexed the ix2 field (9 bits) of the VPN. An entry is 64 bits.
 //    The first word contains the flags, the second word contains the PPN.
-//    The page tables are distributed/replicated in all clusters.
+//
+// 3) The Giet-VM implement one private scheduler per processor.
+//    For each application, the tasks are statically allocated to processors
+//    and there is no task migration during execution.
+//    Each sheduler occupies 8K bytes, and contains up to 14 task contexts 
+//    The task context [13] is reserved for the "idle" task that does nothing, and
+//    is launched by the scheduler when there is no other runable task.
 ///////////////////////////////////////////////////////////////////////////////////
 // Implementation Notes:
@@ -83 +81 @@
 #include <mwr_driver.h>
 #include <dma_driver.h>
+#include <mmc_driver.h>
 #include <ctx_handler.h>
 #include <irq_handler.h>
@@ -164 +163 @@
 unsigned int        _tty0_boot_mode = 1;
 
-// boot code does not use distributed locks to protect MMC
-__attribute__((section(".kdata")))
-unsigned int        _mmc_boot_mode = 1;
-
 // boot code does not uses a lock to protect HBA command allocator
 __attribute__((section(".kdata")))
@@ -183 +178 @@
 //////////////////////////////////////////////////////////////////////////////
 
-// this variable is defined in the tty0.c file
+// this variable is allocated in the tty0.c file
 extern spin_lock_t  _tty0_spin_lock;
+
+// this variable is allocated in the mmc_driver.c
+extern unsigned int _mmc_boot_mode;
 
 extern void boot_entry();
@@ -1077 +1075 @@
         // - slots containing addresses (SP,RA,EPC) are initialised by kernel_init()
 
-        psched->context[IDLE_TASK_INDEX][CTX_CR_ID]   = 0;
-        psched->context[IDLE_TASK_INDEX][CTX_SR_ID]   = 0xFF03;
-        psched->context[IDLE_TASK_INDEX][CTX_PTPR_ID] = _ptabs_paddr[0][x][y]>>13;
-        psched->context[IDLE_TASK_INDEX][CTX_PTAB_ID] = _ptabs_vaddr[0][x][y];
-        psched->context[IDLE_TASK_INDEX][CTX_TTY_ID]  = 0;
-        psched->context[IDLE_TASK_INDEX][CTX_LTID_ID] = IDLE_TASK_INDEX;
-        psched->context[IDLE_TASK_INDEX][CTX_VSID_ID] = 0;
-        psched->context[IDLE_TASK_INDEX][CTX_RUN_ID]  = 1;
+        psched->context[IDLE_TASK_INDEX][CTX_CR_ID]    = 0;
+        psched->context[IDLE_TASK_INDEX][CTX_SR_ID]    = 0xFF03;
+        psched->context[IDLE_TASK_INDEX][CTX_PTPR_ID]  = _ptabs_paddr[0][x][y]>>13;
+        psched->context[IDLE_TASK_INDEX][CTX_PTAB_ID]  = _ptabs_vaddr[0][x][y];
+        psched->context[IDLE_TASK_INDEX][CTX_TTY_ID]   = 0;
+        psched->context[IDLE_TASK_INDEX][CTX_LTID_ID]  = IDLE_TASK_INDEX;
+        psched->context[IDLE_TASK_INDEX][CTX_VSID_ID]  = 0;
+        psched->context[IDLE_TASK_INDEX][CTX_NORUN_ID] = 0;
     }
 
@@ -1237 +1235 @@
             unsigned int req_p      = task[task_id].proclocid;                 
 
-            // ctx_sr : value required before an eret instruction
-            unsigned int ctx_sr = 0x2000FF13;
-
             // ctx_ptpr : page table physical base address (shifted by 13 bit)
             unsigned int ctx_ptpr = (_ptabs_paddr[vspace_id][req_x][req_y] >> 13);
@@ -1277 +1272 @@
                     // initializes the task context 
                     psched->context[ltid][CTX_CR_ID]     = 0;
-                    psched->context[ltid][CTX_SR_ID]     = ctx_sr;
+                    psched->context[ltid][CTX_SR_ID]     = GIET_SR_INIT_VALUE;
                     psched->context[ltid][CTX_SP_ID]     = ctx_sp;
                     psched->context[ltid][CTX_EPC_ID]    = ctx_epc;
@@ -1286 +1281 @@
                     psched->context[ltid][CTX_TRDID_ID]  = thread_id;
                     psched->context[ltid][CTX_VSID_ID]   = vspace_id;
-                    psched->context[ltid][CTX_RUN_ID]    = 1;
+                    psched->context[ltid][CTX_NORUN_ID]  = 0;
 
                     psched->context[ltid][CTX_TTY_ID]    = 0xFFFFFFFF;
@@ -1296 +1291 @@
                     psched->context[ltid][CTX_TIM_ID]    = 0xFFFFFFFF;
                     psched->context[ltid][CTX_HBA_ID]    = 0xFFFFFFFF;
+
+                    // update task ltid field in the mapping
+                    task[task_id].ltid = ltid;
 
 #if BOOT_DEBUG_SCHED
@@ -1793 +1791 @@
         _printf("\n[BOOT] P[0,0,0] starts at cycle %d\n", _get_proctime() );
 
+        // initialise the MMC locks array
+        _mmc_boot_mode = 1;
+        _mmc_init_locks();
+
         // initialises the IOC peripheral
         if      ( USE_IOC_BDV != 0 ) _bdv_init();