Ignore:
Timestamp:
Jul 18, 2015, 3:14:25 PM (9 years ago)
Author:
alain
Message:

Adapt the boot code to the new NORUN bit-vector mechanism in task context.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • soft/giet_vm/giet_boot/boot.c

    r615 r631  
    2020// - build the various page tables (one page table per vspace).
    2121// - initialize the shedulers (one scheduler per processor).
    22 // - initialize the external peripherals.
    2322//
    2423// 1) The binary files to be loaded are:
    25 //    - the "map.bin" file contains the hardware architecture description and the
    26 //      mapping directives. It must be stored in the the seg_boot_mapping segment
     24//    - the "map.bin" file contains the hardware architecture description,
     25//      the set of user applications that will be mapped on the architecture,
     26//      and the mapping directives. The mapping includes the placement of tasks
     27//      on processors, and the placement of virtual segments on the physical
     28//      segments. It must be stored in the the seg_boot_mapping segment
    2729//      (at address SEG_BOOT_MAPPING_BASE defined in hard_config.h file).
    2830//    - the "kernel.elf" file contains the kernel binary code and data.
    2931//    - the various "application.elf" files.
    3032//
    31 // 2) The "map.bin" file contains the C binary structure defining:
    32 //    - the hardware architecture: number of clusters, number or processors,
    33 //      size of the memory segments, and peripherals in each cluster.
    34 //    - The structure of the various multi-threaded software applications:
    35 //      number of tasks, communication channels.
    36 //    - The mapping: placement of virtual segments (vseg) in the physical
    37 //      segments (pseg), placement of software tasks on the processors,
    38 //
    39 // 3) The GIET-VM uses the paged virtual memory to provides two services:
     33// 2) The GIET-VM uses the paged virtual memory to provides two services:
    4034//    - classical memory protection, when several independant applications compiled
    4135//      in different virtual spaces are executing on the same hardware platform.
    4236//    - data placement in NUMA architectures, to control the placement
    4337//      of the software objects (vsegs) on the physical memory banks (psegs).
    44 //
    4538//    The max number of vspaces (GIET_NB_VSPACE_MAX) is a configuration parameter.
    46 //    For each application, the tasks are statically allocateded on processors.
    4739//    The page table are statically build in the boot phase, and they do not
    48 //    change during execution.
     40//    change during execution. For each application, the page tables are replicated
     41//    in all clusters.
    4942//    The GIET_VM uses both small pages (4 Kbytes), and big pages (2 Mbytes).
    50 //
    5143//    Each page table (one page table per virtual space) is monolithic, and
    5244//    contains one PT1 (8 Kbytes) and a variable number of PT2s (4 Kbytes each).
    53 //    For each vspace, the number of PT2s is defined by the size of the PTAB vseg
    54 //    in the mapping.
     45//    For each vspace, the max number of PT2s is defined by the size of the PTAB
     46//    vseg in the mapping.
    5547//    The PT1 is indexed by the ix1 field (11 bits) of the VPN. An entry is 32 bits.
    5648//    A PT2 is indexed the ix2 field (9 bits) of the VPN. An entry is 64 bits.
    5749//    The first word contains the flags, the second word contains the PPN.
    58 //    The page tables are distributed/replicated in all clusters.
     50//
     51// 3) The Giet-VM implement one private scheduler per processor.
     52//    For each application, the tasks are statically allocated to processors
     53//    and there is no task migration during execution.
     54//    Each sheduler occupies 8K bytes, and contains up to 14 task contexts
     55//    The task context [13] is reserved for the "idle" task that does nothing, and
     56//    is launched by the scheduler when there is no other runable task.
    5957///////////////////////////////////////////////////////////////////////////////////
    6058// Implementation Notes:
     
    8381#include <mwr_driver.h>
    8482#include <dma_driver.h>
     83#include <mmc_driver.h>
    8584#include <ctx_handler.h>
    8685#include <irq_handler.h>
     
    164163unsigned int        _tty0_boot_mode = 1;
    165164
    166 // boot code does not use distributed locks to protect MMC
    167 __attribute__((section(".kdata")))
    168 unsigned int        _mmc_boot_mode = 1;
    169 
    170165// boot code does not uses a lock to protect HBA command allocator
    171166__attribute__((section(".kdata")))
     
    183178//////////////////////////////////////////////////////////////////////////////
    184179
    185 // this variable is defined in the tty0.c file
     180// this variable is allocated in the tty0.c file
    186181extern spin_lock_t  _tty0_spin_lock;
     182
     183// this variable is allocated in the mmc_driver.c
     184extern unsigned int _mmc_boot_mode;
    187185
    188186extern void boot_entry();
     
    10771075        // - slots containing addresses (SP,RA,EPC) are initialised by kernel_init()
    10781076
    1079         psched->context[IDLE_TASK_INDEX][CTX_CR_ID]   = 0;
    1080         psched->context[IDLE_TASK_INDEX][CTX_SR_ID]   = 0xFF03;
    1081         psched->context[IDLE_TASK_INDEX][CTX_PTPR_ID] = _ptabs_paddr[0][x][y]>>13;
    1082         psched->context[IDLE_TASK_INDEX][CTX_PTAB_ID] = _ptabs_vaddr[0][x][y];
    1083         psched->context[IDLE_TASK_INDEX][CTX_TTY_ID]  = 0;
    1084         psched->context[IDLE_TASK_INDEX][CTX_LTID_ID] = IDLE_TASK_INDEX;
    1085         psched->context[IDLE_TASK_INDEX][CTX_VSID_ID] = 0;
    1086         psched->context[IDLE_TASK_INDEX][CTX_RUN_ID]  = 1;
     1077        psched->context[IDLE_TASK_INDEX][CTX_CR_ID]    = 0;
     1078        psched->context[IDLE_TASK_INDEX][CTX_SR_ID]    = 0xFF03;
     1079        psched->context[IDLE_TASK_INDEX][CTX_PTPR_ID]  = _ptabs_paddr[0][x][y]>>13;
     1080        psched->context[IDLE_TASK_INDEX][CTX_PTAB_ID]  = _ptabs_vaddr[0][x][y];
     1081        psched->context[IDLE_TASK_INDEX][CTX_TTY_ID]   = 0;
     1082        psched->context[IDLE_TASK_INDEX][CTX_LTID_ID]  = IDLE_TASK_INDEX;
     1083        psched->context[IDLE_TASK_INDEX][CTX_VSID_ID]  = 0;
     1084        psched->context[IDLE_TASK_INDEX][CTX_NORUN_ID] = 0;
    10871085    }
    10881086
     
    12371235            unsigned int req_p      = task[task_id].proclocid;                 
    12381236
    1239             // ctx_sr : value required before an eret instruction
    1240             unsigned int ctx_sr = 0x2000FF13;
    1241 
    12421237            // ctx_ptpr : page table physical base address (shifted by 13 bit)
    12431238            unsigned int ctx_ptpr = (_ptabs_paddr[vspace_id][req_x][req_y] >> 13);
     
    12771272                    // initializes the task context
    12781273                    psched->context[ltid][CTX_CR_ID]     = 0;
    1279                     psched->context[ltid][CTX_SR_ID]     = ctx_sr;
     1274                    psched->context[ltid][CTX_SR_ID]     = GIET_SR_INIT_VALUE;
    12801275                    psched->context[ltid][CTX_SP_ID]     = ctx_sp;
    12811276                    psched->context[ltid][CTX_EPC_ID]    = ctx_epc;
     
    12861281                    psched->context[ltid][CTX_TRDID_ID]  = thread_id;
    12871282                    psched->context[ltid][CTX_VSID_ID]   = vspace_id;
    1288                     psched->context[ltid][CTX_RUN_ID]    = 1;
     1283                    psched->context[ltid][CTX_NORUN_ID]  = 0;
    12891284
    12901285                    psched->context[ltid][CTX_TTY_ID]    = 0xFFFFFFFF;
     
    12961291                    psched->context[ltid][CTX_TIM_ID]    = 0xFFFFFFFF;
    12971292                    psched->context[ltid][CTX_HBA_ID]    = 0xFFFFFFFF;
     1293
     1294                    // update task ltid field in the mapping
     1295                    task[task_id].ltid = ltid;
    12981296
    12991297#if BOOT_DEBUG_SCHED
     
    17931791        _printf("\n[BOOT] P[0,0,0] starts at cycle %d\n", _get_proctime() );
    17941792
     1793        // initialise the MMC locks array
     1794        _mmc_boot_mode = 1;
     1795        _mmc_init_locks();
     1796
    17951797        // initialises the IOC peripheral
    17961798        if      ( USE_IOC_BDV != 0 ) _bdv_init();
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