[55] | 1 | #ifdef SYSTEMC |
---|
| 2 | //#if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
---|
| 3 | /* |
---|
| 4 | * $Id$ |
---|
| 5 | * |
---|
| 6 | * [ Description ] |
---|
| 7 | * |
---|
| 8 | */ |
---|
| 9 | |
---|
| 10 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h" |
---|
| 11 | |
---|
| 12 | namespace morpheo { |
---|
| 13 | namespace behavioural { |
---|
| 14 | namespace core { |
---|
| 15 | namespace multi_execute_loop { |
---|
| 16 | namespace execute_loop { |
---|
| 17 | namespace multi_read_unit { |
---|
| 18 | namespace read_unit { |
---|
| 19 | namespace reservation_station { |
---|
| 20 | |
---|
[69] | 21 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
---|
[55] | 22 | #define dump_queue() \ |
---|
| 23 | do\ |
---|
| 24 | {\ |
---|
| 25 | log_printf(TRACE,Reservation_station,FUNCTION," * dump queue");\ |
---|
| 26 | log_printf(TRACE,Reservation_station,FUNCTION," * nb_elt : %d",_queue_nb_elt);\ |
---|
| 27 | for (uint32_t j=0;j<_param->_size_queue; j++)\ |
---|
| 28 | {\ |
---|
| 29 | cout << "\t"\ |
---|
[69] | 30 | << "[" << j << "] "\ |
---|
| 31 | << "{" << _queue[j]._rob_id << " - "<< _queue[j]._context_id << "} " << " - "<< _queue[j]._front_end_id << "} " << " - "<< _queue[j]._ooo_engine_id << "} "\ |
---|
| 32 | << _queue[j]._data_ra_val << ", "\ |
---|
| 33 | << _queue[j]._num_reg_ra << " - "\ |
---|
| 34 | << _queue[j]._data_rb_val << ","\ |
---|
| 35 | << _queue[j]._num_reg_rb << " - "\ |
---|
| 36 | << _queue[j]._data_rc_val << ","\ |
---|
| 37 | << _queue[j]._num_reg_rc \ |
---|
| 38 | << endl;\ |
---|
| 39 | }\ |
---|
| 40 | } while (0) |
---|
| 41 | #else |
---|
| 42 | #define dump_queue() \ |
---|
| 43 | do\ |
---|
| 44 | {\ |
---|
| 45 | log_printf(TRACE,Reservation_station,FUNCTION," * dump queue");\ |
---|
| 46 | log_printf(TRACE,Reservation_station,FUNCTION," * nb_elt : %d",_queue_nb_elt);\ |
---|
| 47 | for (uint32_t j=0;j<_param->_size_queue; j++)\ |
---|
| 48 | {\ |
---|
| 49 | cout << "\t"\ |
---|
[55] | 50 | << "[" << (*_queue_control)[j] << "] "\ |
---|
[69] | 51 | << "{" << _queue[(*_queue_control)[j]]._rob_id << " - "<< _queue[(*_queue_control)[j]]._context_id << "} " << " - "<< _queue[(*_queue_control)[j]]._front_end_id << "} " << " - "<< _queue[(*_queue_control)[j]]._ooo_engine_id << "} "\ |
---|
[55] | 52 | << _queue[(*_queue_control)[j]]._data_ra_val << ", "\ |
---|
| 53 | << _queue[(*_queue_control)[j]]._num_reg_ra << " - "\ |
---|
| 54 | << _queue[(*_queue_control)[j]]._data_rb_val << ","\ |
---|
| 55 | << _queue[(*_queue_control)[j]]._num_reg_rb << " - "\ |
---|
| 56 | << _queue[(*_queue_control)[j]]._data_rc_val << ","\ |
---|
| 57 | << _queue[(*_queue_control)[j]]._num_reg_rc \ |
---|
| 58 | << endl;\ |
---|
| 59 | }\ |
---|
| 60 | } while (0) |
---|
[69] | 61 | #endif |
---|
[55] | 62 | |
---|
| 63 | #undef FUNCTION |
---|
| 64 | #define FUNCTION "Reservation_station::transition" |
---|
| 65 | void Reservation_station::transition (void) |
---|
| 66 | { |
---|
| 67 | log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); |
---|
| 68 | |
---|
| 69 | if (PORT_READ(in_NRESET) == 0) |
---|
| 70 | { |
---|
[69] | 71 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
---|
| 72 | for (uint32_t i=0; i<_param->_size_queue; i++) |
---|
| 73 | _queue_valid [i] = false; |
---|
| 74 | #else |
---|
[55] | 75 | _queue_control->clear(); |
---|
[69] | 76 | #endif |
---|
[55] | 77 | } |
---|
| 78 | else |
---|
| 79 | { |
---|
| 80 | // ***** POP from reservation station |
---|
| 81 | |
---|
| 82 | // scan in reverse order, because when we pop the queue there are an auto reorder |
---|
[69] | 83 | //for (int32_t i=(static_cast<int32_t>(_queue_control->nb_elt()))-1;i>=0; i--) |
---|
| 84 | for (int32_t i=(static_cast<int32_t>(_param->_nb_inst_retire))-1;i>=0; i--) |
---|
[55] | 85 | { |
---|
[69] | 86 | if (( internal_RETIRE_VAL [i] == 1) and |
---|
| 87 | (PORT_READ(in_RETIRE_ACK [i]) == 1)) |
---|
[55] | 88 | { |
---|
[69] | 89 | //uint32_t index = (*_queue_control)[i]; |
---|
| 90 | |
---|
[55] | 91 | log_printf(TRACE,Reservation_station,FUNCTION,"POP [%d]",i); |
---|
| 92 | |
---|
[69] | 93 | uint32_t index = internal_RETIRE_SLOT[i]; |
---|
[55] | 94 | |
---|
[69] | 95 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
---|
| 96 | _queue_valid [index] = false; |
---|
| 97 | #else |
---|
| 98 | _queue_control->pop(index); |
---|
| 99 | #endif |
---|
[55] | 100 | log_printf(TRACE,Reservation_station,FUNCTION," * index : %d",index); |
---|
| 101 | // dump_queue(); |
---|
| 102 | } |
---|
| 103 | } |
---|
| 104 | |
---|
| 105 | // ***** Bypass |
---|
| 106 | // Note : we can take this sequence code before the PUSH in the queue, because read_queue make the bypass !!! |
---|
| 107 | |
---|
| 108 | // scan all entry |
---|
[69] | 109 | for (uint32_t i=0; |
---|
| 110 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
---|
| 111 | i<_param->_size_queue; |
---|
| 112 | #else |
---|
| 113 | i<_queue_control->nb_elt(); |
---|
| 114 | #endif |
---|
| 115 | i++) |
---|
[55] | 116 | { |
---|
[69] | 117 | uint32_t index; |
---|
| 118 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
---|
| 119 | index = i; |
---|
| 120 | #else |
---|
| 121 | index = (*_queue_control)[i]; |
---|
| 122 | #endif |
---|
[55] | 123 | |
---|
| 124 | // ***** bypass - gpr_write |
---|
| 125 | for (uint32_t j=0; j<_param->_nb_gpr_write; j++) |
---|
| 126 | { |
---|
[69] | 127 | bool cmp; |
---|
| 128 | if (_param->_have_port_ooo_engine_id) |
---|
| 129 | cmp = (PORT_READ(in_GPR_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); |
---|
| 130 | else |
---|
| 131 | cmp = true; |
---|
| 132 | |
---|
| 133 | if ((PORT_READ(in_GPR_WRITE_VAL [j]) == 1) and cmp) |
---|
[55] | 134 | { |
---|
| 135 | if (PORT_READ(in_GPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_ra) |
---|
| 136 | { |
---|
| 137 | log_printf(TRACE,Reservation_station,FUNCTION," -> GPR_WRITE [%d] - Hit queue[%d]-GPR_RA[%d]",i,index,_queue[index]._num_reg_ra); |
---|
| 138 | _queue[index]._data_ra_val = 1; |
---|
| 139 | _queue[index]._data_ra = PORT_READ(in_GPR_WRITE_DATA [j]); |
---|
| 140 | } |
---|
| 141 | if (PORT_READ(in_GPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_rb) |
---|
| 142 | { |
---|
| 143 | log_printf(TRACE,Reservation_station,FUNCTION," -> GPR_WRITE [%d] - Hit queue[%d]-GPR_RB[%d]",i,index,_queue[index]._num_reg_rb); |
---|
| 144 | _queue[index]._data_rb_val = 1; |
---|
| 145 | _queue[index]._data_rb = PORT_READ(in_GPR_WRITE_DATA [j]); |
---|
| 146 | } |
---|
| 147 | } |
---|
| 148 | } |
---|
| 149 | // ***** bypass - spr_write |
---|
| 150 | for (uint32_t j=0; j<_param->_nb_spr_write; j++) |
---|
| 151 | { |
---|
[69] | 152 | bool cmp; |
---|
| 153 | if (_param->_have_port_ooo_engine_id) |
---|
| 154 | cmp = (PORT_READ(in_SPR_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); |
---|
| 155 | else |
---|
| 156 | cmp = true; |
---|
| 157 | |
---|
| 158 | if ((PORT_READ(in_SPR_WRITE_VAL [j]) == 1) and |
---|
| 159 | cmp and |
---|
| 160 | (PORT_READ(in_SPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_rc)) |
---|
[55] | 161 | { |
---|
| 162 | log_printf(TRACE,Reservation_station,FUNCTION," -> SPR_WRITE [%d] - Hit queue[%d]-SPR_RC[%d]",i,index,_queue[index]._num_reg_rc); |
---|
| 163 | _queue[index]._data_rc_val = 1; |
---|
| 164 | _queue[index]._data_rc = PORT_READ(in_SPR_WRITE_DATA [j]); |
---|
| 165 | } |
---|
| 166 | } |
---|
| 167 | // ***** bypass - bypass_write |
---|
| 168 | for (uint32_t j=0; j<_param->_nb_bypass_write; j++) |
---|
| 169 | { |
---|
[69] | 170 | bool cmp; |
---|
| 171 | if (_param->_have_port_ooo_engine_id) |
---|
| 172 | cmp = (PORT_READ(in_BYPASS_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); |
---|
| 173 | else |
---|
| 174 | cmp = true; |
---|
| 175 | |
---|
| 176 | if (cmp) |
---|
[55] | 177 | { |
---|
| 178 | if (PORT_READ(in_BYPASS_WRITE_GPR_VAL [j]) == 1) |
---|
| 179 | { |
---|
| 180 | if (PORT_READ(in_BYPASS_WRITE_GPR_NUM_REG[j]) == _queue[index]._num_reg_ra) |
---|
| 181 | { |
---|
| 182 | log_printf(TRACE,Reservation_station,FUNCTION," -> BYPASS_WRITE [%d] - Hit queue[%d]-GPR_RA[%d]",i,index,_queue[index]._num_reg_ra); |
---|
| 183 | _queue[index]._data_ra_val = 1; |
---|
| 184 | _queue[index]._data_ra = PORT_READ(in_BYPASS_WRITE_GPR_DATA [j]); |
---|
| 185 | } |
---|
| 186 | if (PORT_READ(in_BYPASS_WRITE_GPR_NUM_REG [j]) == _queue[index]._num_reg_rb) |
---|
| 187 | { |
---|
| 188 | log_printf(TRACE,Reservation_station,FUNCTION," -> BYPASS_WRITE [%d] - Hit queue[%d]-GPR_RB[%d]",i,index,_queue[index]._num_reg_rb); |
---|
| 189 | _queue[index]._data_rb_val = 1; |
---|
| 190 | _queue[index]._data_rb = PORT_READ(in_BYPASS_WRITE_GPR_DATA [j]); |
---|
| 191 | } |
---|
| 192 | } |
---|
| 193 | if ((PORT_READ(in_BYPASS_WRITE_SPR_VAL [j]) == 1) and |
---|
| 194 | (PORT_READ(in_BYPASS_WRITE_SPR_NUM_REG[j]) == _queue[index]._num_reg_rc)) |
---|
| 195 | { |
---|
| 196 | log_printf(TRACE,Reservation_station,FUNCTION," -> BYPASS_WRITE [%d] - Hit queue[%d]-SPR_RC[%d]",i,index,_queue[index]._num_reg_rc); |
---|
| 197 | _queue[index]._data_rc_val = 1; |
---|
| 198 | _queue[index]._data_rc = PORT_READ(in_BYPASS_WRITE_SPR_DATA [j]); |
---|
| 199 | } |
---|
| 200 | } |
---|
| 201 | } |
---|
| 202 | // ***** bypass - bypass_memory |
---|
| 203 | for (uint32_t j=0; j<_param->_nb_bypass_memory; j++) |
---|
| 204 | { |
---|
[69] | 205 | bool cmp; |
---|
| 206 | if (_param->_have_port_ooo_engine_id) |
---|
| 207 | cmp = (PORT_READ(in_BYPASS_MEMORY_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); |
---|
| 208 | else |
---|
| 209 | cmp = true; |
---|
| 210 | |
---|
| 211 | if ((PORT_READ(in_BYPASS_MEMORY_VAL [j]) == 1) and cmp) |
---|
[55] | 212 | { |
---|
| 213 | if (PORT_READ(in_BYPASS_MEMORY_NUM_REG [j]) == _queue[index]._num_reg_ra) |
---|
| 214 | { |
---|
| 215 | log_printf(TRACE,Reservation_station,FUNCTION," -> BYPASS_MEMORY [%d] - Hit queue[%d]-GPR_RA[%d]",i,index,_queue[index]._num_reg_ra); |
---|
| 216 | _queue[index]._data_ra_val = 1; |
---|
| 217 | _queue[index]._data_ra = PORT_READ(in_BYPASS_MEMORY_DATA [j]); |
---|
| 218 | } |
---|
| 219 | if (PORT_READ(in_BYPASS_MEMORY_NUM_REG [j]) == _queue[index]._num_reg_rb) |
---|
| 220 | { |
---|
| 221 | log_printf(TRACE,Reservation_station,FUNCTION," -> BYPASS_MEMORY [%d] - Hit queue[%d]-GPR_RB[%d]",i,index,_queue[index]._num_reg_rb); |
---|
| 222 | _queue[index]._data_rb_val = 1; |
---|
| 223 | _queue[index]._data_rb = PORT_READ(in_BYPASS_MEMORY_DATA [j]); |
---|
| 224 | } |
---|
| 225 | } |
---|
| 226 | } |
---|
| 227 | } |
---|
[69] | 228 | // ***** PUSH to reservation station |
---|
| 229 | if ((PORT_READ(in_INSERT_VAL) == 1) and |
---|
| 230 | ( internal_INSERT_ACK == 1)) |
---|
| 231 | { |
---|
| 232 | log_printf(TRACE,Reservation_station,FUNCTION,"PUSH"); |
---|
[55] | 233 | |
---|
[69] | 234 | // Write in reservation station |
---|
| 235 | uint32_t index; |
---|
[55] | 236 | |
---|
[69] | 237 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
---|
| 238 | index = internal_INSERT_SLOT; |
---|
| 239 | _queue_valid [internal_INSERT_SLOT] = true; |
---|
| 240 | #else |
---|
| 241 | index = _queue_control->push(); |
---|
[55] | 242 | #endif |
---|
[69] | 243 | log_printf(TRACE,Reservation_station,FUNCTION," * index : %d",index); |
---|
[55] | 244 | |
---|
[69] | 245 | if (_param->_have_port_context_id) |
---|
| 246 | _queue[index]._context_id = PORT_READ(in_INSERT_CONTEXT_ID ); |
---|
| 247 | if (_param->_have_port_front_end_id) |
---|
| 248 | _queue[index]._front_end_id = PORT_READ(in_INSERT_FRONT_END_ID ); |
---|
| 249 | if (_param->_have_port_ooo_engine_id) |
---|
| 250 | _queue[index]._ooo_engine_id = PORT_READ(in_INSERT_OOO_ENGINE_ID ); |
---|
| 251 | if (_param->_have_port_rob_id) |
---|
| 252 | _queue[index]._rob_id = PORT_READ(in_INSERT_ROB_ID ); |
---|
| 253 | _queue[index]._operation = PORT_READ(in_INSERT_OPERATION ); |
---|
| 254 | _queue[index]._type = PORT_READ(in_INSERT_TYPE ); |
---|
| 255 | _queue[index]._has_immediat = PORT_READ(in_INSERT_HAS_IMMEDIAT ); |
---|
| 256 | _queue[index]._immediat = PORT_READ(in_INSERT_IMMEDIAT ); |
---|
| 257 | // _queue[index]._read_ra = PORT_READ(in_INSERT_READ_RA ); |
---|
| 258 | _queue[index]._num_reg_ra = PORT_READ(in_INSERT_NUM_REG_RA ); |
---|
| 259 | _queue[index]._data_ra_val = PORT_READ(in_INSERT_DATA_RA_VAL ); |
---|
| 260 | _queue[index]._data_ra = PORT_READ(in_INSERT_DATA_RA ); |
---|
| 261 | // _queue[index]._read_rb = PORT_READ(in_INSERT_READ_RB ); |
---|
| 262 | _queue[index]._num_reg_rb = PORT_READ(in_INSERT_NUM_REG_RB ); |
---|
| 263 | _queue[index]._data_rb_val = PORT_READ(in_INSERT_DATA_RB_VAL ); |
---|
| 264 | _queue[index]._data_rb = PORT_READ(in_INSERT_DATA_RB ); |
---|
| 265 | // _queue[index]._read_rc = PORT_READ(in_INSERT_READ_RC ); |
---|
| 266 | _queue[index]._num_reg_rc = PORT_READ(in_INSERT_NUM_REG_RC ); |
---|
| 267 | _queue[index]._data_rc_val = PORT_READ(in_INSERT_DATA_RC_VAL ); |
---|
| 268 | _queue[index]._data_rc = PORT_READ(in_INSERT_DATA_RC ); |
---|
| 269 | _queue[index]._write_rd = PORT_READ(in_INSERT_WRITE_RD ); |
---|
| 270 | _queue[index]._num_reg_rd = PORT_READ(in_INSERT_NUM_REG_RD ); |
---|
| 271 | _queue[index]._write_re = PORT_READ(in_INSERT_WRITE_RE ); |
---|
| 272 | _queue[index]._num_reg_re = PORT_READ(in_INSERT_NUM_REG_RE ); |
---|
| 273 | // dump_queue(); |
---|
| 274 | } |
---|
| 275 | } |
---|
| 276 | |
---|
| 277 | end_cycle (); |
---|
| 278 | |
---|
[55] | 279 | log_printf(FUNC,Reservation_station,FUNCTION,"End"); |
---|
| 280 | }; |
---|
| 281 | |
---|
| 282 | }; // end namespace reservation_station |
---|
| 283 | }; // end namespace read_unit |
---|
| 284 | }; // end namespace multi_read_unit |
---|
| 285 | }; // end namespace execute_loop |
---|
| 286 | }; // end namespace multi_execute_loop |
---|
| 287 | }; // end namespace core |
---|
| 288 | |
---|
| 289 | }; // end namespace behavioural |
---|
| 290 | }; // end namespace morpheo |
---|
| 291 | #endif |
---|
| 292 | //#endif |
---|