Changeset 69 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp
- Timestamp:
- Dec 12, 2007, 5:02:47 PM (17 years ago)
- File:
-
- 1 edited
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp
r56 r69 19 19 namespace reservation_station { 20 20 21 #ifdef SYSTEMC_VHDL_COMPATIBILITY 22 #define dump_queue() \ 23 do\ 24 {\ 25 log_printf(TRACE,Reservation_station,FUNCTION," * dump queue");\ 26 log_printf(TRACE,Reservation_station,FUNCTION," * nb_elt : %d",_queue_nb_elt);\ 27 for (uint32_t j=0;j<_param->_size_queue; j++)\ 28 {\ 29 cout << "\t"\ 30 << "[" << j << "] "\ 31 << "{" << _queue[j]._rob_id << " - "<< _queue[j]._context_id << "} " << " - "<< _queue[j]._front_end_id << "} " << " - "<< _queue[j]._ooo_engine_id << "} "\ 32 << _queue[j]._data_ra_val << ", "\ 33 << _queue[j]._num_reg_ra << " - "\ 34 << _queue[j]._data_rb_val << ","\ 35 << _queue[j]._num_reg_rb << " - "\ 36 << _queue[j]._data_rc_val << ","\ 37 << _queue[j]._num_reg_rc \ 38 << endl;\ 39 }\ 40 } while (0) 41 #else 21 42 #define dump_queue() \ 22 43 do\ … … 28 49 cout << "\t"\ 29 50 << "[" << (*_queue_control)[j] << "] "\ 30 << "{" << _queue[(*_queue_control)[j]]._ packet_id << " - "<< _queue[(*_queue_control)[j]]._context_id << "} "\51 << "{" << _queue[(*_queue_control)[j]]._rob_id << " - "<< _queue[(*_queue_control)[j]]._context_id << "} " << " - "<< _queue[(*_queue_control)[j]]._front_end_id << "} " << " - "<< _queue[(*_queue_control)[j]]._ooo_engine_id << "} "\ 31 52 << _queue[(*_queue_control)[j]]._data_ra_val << ", "\ 32 53 << _queue[(*_queue_control)[j]]._num_reg_ra << " - "\ … … 38 59 }\ 39 60 } while (0) 61 #endif 40 62 41 63 #undef FUNCTION … … 47 69 if (PORT_READ(in_NRESET) == 0) 48 70 { 71 #ifdef SYSTEMC_VHDL_COMPATIBILITY 72 for (uint32_t i=0; i<_param->_size_queue; i++) 73 _queue_valid [i] = false; 74 #else 49 75 _queue_control->clear(); 76 #endif 50 77 } 51 78 else 52 79 { 53 // ***** PUSH to reservation station 54 if ((PORT_READ(in_RESERVATION_STATION_IN_VAL) == 1) and 55 ( internal_RESERVATION_STATION_IN_ACK == 1)) 80 // ***** POP from reservation station 81 82 // scan in reverse order, because when we pop the queue there are an auto reorder 83 //for (int32_t i=(static_cast<int32_t>(_queue_control->nb_elt()))-1;i>=0; i--) 84 for (int32_t i=(static_cast<int32_t>(_param->_nb_inst_retire))-1;i>=0; i--) 56 85 { 57 log_printf(TRACE,Reservation_station,FUNCTION,"PUSH"); 58 59 // Write in reservation station 60 uint32_t index = _queue_control->push(); 61 62 log_printf(TRACE,Reservation_station,FUNCTION," * index : %d",index); 63 64 _queue[index]._context_id = PORT_READ(in_RESERVATION_STATION_IN_CONTEXT_ID ); 65 _queue[index]._packet_id = PORT_READ(in_RESERVATION_STATION_IN_PACKET_ID ); 66 _queue[index]._operation = PORT_READ(in_RESERVATION_STATION_IN_OPERATION ); 67 _queue[index]._type = PORT_READ(in_RESERVATION_STATION_IN_TYPE ); 68 _queue[index]._has_immediat = PORT_READ(in_RESERVATION_STATION_IN_HAS_IMMEDIAT); 69 _queue[index]._immediat = PORT_READ(in_RESERVATION_STATION_IN_IMMEDIAT ); 70 // _queue[index]._read_ra = PORT_READ(in_RESERVATION_STATION_IN_READ_RA ); 71 _queue[index]._num_reg_ra = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RA ); 72 _queue[index]._data_ra_val = PORT_READ(in_RESERVATION_STATION_IN_DATA_RA_VAL ); 73 _queue[index]._data_ra = PORT_READ(in_RESERVATION_STATION_IN_DATA_RA ); 74 // _queue[index]._read_rb = PORT_READ(in_RESERVATION_STATION_IN_READ_RB ); 75 _queue[index]._num_reg_rb = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RB ); 76 _queue[index]._data_rb_val = PORT_READ(in_RESERVATION_STATION_IN_DATA_RB_VAL ); 77 _queue[index]._data_rb = PORT_READ(in_RESERVATION_STATION_IN_DATA_RB ); 78 // _queue[index]._read_rc = PORT_READ(in_RESERVATION_STATION_IN_READ_RC ); 79 _queue[index]._num_reg_rc = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RC ); 80 _queue[index]._data_rc_val = PORT_READ(in_RESERVATION_STATION_IN_DATA_RC_VAL ); 81 _queue[index]._data_rc = PORT_READ(in_RESERVATION_STATION_IN_DATA_RC ); 82 _queue[index]._write_rd = PORT_READ(in_RESERVATION_STATION_IN_WRITE_RD ); 83 _queue[index]._num_reg_rd = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RD ); 84 _queue[index]._write_re = PORT_READ(in_RESERVATION_STATION_IN_WRITE_RE ); 85 _queue[index]._num_reg_re = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RE ); 86 // dump_queue(); 87 } 88 89 // ***** POP from reservation station 90 91 // scan in reverse order, because when we pop the queue there are an auto reorder 92 for (int32_t i=(static_cast<int32_t>(_queue_control->nb_elt()))-1;i>=0; i--) 93 { 94 uint32_t index = (*_queue_control)[i]; 95 96 if (( internal_RESERVATION_STATION_OUT_VAL [index] == 1) and 97 (PORT_READ(in_RESERVATION_STATION_OUT_ACK [index]) == 1)) 98 { 86 if (( internal_RETIRE_VAL [i] == 1) and 87 (PORT_READ(in_RETIRE_ACK [i]) == 1)) 88 { 89 //uint32_t index = (*_queue_control)[i]; 90 99 91 log_printf(TRACE,Reservation_station,FUNCTION,"POP [%d]",i); 100 92 101 _queue_control->pop(i); 102 93 uint32_t index = internal_RETIRE_SLOT[i]; 94 95 #ifdef SYSTEMC_VHDL_COMPATIBILITY 96 _queue_valid [index] = false; 97 #else 98 _queue_control->pop(index); 99 #endif 103 100 log_printf(TRACE,Reservation_station,FUNCTION," * index : %d",index); 104 101 // dump_queue(); … … 110 107 111 108 // scan all entry 112 for (uint32_t i=0; i<_queue_control->nb_elt(); i++) 109 for (uint32_t i=0; 110 #ifdef SYSTEMC_VHDL_COMPATIBILITY 111 i<_param->_size_queue; 112 #else 113 i<_queue_control->nb_elt(); 114 #endif 115 i++) 113 116 { 114 uint32_t index = (*_queue_control)[i]; 117 uint32_t index; 118 #ifdef SYSTEMC_VHDL_COMPATIBILITY 119 index = i; 120 #else 121 index = (*_queue_control)[i]; 122 #endif 115 123 116 124 // ***** bypass - gpr_write 117 125 for (uint32_t j=0; j<_param->_nb_gpr_write; j++) 118 126 { 119 if ((PORT_READ(in_GPR_WRITE_VAL [j]) == 1) and 120 (PORT_READ(in_GPR_WRITE_CONTEXT_ID [j]) == _queue[index]._context_id)) 127 bool cmp; 128 if (_param->_have_port_ooo_engine_id) 129 cmp = (PORT_READ(in_GPR_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); 130 else 131 cmp = true; 132 133 if ((PORT_READ(in_GPR_WRITE_VAL [j]) == 1) and cmp) 121 134 { 122 135 if (PORT_READ(in_GPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_ra) … … 137 150 for (uint32_t j=0; j<_param->_nb_spr_write; j++) 138 151 { 139 if ((PORT_READ(in_SPR_WRITE_VAL [j]) == 1) and 140 (PORT_READ(in_SPR_WRITE_CONTEXT_ID [j]) == _queue[index]._context_id) and 141 (PORT_READ(in_SPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_rc)) 152 bool cmp; 153 if (_param->_have_port_ooo_engine_id) 154 cmp = (PORT_READ(in_SPR_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); 155 else 156 cmp = true; 157 158 if ((PORT_READ(in_SPR_WRITE_VAL [j]) == 1) and 159 cmp and 160 (PORT_READ(in_SPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_rc)) 142 161 { 143 162 log_printf(TRACE,Reservation_station,FUNCTION," -> SPR_WRITE [%d] - Hit queue[%d]-SPR_RC[%d]",i,index,_queue[index]._num_reg_rc); … … 149 168 for (uint32_t j=0; j<_param->_nb_bypass_write; j++) 150 169 { 151 if (PORT_READ(in_BYPASS_WRITE_CONTEXT_ID [j]) == _queue[index]._context_id) 170 bool cmp; 171 if (_param->_have_port_ooo_engine_id) 172 cmp = (PORT_READ(in_BYPASS_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); 173 else 174 cmp = true; 175 176 if (cmp) 152 177 { 153 178 if (PORT_READ(in_BYPASS_WRITE_GPR_VAL [j]) == 1) … … 178 203 for (uint32_t j=0; j<_param->_nb_bypass_memory; j++) 179 204 { 180 if ((PORT_READ(in_BYPASS_MEMORY_VAL [j]) == 1) and 181 (PORT_READ(in_BYPASS_MEMORY_CONTEXT_ID [j]) == _queue[index]._context_id)) 205 bool cmp; 206 if (_param->_have_port_ooo_engine_id) 207 cmp = (PORT_READ(in_BYPASS_MEMORY_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); 208 else 209 cmp = true; 210 211 if ((PORT_READ(in_BYPASS_MEMORY_VAL [j]) == 1) and cmp) 182 212 { 183 213 if (PORT_READ(in_BYPASS_MEMORY_NUM_REG [j]) == _queue[index]._num_reg_ra) … … 196 226 } 197 227 } 228 // ***** PUSH to reservation station 229 if ((PORT_READ(in_INSERT_VAL) == 1) and 230 ( internal_INSERT_ACK == 1)) 231 { 232 log_printf(TRACE,Reservation_station,FUNCTION,"PUSH"); 233 234 // Write in reservation station 235 uint32_t index; 236 237 #ifdef SYSTEMC_VHDL_COMPATIBILITY 238 index = internal_INSERT_SLOT; 239 _queue_valid [internal_INSERT_SLOT] = true; 240 #else 241 index = _queue_control->push(); 242 #endif 243 log_printf(TRACE,Reservation_station,FUNCTION," * index : %d",index); 244 245 if (_param->_have_port_context_id) 246 _queue[index]._context_id = PORT_READ(in_INSERT_CONTEXT_ID ); 247 if (_param->_have_port_front_end_id) 248 _queue[index]._front_end_id = PORT_READ(in_INSERT_FRONT_END_ID ); 249 if (_param->_have_port_ooo_engine_id) 250 _queue[index]._ooo_engine_id = PORT_READ(in_INSERT_OOO_ENGINE_ID ); 251 if (_param->_have_port_rob_id) 252 _queue[index]._rob_id = PORT_READ(in_INSERT_ROB_ID ); 253 _queue[index]._operation = PORT_READ(in_INSERT_OPERATION ); 254 _queue[index]._type = PORT_READ(in_INSERT_TYPE ); 255 _queue[index]._has_immediat = PORT_READ(in_INSERT_HAS_IMMEDIAT ); 256 _queue[index]._immediat = PORT_READ(in_INSERT_IMMEDIAT ); 257 // _queue[index]._read_ra = PORT_READ(in_INSERT_READ_RA ); 258 _queue[index]._num_reg_ra = PORT_READ(in_INSERT_NUM_REG_RA ); 259 _queue[index]._data_ra_val = PORT_READ(in_INSERT_DATA_RA_VAL ); 260 _queue[index]._data_ra = PORT_READ(in_INSERT_DATA_RA ); 261 // _queue[index]._read_rb = PORT_READ(in_INSERT_READ_RB ); 262 _queue[index]._num_reg_rb = PORT_READ(in_INSERT_NUM_REG_RB ); 263 _queue[index]._data_rb_val = PORT_READ(in_INSERT_DATA_RB_VAL ); 264 _queue[index]._data_rb = PORT_READ(in_INSERT_DATA_RB ); 265 // _queue[index]._read_rc = PORT_READ(in_INSERT_READ_RC ); 266 _queue[index]._num_reg_rc = PORT_READ(in_INSERT_NUM_REG_RC ); 267 _queue[index]._data_rc_val = PORT_READ(in_INSERT_DATA_RC_VAL ); 268 _queue[index]._data_rc = PORT_READ(in_INSERT_DATA_RC ); 269 _queue[index]._write_rd = PORT_READ(in_INSERT_WRITE_RD ); 270 _queue[index]._num_reg_rd = PORT_READ(in_INSERT_NUM_REG_RD ); 271 _queue[index]._write_re = PORT_READ(in_INSERT_WRITE_RE ); 272 _queue[index]._num_reg_re = PORT_READ(in_INSERT_NUM_REG_RE ); 273 // dump_queue(); 274 } 198 275 } 199 276 200 #ifdef STATISTICS 201 _stat->add(); 202 #endif 203 204 #ifdef VHDL_TESTBENCH 205 vhdl_testbench_transition (); 206 #endif 277 end_cycle (); 207 278 208 279 log_printf(FUNC,Reservation_station,FUNCTION,"End");
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