[55] | 1 | #ifdef SYSTEMC |
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| 2 | //#if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
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| 3 | /* |
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| 4 | * $Id$ |
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| 5 | * |
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| 6 | * [ Description ] |
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| 7 | * |
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| 8 | */ |
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| 9 | |
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| 10 | #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h" |
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| 11 | |
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| 12 | namespace morpheo { |
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| 13 | namespace behavioural { |
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| 14 | namespace core { |
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| 15 | namespace multi_execute_loop { |
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| 16 | namespace execute_loop { |
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| 17 | namespace multi_read_unit { |
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| 18 | namespace read_unit { |
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| 19 | namespace reservation_station { |
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| 20 | |
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[69] | 21 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
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[55] | 22 | #define dump_queue() \ |
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| 23 | do\ |
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| 24 | {\ |
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| 25 | log_printf(TRACE,Reservation_station,FUNCTION," * dump queue");\ |
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| 26 | log_printf(TRACE,Reservation_station,FUNCTION," * nb_elt : %d",_queue_nb_elt);\ |
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| 27 | for (uint32_t j=0;j<_param->_size_queue; j++)\ |
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| 28 | {\ |
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| 29 | cout << "\t"\ |
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[69] | 30 | << "[" << j << "] "\ |
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| 31 | << "{" << _queue[j]._rob_id << " - "<< _queue[j]._context_id << "} " << " - "<< _queue[j]._front_end_id << "} " << " - "<< _queue[j]._ooo_engine_id << "} "\ |
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| 32 | << _queue[j]._data_ra_val << ", "\ |
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| 33 | << _queue[j]._num_reg_ra << " - "\ |
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| 34 | << _queue[j]._data_rb_val << ","\ |
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| 35 | << _queue[j]._num_reg_rb << " - "\ |
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| 36 | << _queue[j]._data_rc_val << ","\ |
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| 37 | << _queue[j]._num_reg_rc \ |
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| 38 | << endl;\ |
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| 39 | }\ |
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| 40 | } while (0) |
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| 41 | #else |
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| 42 | #define dump_queue() \ |
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| 43 | do\ |
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| 44 | {\ |
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| 45 | log_printf(TRACE,Reservation_station,FUNCTION," * dump queue");\ |
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| 46 | log_printf(TRACE,Reservation_station,FUNCTION," * nb_elt : %d",_queue_nb_elt);\ |
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| 47 | for (uint32_t j=0;j<_param->_size_queue; j++)\ |
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| 48 | {\ |
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| 49 | cout << "\t"\ |
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[55] | 50 | << "[" << (*_queue_control)[j] << "] "\ |
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[69] | 51 | << "{" << _queue[(*_queue_control)[j]]._rob_id << " - "<< _queue[(*_queue_control)[j]]._context_id << "} " << " - "<< _queue[(*_queue_control)[j]]._front_end_id << "} " << " - "<< _queue[(*_queue_control)[j]]._ooo_engine_id << "} "\ |
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[55] | 52 | << _queue[(*_queue_control)[j]]._data_ra_val << ", "\ |
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| 53 | << _queue[(*_queue_control)[j]]._num_reg_ra << " - "\ |
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| 54 | << _queue[(*_queue_control)[j]]._data_rb_val << ","\ |
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| 55 | << _queue[(*_queue_control)[j]]._num_reg_rb << " - "\ |
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| 56 | << _queue[(*_queue_control)[j]]._data_rc_val << ","\ |
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| 57 | << _queue[(*_queue_control)[j]]._num_reg_rc \ |
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| 58 | << endl;\ |
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| 59 | }\ |
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| 60 | } while (0) |
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[69] | 61 | #endif |
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[55] | 62 | |
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| 63 | #undef FUNCTION |
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| 64 | #define FUNCTION "Reservation_station::transition" |
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| 65 | void Reservation_station::transition (void) |
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| 66 | { |
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| 67 | log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); |
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| 68 | |
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| 69 | if (PORT_READ(in_NRESET) == 0) |
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| 70 | { |
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[69] | 71 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
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| 72 | for (uint32_t i=0; i<_param->_size_queue; i++) |
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| 73 | _queue_valid [i] = false; |
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| 74 | #else |
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[55] | 75 | _queue_control->clear(); |
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[69] | 76 | #endif |
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[55] | 77 | } |
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| 78 | else |
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| 79 | { |
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| 80 | // ***** POP from reservation station |
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| 81 | |
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| 82 | // scan in reverse order, because when we pop the queue there are an auto reorder |
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[69] | 83 | //for (int32_t i=(static_cast<int32_t>(_queue_control->nb_elt()))-1;i>=0; i--) |
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| 84 | for (int32_t i=(static_cast<int32_t>(_param->_nb_inst_retire))-1;i>=0; i--) |
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[55] | 85 | { |
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[69] | 86 | if (( internal_RETIRE_VAL [i] == 1) and |
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| 87 | (PORT_READ(in_RETIRE_ACK [i]) == 1)) |
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[55] | 88 | { |
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[69] | 89 | //uint32_t index = (*_queue_control)[i]; |
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| 90 | |
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[70] | 91 | log_printf(NONE,Reservation_station,FUNCTION,"POP [%d]",i); |
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[55] | 92 | |
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[69] | 93 | uint32_t index = internal_RETIRE_SLOT[i]; |
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[55] | 94 | |
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[69] | 95 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
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| 96 | _queue_valid [index] = false; |
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| 97 | #else |
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| 98 | _queue_control->pop(index); |
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| 99 | #endif |
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[70] | 100 | // cout << "========== Transition : " << endl |
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| 101 | // << " * i : " << i << endl |
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| 102 | // << " * index : " << index << endl; |
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| 103 | |
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| 104 | log_printf(NONE,Reservation_station,FUNCTION," * index : %d",index); |
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[55] | 105 | } |
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| 106 | } |
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[70] | 107 | |
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| 108 | // dump_queue(); |
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[55] | 109 | |
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| 110 | // ***** Bypass |
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| 111 | // Note : we can take this sequence code before the PUSH in the queue, because read_queue make the bypass !!! |
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| 112 | |
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| 113 | // scan all entry |
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[69] | 114 | for (uint32_t i=0; |
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| 115 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
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| 116 | i<_param->_size_queue; |
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| 117 | #else |
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| 118 | i<_queue_control->nb_elt(); |
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| 119 | #endif |
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| 120 | i++) |
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[55] | 121 | { |
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[69] | 122 | uint32_t index; |
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| 123 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
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| 124 | index = i; |
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| 125 | #else |
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| 126 | index = (*_queue_control)[i]; |
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| 127 | #endif |
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[55] | 128 | |
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| 129 | // ***** bypass - gpr_write |
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| 130 | for (uint32_t j=0; j<_param->_nb_gpr_write; j++) |
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| 131 | { |
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[69] | 132 | bool cmp; |
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| 133 | if (_param->_have_port_ooo_engine_id) |
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| 134 | cmp = (PORT_READ(in_GPR_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); |
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| 135 | else |
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| 136 | cmp = true; |
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| 137 | |
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| 138 | if ((PORT_READ(in_GPR_WRITE_VAL [j]) == 1) and cmp) |
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[55] | 139 | { |
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| 140 | if (PORT_READ(in_GPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_ra) |
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| 141 | { |
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| 142 | log_printf(TRACE,Reservation_station,FUNCTION," -> GPR_WRITE [%d] - Hit queue[%d]-GPR_RA[%d]",i,index,_queue[index]._num_reg_ra); |
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| 143 | _queue[index]._data_ra_val = 1; |
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| 144 | _queue[index]._data_ra = PORT_READ(in_GPR_WRITE_DATA [j]); |
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| 145 | } |
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| 146 | if (PORT_READ(in_GPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_rb) |
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| 147 | { |
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| 148 | log_printf(TRACE,Reservation_station,FUNCTION," -> GPR_WRITE [%d] - Hit queue[%d]-GPR_RB[%d]",i,index,_queue[index]._num_reg_rb); |
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| 149 | _queue[index]._data_rb_val = 1; |
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| 150 | _queue[index]._data_rb = PORT_READ(in_GPR_WRITE_DATA [j]); |
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| 151 | } |
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| 152 | } |
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| 153 | } |
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| 154 | // ***** bypass - spr_write |
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| 155 | for (uint32_t j=0; j<_param->_nb_spr_write; j++) |
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| 156 | { |
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[69] | 157 | bool cmp; |
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| 158 | if (_param->_have_port_ooo_engine_id) |
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| 159 | cmp = (PORT_READ(in_SPR_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); |
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| 160 | else |
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| 161 | cmp = true; |
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| 162 | |
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| 163 | if ((PORT_READ(in_SPR_WRITE_VAL [j]) == 1) and |
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| 164 | cmp and |
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| 165 | (PORT_READ(in_SPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_rc)) |
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[55] | 166 | { |
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| 167 | log_printf(TRACE,Reservation_station,FUNCTION," -> SPR_WRITE [%d] - Hit queue[%d]-SPR_RC[%d]",i,index,_queue[index]._num_reg_rc); |
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| 168 | _queue[index]._data_rc_val = 1; |
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| 169 | _queue[index]._data_rc = PORT_READ(in_SPR_WRITE_DATA [j]); |
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| 170 | } |
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| 171 | } |
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| 172 | // ***** bypass - bypass_write |
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| 173 | for (uint32_t j=0; j<_param->_nb_bypass_write; j++) |
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| 174 | { |
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[69] | 175 | bool cmp; |
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| 176 | if (_param->_have_port_ooo_engine_id) |
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| 177 | cmp = (PORT_READ(in_BYPASS_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); |
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| 178 | else |
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| 179 | cmp = true; |
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| 180 | |
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| 181 | if (cmp) |
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[55] | 182 | { |
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| 183 | if (PORT_READ(in_BYPASS_WRITE_GPR_VAL [j]) == 1) |
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| 184 | { |
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| 185 | if (PORT_READ(in_BYPASS_WRITE_GPR_NUM_REG[j]) == _queue[index]._num_reg_ra) |
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| 186 | { |
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| 187 | log_printf(TRACE,Reservation_station,FUNCTION," -> BYPASS_WRITE [%d] - Hit queue[%d]-GPR_RA[%d]",i,index,_queue[index]._num_reg_ra); |
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| 188 | _queue[index]._data_ra_val = 1; |
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| 189 | _queue[index]._data_ra = PORT_READ(in_BYPASS_WRITE_GPR_DATA [j]); |
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| 190 | } |
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| 191 | if (PORT_READ(in_BYPASS_WRITE_GPR_NUM_REG [j]) == _queue[index]._num_reg_rb) |
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| 192 | { |
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| 193 | log_printf(TRACE,Reservation_station,FUNCTION," -> BYPASS_WRITE [%d] - Hit queue[%d]-GPR_RB[%d]",i,index,_queue[index]._num_reg_rb); |
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| 194 | _queue[index]._data_rb_val = 1; |
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| 195 | _queue[index]._data_rb = PORT_READ(in_BYPASS_WRITE_GPR_DATA [j]); |
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| 196 | } |
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| 197 | } |
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| 198 | if ((PORT_READ(in_BYPASS_WRITE_SPR_VAL [j]) == 1) and |
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| 199 | (PORT_READ(in_BYPASS_WRITE_SPR_NUM_REG[j]) == _queue[index]._num_reg_rc)) |
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| 200 | { |
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| 201 | log_printf(TRACE,Reservation_station,FUNCTION," -> BYPASS_WRITE [%d] - Hit queue[%d]-SPR_RC[%d]",i,index,_queue[index]._num_reg_rc); |
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| 202 | _queue[index]._data_rc_val = 1; |
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| 203 | _queue[index]._data_rc = PORT_READ(in_BYPASS_WRITE_SPR_DATA [j]); |
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| 204 | } |
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| 205 | } |
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| 206 | } |
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| 207 | // ***** bypass - bypass_memory |
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| 208 | for (uint32_t j=0; j<_param->_nb_bypass_memory; j++) |
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| 209 | { |
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[69] | 210 | bool cmp; |
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| 211 | if (_param->_have_port_ooo_engine_id) |
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| 212 | cmp = (PORT_READ(in_BYPASS_MEMORY_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id); |
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| 213 | else |
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| 214 | cmp = true; |
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| 215 | |
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| 216 | if ((PORT_READ(in_BYPASS_MEMORY_VAL [j]) == 1) and cmp) |
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[55] | 217 | { |
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| 218 | if (PORT_READ(in_BYPASS_MEMORY_NUM_REG [j]) == _queue[index]._num_reg_ra) |
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| 219 | { |
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| 220 | log_printf(TRACE,Reservation_station,FUNCTION," -> BYPASS_MEMORY [%d] - Hit queue[%d]-GPR_RA[%d]",i,index,_queue[index]._num_reg_ra); |
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| 221 | _queue[index]._data_ra_val = 1; |
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| 222 | _queue[index]._data_ra = PORT_READ(in_BYPASS_MEMORY_DATA [j]); |
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| 223 | } |
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| 224 | if (PORT_READ(in_BYPASS_MEMORY_NUM_REG [j]) == _queue[index]._num_reg_rb) |
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| 225 | { |
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| 226 | log_printf(TRACE,Reservation_station,FUNCTION," -> BYPASS_MEMORY [%d] - Hit queue[%d]-GPR_RB[%d]",i,index,_queue[index]._num_reg_rb); |
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| 227 | _queue[index]._data_rb_val = 1; |
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| 228 | _queue[index]._data_rb = PORT_READ(in_BYPASS_MEMORY_DATA [j]); |
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| 229 | } |
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| 230 | } |
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| 231 | } |
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| 232 | } |
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[69] | 233 | // ***** PUSH to reservation station |
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| 234 | if ((PORT_READ(in_INSERT_VAL) == 1) and |
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| 235 | ( internal_INSERT_ACK == 1)) |
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| 236 | { |
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| 237 | log_printf(TRACE,Reservation_station,FUNCTION,"PUSH"); |
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[55] | 238 | |
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[69] | 239 | // Write in reservation station |
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| 240 | uint32_t index; |
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[55] | 241 | |
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[69] | 242 | #ifdef SYSTEMC_VHDL_COMPATIBILITY |
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| 243 | index = internal_INSERT_SLOT; |
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| 244 | _queue_valid [internal_INSERT_SLOT] = true; |
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| 245 | #else |
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| 246 | index = _queue_control->push(); |
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[55] | 247 | #endif |
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[69] | 248 | log_printf(TRACE,Reservation_station,FUNCTION," * index : %d",index); |
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[55] | 249 | |
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[69] | 250 | if (_param->_have_port_context_id) |
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| 251 | _queue[index]._context_id = PORT_READ(in_INSERT_CONTEXT_ID ); |
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| 252 | if (_param->_have_port_front_end_id) |
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| 253 | _queue[index]._front_end_id = PORT_READ(in_INSERT_FRONT_END_ID ); |
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| 254 | if (_param->_have_port_ooo_engine_id) |
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| 255 | _queue[index]._ooo_engine_id = PORT_READ(in_INSERT_OOO_ENGINE_ID ); |
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| 256 | if (_param->_have_port_rob_id) |
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| 257 | _queue[index]._rob_id = PORT_READ(in_INSERT_ROB_ID ); |
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| 258 | _queue[index]._operation = PORT_READ(in_INSERT_OPERATION ); |
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| 259 | _queue[index]._type = PORT_READ(in_INSERT_TYPE ); |
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| 260 | _queue[index]._has_immediat = PORT_READ(in_INSERT_HAS_IMMEDIAT ); |
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| 261 | _queue[index]._immediat = PORT_READ(in_INSERT_IMMEDIAT ); |
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| 262 | // _queue[index]._read_ra = PORT_READ(in_INSERT_READ_RA ); |
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| 263 | _queue[index]._num_reg_ra = PORT_READ(in_INSERT_NUM_REG_RA ); |
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| 264 | _queue[index]._data_ra_val = PORT_READ(in_INSERT_DATA_RA_VAL ); |
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| 265 | _queue[index]._data_ra = PORT_READ(in_INSERT_DATA_RA ); |
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| 266 | // _queue[index]._read_rb = PORT_READ(in_INSERT_READ_RB ); |
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| 267 | _queue[index]._num_reg_rb = PORT_READ(in_INSERT_NUM_REG_RB ); |
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| 268 | _queue[index]._data_rb_val = PORT_READ(in_INSERT_DATA_RB_VAL ); |
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| 269 | _queue[index]._data_rb = PORT_READ(in_INSERT_DATA_RB ); |
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| 270 | // _queue[index]._read_rc = PORT_READ(in_INSERT_READ_RC ); |
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| 271 | _queue[index]._num_reg_rc = PORT_READ(in_INSERT_NUM_REG_RC ); |
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| 272 | _queue[index]._data_rc_val = PORT_READ(in_INSERT_DATA_RC_VAL ); |
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| 273 | _queue[index]._data_rc = PORT_READ(in_INSERT_DATA_RC ); |
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| 274 | _queue[index]._write_rd = PORT_READ(in_INSERT_WRITE_RD ); |
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| 275 | _queue[index]._num_reg_rd = PORT_READ(in_INSERT_NUM_REG_RD ); |
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| 276 | _queue[index]._write_re = PORT_READ(in_INSERT_WRITE_RE ); |
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| 277 | _queue[index]._num_reg_re = PORT_READ(in_INSERT_NUM_REG_RE ); |
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| 278 | // dump_queue(); |
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| 279 | } |
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| 280 | } |
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| 281 | |
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| 282 | end_cycle (); |
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| 283 | |
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[55] | 284 | log_printf(FUNC,Reservation_station,FUNCTION,"End"); |
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| 285 | }; |
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| 286 | |
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| 287 | }; // end namespace reservation_station |
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| 288 | }; // end namespace read_unit |
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| 289 | }; // end namespace multi_read_unit |
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| 290 | }; // end namespace execute_loop |
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| 291 | }; // end namespace multi_execute_loop |
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| 292 | }; // end namespace core |
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| 293 | |
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| 294 | }; // end namespace behavioural |
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| 295 | }; // end namespace morpheo |
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| 296 | #endif |
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| 297 | //#endif |
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