[83] | 1 | /* |
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| 2 | * $Id: test.cpp 101 2009-01-15 17:19:08Z rosiere $ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | * Test |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/include/test.h" |
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| 10 | #include "Behavioural/include/Allocation.h" |
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| 11 | |
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| 12 | void test (string name, |
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| 13 | morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters * _param) |
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| 14 | { |
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| 15 | msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); |
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| 16 | |
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| 17 | #ifdef STATISTICS |
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| 18 | morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); |
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| 19 | #endif |
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| 20 | |
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| 21 | Tusage_t _usage = USE_ALL; |
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| 22 | |
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| 23 | // _usage = usage_unset(_usage,USE_SYSTEMC ); |
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| 24 | // _usage = usage_unset(_usage,USE_VHDL ); |
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| 25 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); |
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| 26 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); |
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| 27 | // _usage = usage_unset(_usage,USE_POSITION ); |
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| 28 | // _usage = usage_unset(_usage,USE_STATISTICS ); |
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| 29 | // _usage = usage_unset(_usage,USE_INFORMATION ); |
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| 30 | |
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| 31 | Context_State * _Context_State = new Context_State |
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| 32 | (name.c_str(), |
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| 33 | #ifdef STATISTICS |
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| 34 | _parameters_statistics, |
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| 35 | #endif |
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| 36 | _param, |
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| 37 | _usage); |
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| 38 | |
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| 39 | #ifdef SYSTEMC |
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| 40 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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| 41 | { |
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| 42 | /********************************************************************* |
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| 43 | * Déclarations des signaux |
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| 44 | *********************************************************************/ |
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| 45 | string rename; |
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| 46 | |
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| 47 | sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); |
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| 48 | sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); |
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| 49 | |
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[88] | 50 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_VAL ," in_BRANCH_EVENT_VAL ",Tcontrol_t ,_param->_nb_context); |
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| 51 | ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ACK ,"out_BRANCH_EVENT_ACK ",Tcontrol_t ,_param->_nb_context); |
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| 52 | //ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_CONTEXT_ID ," in_BRANCH_EVENT_CONTEXT_ID ",Tcontext_t ,_param->_nb_context); |
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[98] | 53 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_DEPTH ," in_BRANCH_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context); |
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[88] | 54 | //ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_MISS_PREDICTION ," in_BRANCH_EVENT_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_context); |
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| 55 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_SRC ," in_BRANCH_EVENT_ADDRESS_SRC ",Taddress_t ,_param->_nb_context); |
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[95] | 56 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ," in_BRANCH_EVENT_ADDRESS_DEST_VAL ",Tcontrol_t ,_param->_nb_context); |
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[88] | 57 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ," in_BRANCH_EVENT_ADDRESS_DEST ",Taddress_t ,_param->_nb_context); |
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| 58 | |
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[83] | 59 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_VAL ," in_DECOD_EVENT_VAL ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 60 | ALLOC1_SC_SIGNAL(out_DECOD_EVENT_ACK ,"out_DECOD_EVENT_ACK ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 61 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_CONTEXT_ID ," in_DECOD_EVENT_CONTEXT_ID ",Tcontext_t ,_param->_nb_decod_unit); |
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| 62 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_DEPTH ," in_DECOD_EVENT_DEPTH ",Tdepth_t ,_param->_nb_decod_unit); |
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| 63 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_TYPE ," in_DECOD_EVENT_TYPE ",Tevent_type_t,_param->_nb_decod_unit); |
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| 64 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT ," in_DECOD_EVENT_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 65 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS ," in_DECOD_EVENT_ADDRESS ",Taddress_t ,_param->_nb_decod_unit); |
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| 66 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR ," in_DECOD_EVENT_ADDRESS_EPCR ",Taddress_t ,_param->_nb_decod_unit); |
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| 67 | |
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[88] | 68 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_VAL ," in_COMMIT_EVENT_VAL ",Tcontrol_t ); |
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| 69 | ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ACK ,"out_COMMIT_EVENT_ACK ",Tcontrol_t ); |
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| 70 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_CONTEXT_ID ," in_COMMIT_EVENT_CONTEXT_ID ",Tcontext_t ); |
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| 71 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_DEPTH ," in_COMMIT_EVENT_DEPTH ",Tdepth_t ); |
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| 72 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_TYPE ," in_COMMIT_EVENT_TYPE ",Tevent_type_t); |
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| 73 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_IS_DELAY_SLOT ," in_COMMIT_EVENT_IS_DELAY_SLOT ",Tcontrol_t ); |
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| 74 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS ," in_COMMIT_EVENT_ADDRESS ",Taddress_t ); |
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| 75 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EPCR ," in_COMMIT_EVENT_ADDRESS_EPCR ",Taddress_t ); |
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| 76 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR_VAL ," in_COMMIT_EVENT_ADDRESS_EEAR_VAL ",Tcontrol_t ); |
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[97] | 77 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR ," in_COMMIT_EVENT_ADDRESS_EEAR ",Tgeneral_data_t); |
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[83] | 78 | |
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| 79 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ," in_BRANCH_COMPLETE_VAL ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 80 | ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,"out_BRANCH_COMPLETE_ACK ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 81 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ," in_BRANCH_COMPLETE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_branch_complete); |
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| 82 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ," in_BRANCH_COMPLETE_DEPTH ",Tdepth_t ,_param->_nb_inst_branch_complete); |
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| 83 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION," in_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 84 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ," in_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 85 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ," in_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); |
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| 86 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ," in_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); |
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| 87 | |
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| 88 | |
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[88] | 89 | ALLOC1_SC_SIGNAL( in_NB_INST_DECOD_ALL ," in_NB_INST_DECOD_ALL ",Tcounter_t ,_param->_nb_context ); |
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| 90 | ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_ALL ," in_NB_INST_COMMIT_ALL ",Tcounter_t ,_param->_nb_context ); |
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| 91 | ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_MEM ," in_NB_INST_COMMIT_MEM ",Tcounter_t ,_param->_nb_context ); |
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[83] | 92 | |
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| 93 | ALLOC1_SC_SIGNAL(out_EVENT_VAL ,"out_EVENT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 94 | ALLOC1_SC_SIGNAL( in_EVENT_ACK ," in_EVENT_ACK ",Tcontrol_t ,_param->_nb_context ); |
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| 95 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS ,"out_EVENT_ADDRESS ",Taddress_t ,_param->_nb_context ); |
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| 96 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT ,"out_EVENT_ADDRESS_NEXT ",Taddress_t ,_param->_nb_context ); |
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| 97 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL ,"out_EVENT_ADDRESS_NEXT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 98 | ALLOC1_SC_SIGNAL(out_EVENT_IS_DS_TAKE ,"out_EVENT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context ); |
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[97] | 99 | ALLOC1_SC_SIGNAL(out_EVENT_TYPE ,"out_EVENT_TYPE ",Tevent_type_t,_param->_nb_context ); |
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| 100 | ALLOC1_SC_SIGNAL(out_EVENT_DEPTH ,"out_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context ); |
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| 101 | |
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[88] | 102 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_VAL ,"out_SPR_EVENT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 103 | ALLOC1_SC_SIGNAL( in_SPR_EVENT_ACK ," in_SPR_EVENT_ACK ",Tcontrol_t ,_param->_nb_context ); |
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| 104 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EPCR ,"out_SPR_EVENT_EPCR ",Taddress_t ,_param->_nb_context ); |
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| 105 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EEAR ,"out_SPR_EVENT_EEAR ",Taddress_t ,_param->_nb_context ); |
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| 106 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EEAR_WEN ,"out_SPR_EVENT_EEAR_WEN ",Tcontrol_t ,_param->_nb_context ); |
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| 107 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_SR_DSX ,"out_SPR_EVENT_SR_DSX ",Tcontrol_t ,_param->_nb_context ); |
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| 108 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_SR_TO_ESR ,"out_SPR_EVENT_SR_TO_ESR ",Tcontrol_t ,_param->_nb_context ); |
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[83] | 109 | |
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| 110 | ALLOC1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE ,"out_CONTEXT_DECOD_ENABLE ",Tcontrol_t ,_param->_nb_context ); |
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| 111 | |
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[88] | 112 | ALLOC1_SC_SIGNAL( in_DEPTH_MIN ," in_DEPTH_MIN ",Tdepth_t ,_param->_nb_context ); |
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[83] | 113 | |
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[88] | 114 | ALLOC1_SC_SIGNAL( in_SPR_SR_IEE ," in_SPR_SR_IEE ",Tcontrol_t ,_param->_nb_context ); |
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| 115 | ALLOC1_SC_SIGNAL( in_SPR_SR_EPH ," in_SPR_SR_EPH ",Tcontrol_t ,_param->_nb_context ); |
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| 116 | |
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| 117 | ALLOC1_SC_SIGNAL( in_INTERRUPT_ENABLE ," in_INTERRUPT_ENABLE ",Tcontrol_t ,_param->_nb_context ); |
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| 118 | |
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[83] | 119 | /******************************************************** |
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| 120 | * Instanciation |
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| 121 | ********************************************************/ |
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| 122 | |
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| 123 | msg(_("<%s> : Instanciation of _Context_State.\n"),name.c_str()); |
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| 124 | |
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| 125 | (*(_Context_State->in_CLOCK)) (*(in_CLOCK)); |
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| 126 | (*(_Context_State->in_NRESET)) (*(in_NRESET)); |
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| 127 | |
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[88] | 128 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_VAL ,_param->_nb_context); |
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| 129 | INSTANCE1_SC_SIGNAL(_Context_State,out_BRANCH_EVENT_ACK ,_param->_nb_context); |
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| 130 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context); |
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[98] | 131 | if (_param->_have_port_depth) |
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| 132 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_DEPTH ,_param->_nb_context); |
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[88] | 133 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context); |
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| 134 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context); |
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[95] | 135 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); |
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[88] | 136 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); |
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[83] | 137 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_VAL ,_param->_nb_decod_unit); |
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| 138 | INSTANCE1_SC_SIGNAL(_Context_State,out_DECOD_EVENT_ACK ,_param->_nb_decod_unit); |
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| 139 | if (_param->_have_port_context_id) |
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| 140 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_CONTEXT_ID ,_param->_nb_decod_unit); |
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[88] | 141 | if (_param->_have_port_depth) |
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[83] | 142 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_DEPTH ,_param->_nb_decod_unit); |
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| 143 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_TYPE ,_param->_nb_decod_unit); |
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| 144 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_IS_DELAY_SLOT ,_param->_nb_decod_unit); |
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| 145 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS ,_param->_nb_decod_unit); |
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| 146 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS_EPCR ,_param->_nb_decod_unit); |
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| 147 | |
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[88] | 148 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_VAL ); |
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| 149 | INSTANCE_SC_SIGNAL (_Context_State,out_COMMIT_EVENT_ACK ); |
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[83] | 150 | if (_param->_have_port_context_id) |
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[88] | 151 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_CONTEXT_ID ); |
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| 152 | if (_param->_have_port_depth) |
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| 153 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_DEPTH ); |
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| 154 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_TYPE ); |
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| 155 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_IS_DELAY_SLOT ); |
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| 156 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS ); |
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| 157 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EPCR ); |
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| 158 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR_VAL ); |
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| 159 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR ); |
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[83] | 160 | |
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| 161 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); |
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| 162 | INSTANCE1_SC_SIGNAL(_Context_State,out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete); |
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| 163 | if (_param->_have_port_context_id) |
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| 164 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); |
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[88] | 165 | if (_param->_have_port_depth) |
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[83] | 166 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); |
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| 167 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); |
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| 168 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); |
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| 169 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); |
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| 170 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); |
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| 171 | |
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[88] | 172 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_DECOD_ALL ,_param->_nb_context ); |
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| 173 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_ALL ,_param->_nb_context ); |
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| 174 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_MEM ,_param->_nb_context ); |
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[83] | 175 | |
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| 176 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_VAL ,_param->_nb_context ); |
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| 177 | INSTANCE1_SC_SIGNAL(_Context_State, in_EVENT_ACK ,_param->_nb_context ); |
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| 178 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS ,_param->_nb_context ); |
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| 179 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS_NEXT ,_param->_nb_context ); |
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| 180 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS_NEXT_VAL ,_param->_nb_context ); |
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| 181 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_IS_DS_TAKE ,_param->_nb_context ); |
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[97] | 182 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_TYPE ,_param->_nb_context ); |
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| 183 | if (_param->_have_port_depth) |
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| 184 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_DEPTH ,_param->_nb_context ); |
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[83] | 185 | |
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[88] | 186 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_VAL ,_param->_nb_context ); |
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| 187 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_EVENT_ACK ,_param->_nb_context ); |
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| 188 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EPCR ,_param->_nb_context ); |
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| 189 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EEAR ,_param->_nb_context ); |
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| 190 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EEAR_WEN ,_param->_nb_context ); |
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| 191 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_SR_DSX ,_param->_nb_context ); |
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| 192 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_SR_TO_ESR ,_param->_nb_context ); |
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[83] | 193 | |
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| 194 | INSTANCE1_SC_SIGNAL(_Context_State,out_CONTEXT_DECOD_ENABLE ,_param->_nb_context ); |
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| 195 | |
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| 196 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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[88] | 197 | if (_param->_have_port_depth) |
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| 198 | INSTANCE_SC_SIGNAL(_Context_State, in_DEPTH_MIN [i]); |
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[83] | 199 | |
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[88] | 200 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_SR_IEE ,_param->_nb_context ); |
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| 201 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_SR_EPH ,_param->_nb_context ); |
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| 202 | |
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| 203 | INSTANCE1_SC_SIGNAL(_Context_State, in_INTERRUPT_ENABLE ,_param->_nb_context ); |
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| 204 | |
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[83] | 205 | msg(_("<%s> : Start Simulation ............\n"),name.c_str()); |
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| 206 | |
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| 207 | Time * _time = new Time(); |
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| 208 | |
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| 209 | /******************************************************** |
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| 210 | * Simulation - Begin |
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| 211 | ********************************************************/ |
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| 212 | |
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| 213 | // Initialisation |
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| 214 | |
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[101] | 215 | const bool test1 = true; |
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| 216 | const bool test2 = true; |
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| 217 | const bool test3 = true; |
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| 218 | const bool test4 = true; |
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| 219 | const bool test5 = true; |
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| 220 | const bool test6 = true; |
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| 221 | const bool test7 = true; |
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| 222 | const bool test8 = true; |
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| 223 | const bool test9 = true; |
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| 224 | const bool test10 = true; |
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| 225 | const bool test11 = true; |
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| 226 | const bool test12 = true; |
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| 227 | |
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[83] | 228 | const uint32_t seed = 0; |
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| 229 | //const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
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| 230 | |
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| 231 | srand(seed); |
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| 232 | |
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[98] | 233 | const int32_t percent_transaction_branch_event = 75; |
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[83] | 234 | const int32_t percent_transaction_decod_event = 75; |
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| 235 | const int32_t percent_transaction_commit_event = 75; |
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[98] | 236 | //const int32_t percent_transaction_branch_complete = 75; |
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[83] | 237 | const int32_t percent_transaction_event = 75; |
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| 238 | const int32_t percent_transaction_spr = 75; |
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| 239 | |
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| 240 | SC_START(0); |
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| 241 | LABEL("Initialisation"); |
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| 242 | |
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| 243 | LABEL("Reset"); |
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| 244 | in_NRESET->write(0); |
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| 245 | SC_START(5); |
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| 246 | in_NRESET->write(1); |
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| 247 | |
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| 248 | LABEL("Loop of Test"); |
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| 249 | |
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| 250 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
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| 251 | { |
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| 252 | LABEL("Iteration %d",iteration); |
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| 253 | for (uint32_t i=0; i<_param->_nb_decod_unit; i++) |
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| 254 | in_DECOD_EVENT_VAL [i]->write(0); |
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[88] | 255 | in_COMMIT_EVENT_VAL ->write(0); |
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[98] | 256 | // for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
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| 257 | // in_BRANCH_COMPLETE_VAL [i]->write(0); |
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| 258 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 259 | in_BRANCH_EVENT_VAL [i]->write(0); |
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[83] | 260 | |
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| 261 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 262 | { |
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[88] | 263 | in_BRANCH_EVENT_VAL [i]->write(0); |
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| 264 | in_EVENT_ACK [i]->write(0); |
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| 265 | in_SPR_EVENT_ACK [i]->write(0); |
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| 266 | in_SPR_SR_IEE [i]->write(0); |
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| 267 | in_SPR_SR_EPH [i]->write(0); |
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| 268 | in_INTERRUPT_ENABLE [i]->write(0); |
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[83] | 269 | |
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| 270 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[i]->read(), 1); |
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| 271 | } |
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| 272 | |
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| 273 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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[88] | 274 | if (_param->_have_port_depth) |
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| 275 | in_DEPTH_MIN [i]->write((_param->_array_size_depth[i]==0)?0:(i%_param->_array_size_depth[i])); |
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[83] | 276 | |
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| 277 | uint32_t context = rand()%_param->_nb_context; |
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| 278 | |
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[101] | 279 | if (test1) |
---|
[83] | 280 | { |
---|
| 281 | SC_START(3); |
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| 282 | |
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| 283 | LABEL("msync (begin)"); |
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[88] | 284 | in_NB_INST_DECOD_ALL [context]->write(1); |
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| 285 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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| 286 | in_NB_INST_COMMIT_MEM [context]->write(1); |
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[83] | 287 | |
---|
| 288 | uint32_t port = rand()%_param->_nb_decod_unit; |
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| 289 | |
---|
| 290 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
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| 291 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
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| 292 | in_DECOD_EVENT_ADDRESS [port]->write(0x100); |
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| 293 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbeef); |
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[88] | 294 | if (_param->_have_port_depth) |
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| 295 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
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[83] | 296 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_MSYNC); |
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| 297 | |
---|
| 298 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 299 | |
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[101] | 300 | in_DECOD_EVENT_VAL [port]->write(1); |
---|
| 301 | |
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| 302 | SC_START(0); |
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| 303 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 304 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
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| 305 | |
---|
| 306 | SC_START(1); |
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| 307 | |
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[88] | 308 | in_NB_INST_DECOD_ALL [context]->write(0); |
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[101] | 309 | in_NB_INST_COMMIT_ALL [context]->write(0); |
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[88] | 310 | in_NB_INST_COMMIT_MEM [context]->write(0); |
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[101] | 311 | |
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| 312 | LABEL("msync (send decod)"); |
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| 313 | SC_START(0); |
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[83] | 314 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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[101] | 315 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
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| 316 | |
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[83] | 317 | SC_START(1); |
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[101] | 318 | |
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| 319 | in_DECOD_EVENT_VAL [port]->write(0); |
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| 320 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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[83] | 321 | |
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| 322 | LABEL("msync (wait end)"); |
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| 323 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
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| 324 | |
---|
| 325 | SC_START(3); |
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| 326 | |
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[101] | 327 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
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| 328 | in_NB_INST_COMMIT_ALL [context]->write(0); |
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| 329 | |
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[83] | 330 | SC_START(1); |
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| 331 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 332 | } |
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| 333 | |
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[101] | 334 | if (test2) |
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[83] | 335 | { |
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| 336 | SC_START(3); |
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[101] | 337 | |
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[83] | 338 | LABEL("psync (begin)"); |
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[88] | 339 | in_NB_INST_DECOD_ALL [context]->write(1); |
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| 340 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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| 341 | in_NB_INST_COMMIT_MEM [context]->write(1); |
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[83] | 342 | |
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| 343 | uint32_t port = rand()%_param->_nb_decod_unit; |
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| 344 | |
---|
| 345 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
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| 346 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
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| 347 | in_DECOD_EVENT_ADDRESS [port]->write(0x200); |
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| 348 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbebe); |
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[88] | 349 | if (_param->_have_port_depth) |
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[101] | 350 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
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[83] | 351 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_PSYNC); |
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| 352 | |
---|
| 353 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 354 | |
---|
[101] | 355 | in_DECOD_EVENT_VAL [port]->write(1); |
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| 356 | |
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| 357 | SC_START(0); |
---|
| 358 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 359 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
---|
| 360 | |
---|
| 361 | SC_START(1); |
---|
| 362 | |
---|
| 363 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 364 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 365 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
| 366 | |
---|
| 367 | LABEL("psync (send decod)"); |
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| 368 | SC_START(0); |
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| 369 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 370 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
---|
| 371 | |
---|
| 372 | SC_START(1); |
---|
| 373 | |
---|
| 374 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 375 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
[83] | 376 | |
---|
| 377 | LABEL("psync (wait end)"); |
---|
| 378 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 379 | |
---|
| 380 | SC_START(3); |
---|
| 381 | |
---|
[101] | 382 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
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[88] | 383 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
[101] | 384 | |
---|
[83] | 385 | SC_START(1); |
---|
| 386 | |
---|
| 387 | bool find = false; |
---|
| 388 | do |
---|
| 389 | { |
---|
| 390 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 391 | |
---|
| 392 | SC_START(0); |
---|
| 393 | |
---|
| 394 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 395 | { |
---|
| 396 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x201); |
---|
| 397 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xdeadbebe); |
---|
| 398 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 399 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 400 | |
---|
| 401 | find = true; |
---|
| 402 | } |
---|
| 403 | |
---|
| 404 | SC_START(1); |
---|
| 405 | } |
---|
| 406 | while (not find); |
---|
| 407 | |
---|
| 408 | in_EVENT_ACK [context]->write(0); |
---|
| 409 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 410 | } |
---|
| 411 | |
---|
[101] | 412 | if (test3) |
---|
[83] | 413 | { |
---|
| 414 | SC_START(3); |
---|
[101] | 415 | |
---|
[83] | 416 | LABEL("csync (begin)"); |
---|
[88] | 417 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 418 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 419 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 420 | |
---|
| 421 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
| 422 | |
---|
| 423 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
| 424 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
[101] | 425 | in_DECOD_EVENT_ADDRESS [port]->write(0x300); |
---|
| 426 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdead0300); |
---|
[88] | 427 | if (_param->_have_port_depth) |
---|
| 428 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
[83] | 429 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_CSYNC); |
---|
| 430 | |
---|
| 431 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 432 | |
---|
[101] | 433 | in_DECOD_EVENT_VAL [port]->write(1); |
---|
| 434 | |
---|
| 435 | SC_START(0); |
---|
| 436 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 437 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
---|
| 438 | |
---|
| 439 | SC_START(1); |
---|
| 440 | |
---|
| 441 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 442 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 443 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
| 444 | |
---|
| 445 | LABEL("csync (send decod)"); |
---|
| 446 | SC_START(0); |
---|
| 447 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 448 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
---|
| 449 | |
---|
| 450 | SC_START(1); |
---|
| 451 | |
---|
| 452 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 453 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
[83] | 454 | |
---|
| 455 | LABEL("csync (wait end)"); |
---|
| 456 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 457 | |
---|
| 458 | SC_START(3); |
---|
| 459 | |
---|
[101] | 460 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
[88] | 461 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
[101] | 462 | |
---|
[83] | 463 | SC_START(1); |
---|
| 464 | |
---|
| 465 | bool find = false; |
---|
| 466 | do |
---|
| 467 | { |
---|
| 468 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 469 | |
---|
| 470 | SC_START(0); |
---|
| 471 | |
---|
| 472 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 473 | { |
---|
[101] | 474 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x301); |
---|
| 475 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xdead0300); |
---|
[83] | 476 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 477 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
[101] | 478 | |
---|
[83] | 479 | find = true; |
---|
| 480 | } |
---|
| 481 | |
---|
| 482 | SC_START(1); |
---|
| 483 | } |
---|
| 484 | while (not find); |
---|
[101] | 485 | |
---|
[83] | 486 | in_EVENT_ACK [context]->write(0); |
---|
[101] | 487 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 488 | |
---|
[83] | 489 | } |
---|
| 490 | |
---|
[101] | 491 | if (test4) |
---|
[83] | 492 | { |
---|
| 493 | SC_START(3); |
---|
| 494 | |
---|
[101] | 495 | LABEL("spr_access (begin)"); |
---|
[88] | 496 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 497 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 498 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 499 | |
---|
| 500 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
| 501 | |
---|
| 502 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
| 503 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
[101] | 504 | in_DECOD_EVENT_ADDRESS [port]->write(0x400); |
---|
| 505 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdead0400); |
---|
[88] | 506 | if (_param->_have_port_depth) |
---|
| 507 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
[83] | 508 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_SPR_ACCESS); |
---|
| 509 | |
---|
| 510 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 511 | |
---|
[101] | 512 | in_DECOD_EVENT_VAL [port]->write(1); |
---|
| 513 | |
---|
| 514 | SC_START(0); |
---|
| 515 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 516 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 0); |
---|
| 517 | |
---|
| 518 | SC_START(1); |
---|
| 519 | |
---|
[88] | 520 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 521 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 522 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[101] | 523 | |
---|
| 524 | LABEL("spr_access (send decod)"); |
---|
| 525 | SC_START(0); |
---|
[83] | 526 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
[101] | 527 | TEST(Tcontrol_t, out_DECOD_EVENT_ACK [port] ->read(), 1); |
---|
| 528 | |
---|
[83] | 529 | SC_START(1); |
---|
[101] | 530 | |
---|
| 531 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 532 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
[83] | 533 | |
---|
[101] | 534 | LABEL("spr_access (wait end)"); |
---|
[83] | 535 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 536 | |
---|
| 537 | SC_START(3); |
---|
| 538 | |
---|
[101] | 539 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
[88] | 540 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
[101] | 541 | |
---|
[83] | 542 | SC_START(1); |
---|
| 543 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 544 | } |
---|
| 545 | |
---|
[101] | 546 | if (test5) |
---|
[83] | 547 | { |
---|
| 548 | SC_START(3); |
---|
| 549 | |
---|
| 550 | LABEL("miss (begin)"); |
---|
[88] | 551 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 552 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 553 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 554 | |
---|
[98] | 555 | // uint32_t port = rand()%_param->_nb_inst_branch_complete; |
---|
[83] | 556 | |
---|
[98] | 557 | // in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); |
---|
| 558 | // if (_param->_have_port_depth) |
---|
| 559 | // in_BRANCH_COMPLETE_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
| 560 | // in_BRANCH_COMPLETE_ADDRESS_SRC [port]->write(0x400); |
---|
| 561 | // in_BRANCH_COMPLETE_ADDRESS_DEST [port]->write(0x500); |
---|
| 562 | // in_BRANCH_COMPLETE_MISS_PREDICTION [port]->write(1); |
---|
| 563 | // in_BRANCH_COMPLETE_TAKE [port]->write(0); |
---|
| 564 | |
---|
| 565 | // TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 566 | |
---|
| 567 | // do |
---|
| 568 | // { |
---|
| 569 | // in_BRANCH_COMPLETE_VAL [port]->write(rand()%percent_transaction_branch_complete); |
---|
| 570 | |
---|
| 571 | // SC_START(1); |
---|
| 572 | // } |
---|
| 573 | // while (not ( in_BRANCH_COMPLETE_VAL [port]->read() and |
---|
| 574 | // out_BRANCH_COMPLETE_ACK [port]->read())); |
---|
| 575 | // in_BRANCH_COMPLETE_VAL [port]->write(0); |
---|
| 576 | |
---|
| 577 | uint32_t port = context; |
---|
| 578 | |
---|
[88] | 579 | if (_param->_have_port_depth) |
---|
[98] | 580 | in_BRANCH_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
| 581 | in_BRANCH_EVENT_ADDRESS_SRC [port]->write(0x400); |
---|
| 582 | in_BRANCH_EVENT_ADDRESS_DEST [port]->write(0x500); |
---|
| 583 | in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(0); |
---|
[83] | 584 | |
---|
| 585 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 586 | |
---|
| 587 | do |
---|
| 588 | { |
---|
[98] | 589 | in_BRANCH_EVENT_VAL [port]->write(rand()%percent_transaction_branch_event); |
---|
[83] | 590 | |
---|
| 591 | SC_START(1); |
---|
| 592 | } |
---|
[98] | 593 | while (not ( in_BRANCH_EVENT_VAL [port]->read() and |
---|
| 594 | out_BRANCH_EVENT_ACK [port]->read())); |
---|
| 595 | in_BRANCH_EVENT_VAL [port]->write(0); |
---|
[83] | 596 | |
---|
| 597 | LABEL("miss (wait end)"); |
---|
| 598 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 599 | |
---|
| 600 | SC_START(3); |
---|
| 601 | |
---|
[88] | 602 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 603 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 604 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 605 | |
---|
| 606 | SC_START(1); |
---|
| 607 | |
---|
| 608 | LABEL("miss (wait event)"); |
---|
| 609 | |
---|
| 610 | |
---|
| 611 | bool find = false; |
---|
| 612 | do |
---|
| 613 | { |
---|
| 614 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 615 | |
---|
| 616 | SC_START(0); |
---|
| 617 | |
---|
| 618 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 619 | { |
---|
| 620 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x401); |
---|
| 621 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x500); |
---|
| 622 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 623 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 624 | |
---|
| 625 | find = true; |
---|
| 626 | } |
---|
| 627 | |
---|
| 628 | SC_START(1); |
---|
| 629 | } |
---|
| 630 | while (not find); |
---|
| 631 | |
---|
| 632 | in_EVENT_ACK [context]->write(0); |
---|
| 633 | |
---|
| 634 | } |
---|
| 635 | |
---|
[101] | 636 | if (test6) |
---|
[83] | 637 | { |
---|
| 638 | SC_START(3); |
---|
| 639 | |
---|
| 640 | LABEL("miss (begin)"); |
---|
[88] | 641 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 642 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 643 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 644 | |
---|
[98] | 645 | // uint32_t port = rand()%_param->_nb_inst_branch_complete; |
---|
[83] | 646 | |
---|
[98] | 647 | // in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); |
---|
| 648 | // if (_param->_have_port_depth) |
---|
| 649 | // in_BRANCH_COMPLETE_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
| 650 | // in_BRANCH_COMPLETE_ADDRESS_SRC [port]->write(0x600); |
---|
| 651 | // in_BRANCH_COMPLETE_ADDRESS_DEST [port]->write(0x700); |
---|
| 652 | // in_BRANCH_COMPLETE_MISS_PREDICTION [port]->write(1); |
---|
| 653 | // in_BRANCH_COMPLETE_TAKE [port]->write(1); |
---|
[83] | 654 | |
---|
[98] | 655 | // TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 656 | |
---|
| 657 | // do |
---|
| 658 | // { |
---|
| 659 | // in_BRANCH_COMPLETE_VAL [port]->write(rand()%percent_transaction_branch_complete); |
---|
| 660 | |
---|
| 661 | // SC_START(1); |
---|
| 662 | // } |
---|
| 663 | // while (not ( in_BRANCH_COMPLETE_VAL [port]->read() and |
---|
| 664 | // out_BRANCH_COMPLETE_ACK [port]->read())); |
---|
| 665 | // in_BRANCH_COMPLETE_VAL [port]->write(0); |
---|
| 666 | |
---|
| 667 | uint32_t port = context; |
---|
| 668 | |
---|
| 669 | in_BRANCH_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
| 670 | in_BRANCH_EVENT_ADDRESS_SRC [port]->write(0x600); |
---|
| 671 | in_BRANCH_EVENT_ADDRESS_DEST [port]->write(0x700); |
---|
| 672 | in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(1); |
---|
| 673 | |
---|
[83] | 674 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 675 | |
---|
| 676 | do |
---|
| 677 | { |
---|
[98] | 678 | in_BRANCH_EVENT_VAL [port]->write(rand()%percent_transaction_branch_event); |
---|
[83] | 679 | |
---|
| 680 | SC_START(1); |
---|
| 681 | } |
---|
[98] | 682 | while (not ( in_BRANCH_EVENT_VAL [port]->read() and |
---|
| 683 | out_BRANCH_EVENT_ACK [port]->read())); |
---|
| 684 | in_BRANCH_EVENT_VAL [port]->write(0); |
---|
[83] | 685 | |
---|
| 686 | LABEL("miss (wait end)"); |
---|
| 687 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 688 | |
---|
| 689 | SC_START(3); |
---|
| 690 | |
---|
[88] | 691 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 692 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 693 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 694 | |
---|
| 695 | SC_START(1); |
---|
| 696 | |
---|
| 697 | LABEL("miss (wait event)"); |
---|
| 698 | |
---|
| 699 | bool find = false; |
---|
| 700 | do |
---|
| 701 | { |
---|
| 702 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 703 | |
---|
| 704 | SC_START(0); |
---|
| 705 | |
---|
| 706 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 707 | { |
---|
| 708 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x601); |
---|
| 709 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x700); |
---|
| 710 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),1); |
---|
| 711 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),1); |
---|
| 712 | |
---|
| 713 | find = true; |
---|
| 714 | } |
---|
| 715 | |
---|
| 716 | SC_START(1); |
---|
| 717 | } |
---|
| 718 | while (not find); |
---|
| 719 | |
---|
| 720 | in_EVENT_ACK [context]->write(0); |
---|
| 721 | } |
---|
| 722 | |
---|
[101] | 723 | if (test7) |
---|
[83] | 724 | { |
---|
| 725 | SC_START(3); |
---|
| 726 | |
---|
| 727 | LABEL("exception (begin)"); |
---|
[88] | 728 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 729 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 730 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 731 | |
---|
[88] | 732 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
[83] | 733 | |
---|
| 734 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
[88] | 735 | if (_param->_have_port_depth) |
---|
| 736 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
[83] | 737 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_EXCEPTION); |
---|
| 738 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
| 739 | in_DECOD_EVENT_ADDRESS [port]->write(0x800); |
---|
| 740 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0x900); |
---|
| 741 | |
---|
| 742 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 743 | |
---|
| 744 | do |
---|
| 745 | { |
---|
| 746 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 747 | |
---|
| 748 | SC_START(1); |
---|
| 749 | } |
---|
| 750 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 751 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 752 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 753 | |
---|
| 754 | LABEL("exception (wait end)"); |
---|
| 755 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 756 | |
---|
| 757 | SC_START(3); |
---|
| 758 | |
---|
[88] | 759 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 760 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 761 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 762 | |
---|
| 763 | SC_START(1); |
---|
| 764 | |
---|
| 765 | LABEL("exception (wait event)"); |
---|
| 766 | |
---|
| 767 | bool find = false; |
---|
| 768 | do |
---|
| 769 | { |
---|
| 770 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 771 | |
---|
| 772 | SC_START(0); |
---|
| 773 | |
---|
| 774 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 775 | { |
---|
| 776 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x800); |
---|
| 777 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x900); |
---|
| 778 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 779 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 780 | |
---|
| 781 | find = true; |
---|
| 782 | } |
---|
| 783 | |
---|
| 784 | SC_START(1); |
---|
| 785 | } |
---|
| 786 | while (not find); |
---|
| 787 | |
---|
| 788 | in_EVENT_ACK [context]->write(0); |
---|
| 789 | |
---|
| 790 | LABEL("exception (wait spr)"); |
---|
| 791 | |
---|
| 792 | find = false; |
---|
| 793 | do |
---|
| 794 | { |
---|
[88] | 795 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 796 | |
---|
| 797 | SC_START(0); |
---|
| 798 | |
---|
[88] | 799 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 800 | { |
---|
[88] | 801 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0x900); |
---|
| 802 | //TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),); |
---|
| 803 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 804 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 805 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 806 | |
---|
| 807 | find = true; |
---|
| 808 | } |
---|
| 809 | |
---|
| 810 | SC_START(1); |
---|
| 811 | } |
---|
| 812 | while (not find); |
---|
| 813 | |
---|
[88] | 814 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 815 | } |
---|
| 816 | |
---|
[101] | 817 | if (test8) |
---|
[83] | 818 | { |
---|
| 819 | SC_START(3); |
---|
| 820 | |
---|
| 821 | LABEL("exception (begin)"); |
---|
[88] | 822 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 823 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 824 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 825 | |
---|
[88] | 826 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
[83] | 827 | |
---|
| 828 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
[88] | 829 | if (_param->_have_port_depth) |
---|
| 830 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
[83] | 831 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_EXCEPTION); |
---|
| 832 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(1); |
---|
| 833 | in_DECOD_EVENT_ADDRESS [port]->write(0x800); |
---|
| 834 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0x900); |
---|
| 835 | |
---|
| 836 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 837 | |
---|
| 838 | do |
---|
| 839 | { |
---|
| 840 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 841 | |
---|
| 842 | SC_START(1); |
---|
| 843 | } |
---|
| 844 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 845 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 846 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 847 | |
---|
| 848 | LABEL("exception (wait end)"); |
---|
| 849 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 850 | |
---|
| 851 | SC_START(3); |
---|
| 852 | |
---|
[88] | 853 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 854 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 855 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 856 | |
---|
| 857 | SC_START(1); |
---|
| 858 | |
---|
| 859 | LABEL("exception (wait event)"); |
---|
| 860 | |
---|
| 861 | bool find = false; |
---|
| 862 | do |
---|
| 863 | { |
---|
| 864 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 865 | |
---|
| 866 | SC_START(0); |
---|
| 867 | |
---|
| 868 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 869 | { |
---|
| 870 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x800); |
---|
| 871 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x900); |
---|
| 872 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 873 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 874 | |
---|
| 875 | find = true; |
---|
| 876 | } |
---|
| 877 | |
---|
| 878 | SC_START(1); |
---|
| 879 | } |
---|
| 880 | while (not find); |
---|
| 881 | |
---|
| 882 | in_EVENT_ACK [context]->write(0); |
---|
| 883 | |
---|
| 884 | LABEL("exception (wait spr)"); |
---|
| 885 | |
---|
| 886 | find = false; |
---|
| 887 | do |
---|
| 888 | { |
---|
[88] | 889 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 890 | |
---|
| 891 | SC_START(0); |
---|
| 892 | |
---|
[88] | 893 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 894 | { |
---|
[88] | 895 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0x900); |
---|
| 896 | //TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),); |
---|
| 897 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 898 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 899 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 900 | |
---|
| 901 | find = true; |
---|
| 902 | } |
---|
| 903 | |
---|
| 904 | SC_START(1); |
---|
| 905 | } |
---|
| 906 | while (not find); |
---|
| 907 | |
---|
[88] | 908 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 909 | } |
---|
| 910 | |
---|
[101] | 911 | if (test9) |
---|
[83] | 912 | { |
---|
| 913 | SC_START(3); |
---|
| 914 | |
---|
| 915 | LABEL("exception (begin)"); |
---|
[88] | 916 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 917 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 918 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 919 | |
---|
[88] | 920 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 921 | if (_param->_have_port_depth) |
---|
| 922 | in_COMMIT_EVENT_DEPTH ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
| 923 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 924 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(0); |
---|
| 925 | in_COMMIT_EVENT_ADDRESS ->write(0xa00); |
---|
| 926 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xb00); |
---|
| 927 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xc00); |
---|
| 928 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(0); |
---|
[83] | 929 | |
---|
| 930 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 931 | |
---|
| 932 | do |
---|
| 933 | { |
---|
[88] | 934 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 935 | |
---|
| 936 | SC_START(1); |
---|
| 937 | } |
---|
[88] | 938 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 939 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 940 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 941 | |
---|
| 942 | LABEL("exception (wait end)"); |
---|
| 943 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 944 | |
---|
| 945 | SC_START(3); |
---|
| 946 | |
---|
[88] | 947 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 948 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 949 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 950 | |
---|
| 951 | SC_START(1); |
---|
| 952 | |
---|
| 953 | LABEL("exception (wait event)"); |
---|
| 954 | |
---|
| 955 | bool find = false; |
---|
| 956 | do |
---|
| 957 | { |
---|
| 958 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 959 | |
---|
| 960 | SC_START(0); |
---|
| 961 | |
---|
| 962 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 963 | { |
---|
| 964 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xa00); |
---|
| 965 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xb00); |
---|
| 966 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 967 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 968 | |
---|
| 969 | find = true; |
---|
| 970 | } |
---|
| 971 | |
---|
| 972 | SC_START(1); |
---|
| 973 | } |
---|
| 974 | while (not find); |
---|
| 975 | |
---|
| 976 | in_EVENT_ACK [context]->write(0); |
---|
| 977 | |
---|
| 978 | LABEL("exception (wait spr)"); |
---|
| 979 | |
---|
| 980 | find = false; |
---|
| 981 | do |
---|
| 982 | { |
---|
[88] | 983 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 984 | |
---|
| 985 | SC_START(0); |
---|
| 986 | |
---|
[88] | 987 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 988 | { |
---|
[88] | 989 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xb00); |
---|
| 990 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xc00); |
---|
| 991 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 992 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 993 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 994 | |
---|
| 995 | find = true; |
---|
| 996 | } |
---|
| 997 | |
---|
| 998 | SC_START(1); |
---|
| 999 | } |
---|
| 1000 | while (not find); |
---|
| 1001 | |
---|
[88] | 1002 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1003 | } |
---|
| 1004 | |
---|
[101] | 1005 | if (test10) |
---|
[83] | 1006 | { |
---|
| 1007 | SC_START(3); |
---|
| 1008 | |
---|
| 1009 | LABEL("exception (begin)"); |
---|
[88] | 1010 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1011 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1012 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1013 | |
---|
[88] | 1014 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1015 | if (_param->_have_port_depth) |
---|
| 1016 | in_COMMIT_EVENT_DEPTH ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
| 1017 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1018 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(1); |
---|
| 1019 | in_COMMIT_EVENT_ADDRESS ->write(0xd00); |
---|
| 1020 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xe00); |
---|
| 1021 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xf00); |
---|
| 1022 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(0); |
---|
[83] | 1023 | |
---|
| 1024 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1025 | |
---|
| 1026 | do |
---|
| 1027 | { |
---|
[88] | 1028 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1029 | |
---|
| 1030 | SC_START(1); |
---|
| 1031 | } |
---|
[88] | 1032 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1033 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1034 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1035 | |
---|
| 1036 | LABEL("exception (wait end)"); |
---|
| 1037 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1038 | |
---|
| 1039 | SC_START(3); |
---|
| 1040 | |
---|
[88] | 1041 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1042 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1043 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1044 | |
---|
| 1045 | SC_START(1); |
---|
| 1046 | |
---|
| 1047 | LABEL("exception (wait event)"); |
---|
| 1048 | |
---|
| 1049 | bool find = false; |
---|
| 1050 | do |
---|
| 1051 | { |
---|
| 1052 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1053 | |
---|
| 1054 | SC_START(0); |
---|
| 1055 | |
---|
| 1056 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1057 | { |
---|
| 1058 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xd00); |
---|
| 1059 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xe00); |
---|
| 1060 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1061 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1062 | |
---|
| 1063 | find = true; |
---|
| 1064 | } |
---|
| 1065 | |
---|
| 1066 | SC_START(1); |
---|
| 1067 | } |
---|
| 1068 | while (not find); |
---|
| 1069 | |
---|
| 1070 | in_EVENT_ACK [context]->write(0); |
---|
| 1071 | |
---|
| 1072 | LABEL("exception (wait spr)"); |
---|
| 1073 | |
---|
| 1074 | find = false; |
---|
| 1075 | do |
---|
| 1076 | { |
---|
[88] | 1077 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1078 | |
---|
| 1079 | SC_START(0); |
---|
| 1080 | |
---|
[88] | 1081 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1082 | { |
---|
[88] | 1083 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xe00); |
---|
| 1084 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xf00); |
---|
| 1085 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 1086 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 1087 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1088 | |
---|
| 1089 | find = true; |
---|
| 1090 | } |
---|
| 1091 | |
---|
| 1092 | SC_START(1); |
---|
| 1093 | } |
---|
| 1094 | while (not find); |
---|
| 1095 | |
---|
[88] | 1096 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1097 | } |
---|
| 1098 | |
---|
[101] | 1099 | if (test11) |
---|
[83] | 1100 | { |
---|
| 1101 | SC_START(3); |
---|
| 1102 | |
---|
| 1103 | LABEL("exception (begin)"); |
---|
[88] | 1104 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1105 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1106 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1107 | |
---|
[88] | 1108 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1109 | if (_param->_have_port_depth) |
---|
| 1110 | in_COMMIT_EVENT_DEPTH ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
| 1111 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1112 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(0); |
---|
| 1113 | in_COMMIT_EVENT_ADDRESS ->write(0xa00); |
---|
| 1114 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xb00); |
---|
| 1115 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xc00); |
---|
| 1116 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(1); |
---|
[83] | 1117 | |
---|
| 1118 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1119 | |
---|
| 1120 | do |
---|
| 1121 | { |
---|
[88] | 1122 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1123 | |
---|
| 1124 | SC_START(1); |
---|
| 1125 | } |
---|
[88] | 1126 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1127 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1128 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1129 | |
---|
| 1130 | LABEL("exception (wait end)"); |
---|
| 1131 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1132 | |
---|
| 1133 | SC_START(3); |
---|
| 1134 | |
---|
[88] | 1135 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1136 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1137 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1138 | |
---|
| 1139 | SC_START(1); |
---|
| 1140 | |
---|
| 1141 | LABEL("exception (wait event)"); |
---|
| 1142 | |
---|
| 1143 | bool find = false; |
---|
| 1144 | do |
---|
| 1145 | { |
---|
| 1146 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1147 | |
---|
| 1148 | SC_START(0); |
---|
| 1149 | |
---|
| 1150 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1151 | { |
---|
| 1152 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xa00); |
---|
| 1153 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xb00); |
---|
| 1154 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1155 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1156 | |
---|
| 1157 | find = true; |
---|
| 1158 | } |
---|
| 1159 | |
---|
| 1160 | SC_START(1); |
---|
| 1161 | } |
---|
| 1162 | while (not find); |
---|
| 1163 | |
---|
| 1164 | in_EVENT_ACK [context]->write(0); |
---|
| 1165 | |
---|
| 1166 | LABEL("exception (wait spr)"); |
---|
| 1167 | |
---|
| 1168 | find = false; |
---|
| 1169 | do |
---|
| 1170 | { |
---|
[88] | 1171 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1172 | |
---|
| 1173 | SC_START(0); |
---|
| 1174 | |
---|
[88] | 1175 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1176 | { |
---|
[88] | 1177 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xb00); |
---|
| 1178 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xc00); |
---|
| 1179 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),1); |
---|
| 1180 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 1181 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1182 | |
---|
| 1183 | find = true; |
---|
| 1184 | } |
---|
| 1185 | |
---|
| 1186 | SC_START(1); |
---|
| 1187 | } |
---|
| 1188 | while (not find); |
---|
| 1189 | |
---|
[88] | 1190 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1191 | } |
---|
| 1192 | |
---|
[101] | 1193 | if (test12) |
---|
[83] | 1194 | { |
---|
| 1195 | SC_START(3); |
---|
| 1196 | |
---|
| 1197 | LABEL("exception (begin)"); |
---|
[88] | 1198 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1199 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1200 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1201 | |
---|
[88] | 1202 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1203 | if (_param->_have_port_depth) |
---|
| 1204 | in_COMMIT_EVENT_DEPTH ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
| 1205 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1206 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(1); |
---|
| 1207 | in_COMMIT_EVENT_ADDRESS ->write(0xd00); |
---|
| 1208 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xe00); |
---|
| 1209 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xf00); |
---|
| 1210 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(1); |
---|
[83] | 1211 | |
---|
| 1212 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1213 | |
---|
| 1214 | do |
---|
| 1215 | { |
---|
[88] | 1216 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1217 | |
---|
| 1218 | SC_START(1); |
---|
| 1219 | } |
---|
[88] | 1220 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1221 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1222 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1223 | |
---|
| 1224 | LABEL("exception (wait end)"); |
---|
| 1225 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1226 | |
---|
| 1227 | SC_START(3); |
---|
| 1228 | |
---|
[88] | 1229 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1230 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1231 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1232 | |
---|
| 1233 | SC_START(1); |
---|
| 1234 | |
---|
| 1235 | LABEL("exception (wait event)"); |
---|
| 1236 | |
---|
| 1237 | bool find = false; |
---|
| 1238 | do |
---|
| 1239 | { |
---|
| 1240 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1241 | |
---|
| 1242 | SC_START(0); |
---|
| 1243 | |
---|
| 1244 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1245 | { |
---|
| 1246 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xd00); |
---|
| 1247 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xe00); |
---|
| 1248 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1249 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1250 | |
---|
| 1251 | find = true; |
---|
| 1252 | } |
---|
| 1253 | |
---|
| 1254 | SC_START(1); |
---|
| 1255 | } |
---|
| 1256 | while (not find); |
---|
| 1257 | |
---|
| 1258 | in_EVENT_ACK [context]->write(0); |
---|
| 1259 | |
---|
| 1260 | LABEL("exception (wait spr)"); |
---|
| 1261 | |
---|
| 1262 | find = false; |
---|
| 1263 | do |
---|
| 1264 | { |
---|
[88] | 1265 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1266 | |
---|
| 1267 | SC_START(0); |
---|
| 1268 | |
---|
[88] | 1269 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1270 | { |
---|
[88] | 1271 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xe00); |
---|
| 1272 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xf00); |
---|
| 1273 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),1); |
---|
| 1274 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 1275 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1276 | |
---|
| 1277 | find = true; |
---|
| 1278 | } |
---|
| 1279 | |
---|
| 1280 | SC_START(1); |
---|
| 1281 | } |
---|
| 1282 | while (not find); |
---|
| 1283 | |
---|
[88] | 1284 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1285 | } |
---|
| 1286 | |
---|
| 1287 | |
---|
| 1288 | SC_START(1); |
---|
| 1289 | } |
---|
| 1290 | |
---|
| 1291 | |
---|
| 1292 | /******************************************************** |
---|
| 1293 | * Simulation - End |
---|
| 1294 | ********************************************************/ |
---|
| 1295 | |
---|
| 1296 | TEST_OK ("End of Simulation"); |
---|
| 1297 | delete _time; |
---|
| 1298 | |
---|
| 1299 | msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); |
---|
| 1300 | |
---|
| 1301 | delete in_CLOCK; |
---|
| 1302 | delete in_NRESET; |
---|
| 1303 | |
---|
[88] | 1304 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_VAL ,_param->_nb_context); |
---|
| 1305 | DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ACK ,_param->_nb_context); |
---|
| 1306 | //DELETE1_SC_SIGNAL( in_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context); |
---|
[98] | 1307 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_DEPTH ,_param->_nb_context); |
---|
[88] | 1308 | //DELETE1_SC_SIGNAL( in_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context); |
---|
| 1309 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context); |
---|
[95] | 1310 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); |
---|
[88] | 1311 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); |
---|
[83] | 1312 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_VAL ,_param->_nb_decod_unit); |
---|
| 1313 | DELETE1_SC_SIGNAL(out_DECOD_EVENT_ACK ,_param->_nb_decod_unit); |
---|
| 1314 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_CONTEXT_ID ,_param->_nb_decod_unit); |
---|
| 1315 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_DEPTH ,_param->_nb_decod_unit); |
---|
| 1316 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_TYPE ,_param->_nb_decod_unit); |
---|
| 1317 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT ,_param->_nb_decod_unit); |
---|
| 1318 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS ,_param->_nb_decod_unit); |
---|
| 1319 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR ,_param->_nb_decod_unit); |
---|
[88] | 1320 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_VAL ); |
---|
| 1321 | DELETE_SC_SIGNAL (out_COMMIT_EVENT_ACK ); |
---|
| 1322 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_CONTEXT_ID ); |
---|
| 1323 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_DEPTH ); |
---|
| 1324 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_TYPE ); |
---|
| 1325 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_IS_DELAY_SLOT ); |
---|
| 1326 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS ); |
---|
| 1327 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EPCR ); |
---|
| 1328 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR_VAL ); |
---|
| 1329 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR ); |
---|
[83] | 1330 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); |
---|
| 1331 | DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete); |
---|
| 1332 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); |
---|
| 1333 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); |
---|
| 1334 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); |
---|
| 1335 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); |
---|
| 1336 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); |
---|
| 1337 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); |
---|
[88] | 1338 | DELETE1_SC_SIGNAL( in_NB_INST_DECOD_ALL ,_param->_nb_context ); |
---|
| 1339 | DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_ALL ,_param->_nb_context ); |
---|
| 1340 | DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_MEM ,_param->_nb_context ); |
---|
[83] | 1341 | DELETE1_SC_SIGNAL(out_EVENT_VAL ,_param->_nb_context ); |
---|
| 1342 | DELETE1_SC_SIGNAL( in_EVENT_ACK ,_param->_nb_context ); |
---|
| 1343 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS ,_param->_nb_context ); |
---|
| 1344 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT ,_param->_nb_context ); |
---|
| 1345 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL ,_param->_nb_context ); |
---|
| 1346 | DELETE1_SC_SIGNAL(out_EVENT_IS_DS_TAKE ,_param->_nb_context ); |
---|
[97] | 1347 | DELETE1_SC_SIGNAL(out_EVENT_TYPE ,_param->_nb_context ); |
---|
| 1348 | DELETE1_SC_SIGNAL(out_EVENT_DEPTH ,_param->_nb_context ); |
---|
[88] | 1349 | DELETE1_SC_SIGNAL(out_SPR_EVENT_VAL ,_param->_nb_context ); |
---|
| 1350 | DELETE1_SC_SIGNAL( in_SPR_EVENT_ACK ,_param->_nb_context ); |
---|
| 1351 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EPCR ,_param->_nb_context ); |
---|
| 1352 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EEAR ,_param->_nb_context ); |
---|
| 1353 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EEAR_WEN ,_param->_nb_context ); |
---|
| 1354 | DELETE1_SC_SIGNAL(out_SPR_EVENT_SR_DSX ,_param->_nb_context ); |
---|
| 1355 | DELETE1_SC_SIGNAL(out_SPR_EVENT_SR_TO_ESR ,_param->_nb_context ); |
---|
[83] | 1356 | DELETE1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE ,_param->_nb_context ); |
---|
[88] | 1357 | DELETE1_SC_SIGNAL( in_DEPTH_MIN ,_param->_nb_context ); |
---|
| 1358 | DELETE1_SC_SIGNAL( in_SPR_SR_IEE ,_param->_nb_context ); |
---|
| 1359 | DELETE1_SC_SIGNAL( in_SPR_SR_EPH ,_param->_nb_context ); |
---|
| 1360 | |
---|
| 1361 | DELETE1_SC_SIGNAL( in_INTERRUPT_ENABLE ,_param->_nb_context ); |
---|
[83] | 1362 | } |
---|
| 1363 | #endif |
---|
| 1364 | |
---|
| 1365 | delete _Context_State; |
---|
| 1366 | #ifdef STATISTICS |
---|
| 1367 | delete _parameters_statistics; |
---|
| 1368 | #endif |
---|
| 1369 | } |
---|