[83] | 1 | /* |
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| 2 | * $Id: test.cpp 95 2008-12-16 16:24:26Z rosiere $ |
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| 3 | * |
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| 4 | * [ Description ] |
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| 5 | * |
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| 6 | * Test |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/include/test.h" |
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| 10 | #include "Behavioural/include/Allocation.h" |
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| 11 | |
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| 12 | void test (string name, |
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| 13 | morpheo::behavioural::core::multi_front_end::front_end::context_state::Parameters * _param) |
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| 14 | { |
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| 15 | msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); |
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| 16 | |
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| 17 | #ifdef STATISTICS |
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| 18 | morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); |
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| 19 | #endif |
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| 20 | |
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| 21 | Tusage_t _usage = USE_ALL; |
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| 22 | |
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| 23 | // _usage = usage_unset(_usage,USE_SYSTEMC ); |
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| 24 | // _usage = usage_unset(_usage,USE_VHDL ); |
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| 25 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); |
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| 26 | // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); |
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| 27 | // _usage = usage_unset(_usage,USE_POSITION ); |
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| 28 | // _usage = usage_unset(_usage,USE_STATISTICS ); |
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| 29 | // _usage = usage_unset(_usage,USE_INFORMATION ); |
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| 30 | |
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| 31 | Context_State * _Context_State = new Context_State |
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| 32 | (name.c_str(), |
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| 33 | #ifdef STATISTICS |
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| 34 | _parameters_statistics, |
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| 35 | #endif |
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| 36 | _param, |
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| 37 | _usage); |
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| 38 | |
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| 39 | #ifdef SYSTEMC |
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| 40 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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| 41 | { |
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| 42 | /********************************************************************* |
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| 43 | * Déclarations des signaux |
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| 44 | *********************************************************************/ |
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| 45 | string rename; |
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| 46 | |
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| 47 | sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); |
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| 48 | sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); |
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| 49 | |
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[88] | 50 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_VAL ," in_BRANCH_EVENT_VAL ",Tcontrol_t ,_param->_nb_context); |
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| 51 | ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ACK ,"out_BRANCH_EVENT_ACK ",Tcontrol_t ,_param->_nb_context); |
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| 52 | //ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_CONTEXT_ID ," in_BRANCH_EVENT_CONTEXT_ID ",Tcontext_t ,_param->_nb_context); |
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| 53 | //ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_DEPTH ," in_BRANCH_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context); |
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| 54 | //ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_MISS_PREDICTION ," in_BRANCH_EVENT_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_context); |
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| 55 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_SRC ," in_BRANCH_EVENT_ADDRESS_SRC ",Taddress_t ,_param->_nb_context); |
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[95] | 56 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ," in_BRANCH_EVENT_ADDRESS_DEST_VAL ",Tcontrol_t ,_param->_nb_context); |
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[88] | 57 | ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ," in_BRANCH_EVENT_ADDRESS_DEST ",Taddress_t ,_param->_nb_context); |
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| 58 | |
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[83] | 59 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_VAL ," in_DECOD_EVENT_VAL ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 60 | ALLOC1_SC_SIGNAL(out_DECOD_EVENT_ACK ,"out_DECOD_EVENT_ACK ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 61 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_CONTEXT_ID ," in_DECOD_EVENT_CONTEXT_ID ",Tcontext_t ,_param->_nb_decod_unit); |
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| 62 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_DEPTH ," in_DECOD_EVENT_DEPTH ",Tdepth_t ,_param->_nb_decod_unit); |
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| 63 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_TYPE ," in_DECOD_EVENT_TYPE ",Tevent_type_t,_param->_nb_decod_unit); |
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| 64 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT ," in_DECOD_EVENT_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_decod_unit); |
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| 65 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS ," in_DECOD_EVENT_ADDRESS ",Taddress_t ,_param->_nb_decod_unit); |
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| 66 | ALLOC1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR ," in_DECOD_EVENT_ADDRESS_EPCR ",Taddress_t ,_param->_nb_decod_unit); |
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| 67 | |
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[88] | 68 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_VAL ," in_COMMIT_EVENT_VAL ",Tcontrol_t ); |
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| 69 | ALLOC_SC_SIGNAL (out_COMMIT_EVENT_ACK ,"out_COMMIT_EVENT_ACK ",Tcontrol_t ); |
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| 70 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_CONTEXT_ID ," in_COMMIT_EVENT_CONTEXT_ID ",Tcontext_t ); |
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| 71 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_DEPTH ," in_COMMIT_EVENT_DEPTH ",Tdepth_t ); |
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| 72 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_TYPE ," in_COMMIT_EVENT_TYPE ",Tevent_type_t); |
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| 73 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_IS_DELAY_SLOT ," in_COMMIT_EVENT_IS_DELAY_SLOT ",Tcontrol_t ); |
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| 74 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS ," in_COMMIT_EVENT_ADDRESS ",Taddress_t ); |
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| 75 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EPCR ," in_COMMIT_EVENT_ADDRESS_EPCR ",Taddress_t ); |
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| 76 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR_VAL ," in_COMMIT_EVENT_ADDRESS_EEAR_VAL ",Tcontrol_t ); |
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| 77 | ALLOC_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR ," in_COMMIT_EVENT_ADDRESS_EEAR ",Taddress_t ); |
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[83] | 78 | |
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| 79 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ," in_BRANCH_COMPLETE_VAL ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 80 | ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,"out_BRANCH_COMPLETE_ACK ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 81 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ," in_BRANCH_COMPLETE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_branch_complete); |
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| 82 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ," in_BRANCH_COMPLETE_DEPTH ",Tdepth_t ,_param->_nb_inst_branch_complete); |
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| 83 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION," in_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 84 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ," in_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); |
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| 85 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ," in_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); |
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| 86 | ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ," in_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); |
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| 87 | |
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| 88 | |
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[88] | 89 | ALLOC1_SC_SIGNAL( in_NB_INST_DECOD_ALL ," in_NB_INST_DECOD_ALL ",Tcounter_t ,_param->_nb_context ); |
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| 90 | ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_ALL ," in_NB_INST_COMMIT_ALL ",Tcounter_t ,_param->_nb_context ); |
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| 91 | ALLOC1_SC_SIGNAL( in_NB_INST_COMMIT_MEM ," in_NB_INST_COMMIT_MEM ",Tcounter_t ,_param->_nb_context ); |
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[83] | 92 | |
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| 93 | ALLOC1_SC_SIGNAL(out_EVENT_VAL ,"out_EVENT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 94 | ALLOC1_SC_SIGNAL( in_EVENT_ACK ," in_EVENT_ACK ",Tcontrol_t ,_param->_nb_context ); |
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| 95 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS ,"out_EVENT_ADDRESS ",Taddress_t ,_param->_nb_context ); |
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| 96 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT ,"out_EVENT_ADDRESS_NEXT ",Taddress_t ,_param->_nb_context ); |
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| 97 | ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL ,"out_EVENT_ADDRESS_NEXT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 98 | ALLOC1_SC_SIGNAL(out_EVENT_IS_DS_TAKE ,"out_EVENT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context ); |
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| 99 | |
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[88] | 100 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_VAL ,"out_SPR_EVENT_VAL ",Tcontrol_t ,_param->_nb_context ); |
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| 101 | ALLOC1_SC_SIGNAL( in_SPR_EVENT_ACK ," in_SPR_EVENT_ACK ",Tcontrol_t ,_param->_nb_context ); |
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| 102 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EPCR ,"out_SPR_EVENT_EPCR ",Taddress_t ,_param->_nb_context ); |
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| 103 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EEAR ,"out_SPR_EVENT_EEAR ",Taddress_t ,_param->_nb_context ); |
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| 104 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_EEAR_WEN ,"out_SPR_EVENT_EEAR_WEN ",Tcontrol_t ,_param->_nb_context ); |
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| 105 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_SR_DSX ,"out_SPR_EVENT_SR_DSX ",Tcontrol_t ,_param->_nb_context ); |
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| 106 | ALLOC1_SC_SIGNAL(out_SPR_EVENT_SR_TO_ESR ,"out_SPR_EVENT_SR_TO_ESR ",Tcontrol_t ,_param->_nb_context ); |
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[83] | 107 | |
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| 108 | ALLOC1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE ,"out_CONTEXT_DECOD_ENABLE ",Tcontrol_t ,_param->_nb_context ); |
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| 109 | |
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[88] | 110 | ALLOC1_SC_SIGNAL( in_DEPTH_MIN ," in_DEPTH_MIN ",Tdepth_t ,_param->_nb_context ); |
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[83] | 111 | |
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[88] | 112 | ALLOC1_SC_SIGNAL( in_SPR_SR_IEE ," in_SPR_SR_IEE ",Tcontrol_t ,_param->_nb_context ); |
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| 113 | ALLOC1_SC_SIGNAL( in_SPR_SR_EPH ," in_SPR_SR_EPH ",Tcontrol_t ,_param->_nb_context ); |
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| 114 | |
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| 115 | ALLOC1_SC_SIGNAL( in_INTERRUPT_ENABLE ," in_INTERRUPT_ENABLE ",Tcontrol_t ,_param->_nb_context ); |
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| 116 | |
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[83] | 117 | /******************************************************** |
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| 118 | * Instanciation |
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| 119 | ********************************************************/ |
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| 120 | |
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| 121 | msg(_("<%s> : Instanciation of _Context_State.\n"),name.c_str()); |
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| 122 | |
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| 123 | (*(_Context_State->in_CLOCK)) (*(in_CLOCK)); |
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| 124 | (*(_Context_State->in_NRESET)) (*(in_NRESET)); |
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| 125 | |
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[88] | 126 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_VAL ,_param->_nb_context); |
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| 127 | INSTANCE1_SC_SIGNAL(_Context_State,out_BRANCH_EVENT_ACK ,_param->_nb_context); |
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| 128 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context); |
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| 129 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_DEPTH ,_param->_nb_context); |
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| 130 | //INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context); |
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| 131 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context); |
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[95] | 132 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); |
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[88] | 133 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); |
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[83] | 134 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_VAL ,_param->_nb_decod_unit); |
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| 135 | INSTANCE1_SC_SIGNAL(_Context_State,out_DECOD_EVENT_ACK ,_param->_nb_decod_unit); |
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| 136 | if (_param->_have_port_context_id) |
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| 137 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_CONTEXT_ID ,_param->_nb_decod_unit); |
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[88] | 138 | if (_param->_have_port_depth) |
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[83] | 139 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_DEPTH ,_param->_nb_decod_unit); |
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| 140 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_TYPE ,_param->_nb_decod_unit); |
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| 141 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_IS_DELAY_SLOT ,_param->_nb_decod_unit); |
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| 142 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS ,_param->_nb_decod_unit); |
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| 143 | INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_ADDRESS_EPCR ,_param->_nb_decod_unit); |
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| 144 | |
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[88] | 145 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_VAL ); |
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| 146 | INSTANCE_SC_SIGNAL (_Context_State,out_COMMIT_EVENT_ACK ); |
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[83] | 147 | if (_param->_have_port_context_id) |
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[88] | 148 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_CONTEXT_ID ); |
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| 149 | if (_param->_have_port_depth) |
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| 150 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_DEPTH ); |
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| 151 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_TYPE ); |
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| 152 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_IS_DELAY_SLOT ); |
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| 153 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS ); |
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| 154 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EPCR ); |
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| 155 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR_VAL ); |
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| 156 | INSTANCE_SC_SIGNAL (_Context_State, in_COMMIT_EVENT_ADDRESS_EEAR ); |
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[83] | 157 | |
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| 158 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); |
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| 159 | INSTANCE1_SC_SIGNAL(_Context_State,out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete); |
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| 160 | if (_param->_have_port_context_id) |
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| 161 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); |
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[88] | 162 | if (_param->_have_port_depth) |
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[83] | 163 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); |
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| 164 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); |
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| 165 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); |
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| 166 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); |
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| 167 | INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); |
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| 168 | |
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[88] | 169 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_DECOD_ALL ,_param->_nb_context ); |
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| 170 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_ALL ,_param->_nb_context ); |
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| 171 | INSTANCE1_SC_SIGNAL(_Context_State, in_NB_INST_COMMIT_MEM ,_param->_nb_context ); |
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[83] | 172 | |
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| 173 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_VAL ,_param->_nb_context ); |
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| 174 | INSTANCE1_SC_SIGNAL(_Context_State, in_EVENT_ACK ,_param->_nb_context ); |
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| 175 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS ,_param->_nb_context ); |
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| 176 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS_NEXT ,_param->_nb_context ); |
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| 177 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_ADDRESS_NEXT_VAL ,_param->_nb_context ); |
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| 178 | INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_IS_DS_TAKE ,_param->_nb_context ); |
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| 179 | |
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[88] | 180 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_VAL ,_param->_nb_context ); |
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| 181 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_EVENT_ACK ,_param->_nb_context ); |
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| 182 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EPCR ,_param->_nb_context ); |
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| 183 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EEAR ,_param->_nb_context ); |
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| 184 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_EEAR_WEN ,_param->_nb_context ); |
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| 185 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_SR_DSX ,_param->_nb_context ); |
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| 186 | INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_SR_TO_ESR ,_param->_nb_context ); |
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[83] | 187 | |
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| 188 | INSTANCE1_SC_SIGNAL(_Context_State,out_CONTEXT_DECOD_ENABLE ,_param->_nb_context ); |
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| 189 | |
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| 190 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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[88] | 191 | if (_param->_have_port_depth) |
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| 192 | INSTANCE_SC_SIGNAL(_Context_State, in_DEPTH_MIN [i]); |
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[83] | 193 | |
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[88] | 194 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_SR_IEE ,_param->_nb_context ); |
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| 195 | INSTANCE1_SC_SIGNAL(_Context_State, in_SPR_SR_EPH ,_param->_nb_context ); |
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| 196 | |
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| 197 | INSTANCE1_SC_SIGNAL(_Context_State, in_INTERRUPT_ENABLE ,_param->_nb_context ); |
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| 198 | |
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[83] | 199 | msg(_("<%s> : Start Simulation ............\n"),name.c_str()); |
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| 200 | |
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| 201 | Time * _time = new Time(); |
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| 202 | |
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| 203 | /******************************************************** |
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| 204 | * Simulation - Begin |
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| 205 | ********************************************************/ |
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| 206 | |
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| 207 | // Initialisation |
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| 208 | |
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| 209 | const uint32_t seed = 0; |
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| 210 | //const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
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| 211 | |
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| 212 | srand(seed); |
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| 213 | |
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| 214 | const int32_t percent_transaction_decod_event = 75; |
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| 215 | const int32_t percent_transaction_commit_event = 75; |
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| 216 | const int32_t percent_transaction_branch_complete = 75; |
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| 217 | const int32_t percent_transaction_event = 75; |
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| 218 | const int32_t percent_transaction_spr = 75; |
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| 219 | |
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| 220 | SC_START(0); |
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| 221 | LABEL("Initialisation"); |
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| 222 | |
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| 223 | LABEL("Reset"); |
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| 224 | in_NRESET->write(0); |
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| 225 | SC_START(5); |
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| 226 | in_NRESET->write(1); |
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| 227 | |
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| 228 | LABEL("Loop of Test"); |
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| 229 | |
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| 230 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
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| 231 | { |
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| 232 | LABEL("Iteration %d",iteration); |
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| 233 | for (uint32_t i=0; i<_param->_nb_decod_unit; i++) |
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| 234 | in_DECOD_EVENT_VAL [i]->write(0); |
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[88] | 235 | in_COMMIT_EVENT_VAL ->write(0); |
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[83] | 236 | for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
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| 237 | in_BRANCH_COMPLETE_VAL [i]->write(0); |
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| 238 | |
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| 239 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 240 | { |
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[88] | 241 | in_BRANCH_EVENT_VAL [i]->write(0); |
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| 242 | in_EVENT_ACK [i]->write(0); |
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| 243 | in_SPR_EVENT_ACK [i]->write(0); |
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| 244 | in_SPR_SR_IEE [i]->write(0); |
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| 245 | in_SPR_SR_EPH [i]->write(0); |
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| 246 | in_INTERRUPT_ENABLE [i]->write(0); |
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[83] | 247 | |
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| 248 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[i]->read(), 1); |
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| 249 | } |
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| 250 | |
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| 251 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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[88] | 252 | if (_param->_have_port_depth) |
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| 253 | in_DEPTH_MIN [i]->write((_param->_array_size_depth[i]==0)?0:(i%_param->_array_size_depth[i])); |
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[83] | 254 | |
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| 255 | uint32_t context = rand()%_param->_nb_context; |
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| 256 | |
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| 257 | if (1) |
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| 258 | { |
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| 259 | SC_START(3); |
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| 260 | |
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| 261 | LABEL("msync (begin)"); |
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[88] | 262 | in_NB_INST_DECOD_ALL [context]->write(1); |
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| 263 | in_NB_INST_COMMIT_ALL [context]->write(1); |
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| 264 | in_NB_INST_COMMIT_MEM [context]->write(1); |
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[83] | 265 | |
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| 266 | uint32_t port = rand()%_param->_nb_decod_unit; |
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| 267 | |
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| 268 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
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| 269 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
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| 270 | in_DECOD_EVENT_ADDRESS [port]->write(0x100); |
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| 271 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbeef); |
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[88] | 272 | if (_param->_have_port_depth) |
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| 273 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
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[83] | 274 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_MSYNC); |
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| 275 | |
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| 276 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
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| 277 | |
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| 278 | do |
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| 279 | { |
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| 280 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
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| 281 | |
---|
| 282 | SC_START(1); |
---|
| 283 | } |
---|
| 284 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 285 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 286 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 287 | |
---|
| 288 | LABEL("msync (wait end)"); |
---|
| 289 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 290 | |
---|
| 291 | SC_START(3); |
---|
| 292 | |
---|
[88] | 293 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 294 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 295 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 296 | |
---|
| 297 | SC_START(1); |
---|
| 298 | |
---|
| 299 | LABEL("msync (send decod)"); |
---|
| 300 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 301 | |
---|
| 302 | SC_START(3); |
---|
| 303 | |
---|
[88] | 304 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
[83] | 305 | SC_START(1); |
---|
| 306 | |
---|
| 307 | LABEL("msync (wait end)"); |
---|
| 308 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
[88] | 309 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 310 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 311 | |
---|
| 312 | SC_START(3); |
---|
| 313 | |
---|
[88] | 314 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 315 | SC_START(1); |
---|
| 316 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 317 | } |
---|
| 318 | |
---|
| 319 | if (1) |
---|
| 320 | { |
---|
| 321 | SC_START(3); |
---|
| 322 | |
---|
| 323 | LABEL("psync (begin)"); |
---|
[88] | 324 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 325 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 326 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 327 | |
---|
| 328 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
| 329 | |
---|
| 330 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
| 331 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
| 332 | in_DECOD_EVENT_ADDRESS [port]->write(0x200); |
---|
| 333 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbebe); |
---|
[88] | 334 | if (_param->_have_port_depth) |
---|
| 335 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
[83] | 336 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_PSYNC); |
---|
| 337 | |
---|
| 338 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 339 | |
---|
| 340 | do |
---|
| 341 | { |
---|
| 342 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 343 | |
---|
| 344 | SC_START(1); |
---|
| 345 | } |
---|
| 346 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 347 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 348 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 349 | |
---|
| 350 | LABEL("psync (wait end)"); |
---|
| 351 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 352 | |
---|
| 353 | SC_START(3); |
---|
| 354 | |
---|
[88] | 355 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 356 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 357 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 358 | |
---|
| 359 | SC_START(1); |
---|
| 360 | |
---|
| 361 | bool find = false; |
---|
| 362 | do |
---|
| 363 | { |
---|
| 364 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 365 | |
---|
| 366 | SC_START(0); |
---|
| 367 | |
---|
| 368 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 369 | { |
---|
| 370 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x201); |
---|
| 371 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xdeadbebe); |
---|
| 372 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 373 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 374 | |
---|
| 375 | find = true; |
---|
| 376 | } |
---|
| 377 | |
---|
| 378 | SC_START(1); |
---|
| 379 | } |
---|
| 380 | while (not find); |
---|
| 381 | |
---|
| 382 | in_EVENT_ACK [context]->write(0); |
---|
| 383 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 384 | } |
---|
| 385 | |
---|
| 386 | if (1) |
---|
| 387 | { |
---|
| 388 | SC_START(3); |
---|
| 389 | |
---|
| 390 | LABEL("csync (begin)"); |
---|
[88] | 391 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 392 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 393 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 394 | |
---|
| 395 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
| 396 | |
---|
| 397 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
| 398 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
| 399 | in_DECOD_EVENT_ADDRESS [port]->write(0x200); |
---|
| 400 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbebe); |
---|
[88] | 401 | if (_param->_have_port_depth) |
---|
| 402 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
[83] | 403 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_CSYNC); |
---|
| 404 | |
---|
| 405 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 406 | |
---|
| 407 | do |
---|
| 408 | { |
---|
| 409 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 410 | |
---|
| 411 | SC_START(1); |
---|
| 412 | } |
---|
| 413 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 414 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 415 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 416 | |
---|
| 417 | LABEL("csync (wait end)"); |
---|
| 418 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 419 | |
---|
| 420 | SC_START(3); |
---|
| 421 | |
---|
[88] | 422 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 423 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 424 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 425 | |
---|
| 426 | SC_START(1); |
---|
| 427 | |
---|
| 428 | bool find = false; |
---|
| 429 | do |
---|
| 430 | { |
---|
| 431 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 432 | |
---|
| 433 | SC_START(0); |
---|
| 434 | |
---|
| 435 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 436 | { |
---|
| 437 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x201); |
---|
| 438 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xdeadbebe); |
---|
| 439 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 440 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 441 | |
---|
| 442 | find = true; |
---|
| 443 | } |
---|
| 444 | |
---|
| 445 | SC_START(1); |
---|
| 446 | } |
---|
| 447 | while (not find); |
---|
| 448 | in_EVENT_ACK [context]->write(0); |
---|
| 449 | } |
---|
| 450 | |
---|
| 451 | if (1) |
---|
| 452 | { |
---|
| 453 | SC_START(3); |
---|
| 454 | |
---|
| 455 | LABEL("spr (begin)"); |
---|
[88] | 456 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 457 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 458 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 459 | |
---|
| 460 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
| 461 | |
---|
| 462 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
| 463 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
| 464 | in_DECOD_EVENT_ADDRESS [port]->write(0x100); |
---|
| 465 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbeef); |
---|
[88] | 466 | if (_param->_have_port_depth) |
---|
| 467 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
[83] | 468 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_SPR_ACCESS); |
---|
| 469 | |
---|
| 470 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 471 | |
---|
| 472 | do |
---|
| 473 | { |
---|
| 474 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 475 | |
---|
| 476 | SC_START(1); |
---|
| 477 | } |
---|
| 478 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 479 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 480 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 481 | |
---|
| 482 | LABEL("spr (wait end)"); |
---|
| 483 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 484 | |
---|
| 485 | SC_START(3); |
---|
| 486 | |
---|
[88] | 487 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 488 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 489 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 490 | |
---|
| 491 | SC_START(1); |
---|
| 492 | |
---|
| 493 | LABEL("spr (send decod)"); |
---|
| 494 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 495 | |
---|
| 496 | SC_START(3); |
---|
| 497 | |
---|
[88] | 498 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
[83] | 499 | SC_START(1); |
---|
| 500 | |
---|
| 501 | LABEL("spr (wait end)"); |
---|
| 502 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
[88] | 503 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 504 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
[83] | 505 | |
---|
| 506 | SC_START(3); |
---|
| 507 | |
---|
[88] | 508 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
[83] | 509 | SC_START(1); |
---|
| 510 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 511 | } |
---|
| 512 | |
---|
| 513 | if (1) |
---|
| 514 | { |
---|
| 515 | SC_START(3); |
---|
| 516 | |
---|
| 517 | LABEL("miss (begin)"); |
---|
[88] | 518 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 519 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 520 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 521 | |
---|
| 522 | uint32_t port = rand()%_param->_nb_inst_branch_complete; |
---|
| 523 | |
---|
| 524 | in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); |
---|
[88] | 525 | if (_param->_have_port_depth) |
---|
| 526 | in_BRANCH_COMPLETE_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
[83] | 527 | in_BRANCH_COMPLETE_ADDRESS_SRC [port]->write(0x400); |
---|
| 528 | in_BRANCH_COMPLETE_ADDRESS_DEST [port]->write(0x500); |
---|
| 529 | in_BRANCH_COMPLETE_MISS_PREDICTION [port]->write(1); |
---|
| 530 | in_BRANCH_COMPLETE_TAKE [port]->write(0); |
---|
| 531 | |
---|
| 532 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 533 | |
---|
| 534 | do |
---|
| 535 | { |
---|
| 536 | in_BRANCH_COMPLETE_VAL [port]->write(rand()%percent_transaction_branch_complete); |
---|
| 537 | |
---|
| 538 | SC_START(1); |
---|
| 539 | } |
---|
| 540 | while (not ( in_BRANCH_COMPLETE_VAL [port]->read() and |
---|
| 541 | out_BRANCH_COMPLETE_ACK [port]->read())); |
---|
| 542 | in_BRANCH_COMPLETE_VAL [port]->write(0); |
---|
| 543 | |
---|
| 544 | LABEL("miss (wait end)"); |
---|
| 545 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 546 | |
---|
| 547 | SC_START(3); |
---|
| 548 | |
---|
[88] | 549 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 550 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 551 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 552 | |
---|
| 553 | SC_START(1); |
---|
| 554 | |
---|
| 555 | LABEL("miss (wait event)"); |
---|
| 556 | |
---|
| 557 | |
---|
| 558 | bool find = false; |
---|
| 559 | do |
---|
| 560 | { |
---|
| 561 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 562 | |
---|
| 563 | SC_START(0); |
---|
| 564 | |
---|
| 565 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 566 | { |
---|
| 567 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x401); |
---|
| 568 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x500); |
---|
| 569 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 570 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 571 | |
---|
| 572 | find = true; |
---|
| 573 | } |
---|
| 574 | |
---|
| 575 | SC_START(1); |
---|
| 576 | } |
---|
| 577 | while (not find); |
---|
| 578 | |
---|
| 579 | in_EVENT_ACK [context]->write(0); |
---|
| 580 | |
---|
| 581 | } |
---|
| 582 | |
---|
| 583 | if (1) |
---|
| 584 | { |
---|
| 585 | SC_START(3); |
---|
| 586 | |
---|
| 587 | LABEL("miss (begin)"); |
---|
[88] | 588 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 589 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 590 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 591 | |
---|
| 592 | uint32_t port = rand()%_param->_nb_inst_branch_complete; |
---|
| 593 | |
---|
| 594 | in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); |
---|
[88] | 595 | if (_param->_have_port_depth) |
---|
| 596 | in_BRANCH_COMPLETE_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context])); |
---|
[83] | 597 | in_BRANCH_COMPLETE_ADDRESS_SRC [port]->write(0x600); |
---|
| 598 | in_BRANCH_COMPLETE_ADDRESS_DEST [port]->write(0x700); |
---|
| 599 | in_BRANCH_COMPLETE_MISS_PREDICTION [port]->write(1); |
---|
| 600 | in_BRANCH_COMPLETE_TAKE [port]->write(1); |
---|
| 601 | |
---|
| 602 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 603 | |
---|
| 604 | do |
---|
| 605 | { |
---|
| 606 | in_BRANCH_COMPLETE_VAL [port]->write(rand()%percent_transaction_branch_complete); |
---|
| 607 | |
---|
| 608 | SC_START(1); |
---|
| 609 | } |
---|
| 610 | while (not ( in_BRANCH_COMPLETE_VAL [port]->read() and |
---|
| 611 | out_BRANCH_COMPLETE_ACK [port]->read())); |
---|
| 612 | in_BRANCH_COMPLETE_VAL [port]->write(0); |
---|
| 613 | |
---|
| 614 | LABEL("miss (wait end)"); |
---|
| 615 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 616 | |
---|
| 617 | SC_START(3); |
---|
| 618 | |
---|
[88] | 619 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 620 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 621 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 622 | |
---|
| 623 | SC_START(1); |
---|
| 624 | |
---|
| 625 | LABEL("miss (wait event)"); |
---|
| 626 | |
---|
| 627 | bool find = false; |
---|
| 628 | do |
---|
| 629 | { |
---|
| 630 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 631 | |
---|
| 632 | SC_START(0); |
---|
| 633 | |
---|
| 634 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 635 | { |
---|
| 636 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x601); |
---|
| 637 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x700); |
---|
| 638 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),1); |
---|
| 639 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),1); |
---|
| 640 | |
---|
| 641 | find = true; |
---|
| 642 | } |
---|
| 643 | |
---|
| 644 | SC_START(1); |
---|
| 645 | } |
---|
| 646 | while (not find); |
---|
| 647 | |
---|
| 648 | in_EVENT_ACK [context]->write(0); |
---|
| 649 | } |
---|
| 650 | |
---|
| 651 | if (1) |
---|
| 652 | { |
---|
| 653 | SC_START(3); |
---|
| 654 | |
---|
| 655 | LABEL("exception (begin)"); |
---|
[88] | 656 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 657 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 658 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 659 | |
---|
[88] | 660 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
[83] | 661 | |
---|
| 662 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
[88] | 663 | if (_param->_have_port_depth) |
---|
| 664 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
[83] | 665 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_EXCEPTION); |
---|
| 666 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); |
---|
| 667 | in_DECOD_EVENT_ADDRESS [port]->write(0x800); |
---|
| 668 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0x900); |
---|
| 669 | |
---|
| 670 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 671 | |
---|
| 672 | do |
---|
| 673 | { |
---|
| 674 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 675 | |
---|
| 676 | SC_START(1); |
---|
| 677 | } |
---|
| 678 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 679 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 680 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 681 | |
---|
| 682 | LABEL("exception (wait end)"); |
---|
| 683 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 684 | |
---|
| 685 | SC_START(3); |
---|
| 686 | |
---|
[88] | 687 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 688 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 689 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 690 | |
---|
| 691 | SC_START(1); |
---|
| 692 | |
---|
| 693 | LABEL("exception (wait event)"); |
---|
| 694 | |
---|
| 695 | bool find = false; |
---|
| 696 | do |
---|
| 697 | { |
---|
| 698 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 699 | |
---|
| 700 | SC_START(0); |
---|
| 701 | |
---|
| 702 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 703 | { |
---|
| 704 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x800); |
---|
| 705 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x900); |
---|
| 706 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 707 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 708 | |
---|
| 709 | find = true; |
---|
| 710 | } |
---|
| 711 | |
---|
| 712 | SC_START(1); |
---|
| 713 | } |
---|
| 714 | while (not find); |
---|
| 715 | |
---|
| 716 | in_EVENT_ACK [context]->write(0); |
---|
| 717 | |
---|
| 718 | LABEL("exception (wait spr)"); |
---|
| 719 | |
---|
| 720 | find = false; |
---|
| 721 | do |
---|
| 722 | { |
---|
[88] | 723 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 724 | |
---|
| 725 | SC_START(0); |
---|
| 726 | |
---|
[88] | 727 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 728 | { |
---|
[88] | 729 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0x900); |
---|
| 730 | //TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),); |
---|
| 731 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 732 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 733 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 734 | |
---|
| 735 | find = true; |
---|
| 736 | } |
---|
| 737 | |
---|
| 738 | SC_START(1); |
---|
| 739 | } |
---|
| 740 | while (not find); |
---|
| 741 | |
---|
[88] | 742 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 743 | } |
---|
| 744 | |
---|
| 745 | if (1) |
---|
| 746 | { |
---|
| 747 | SC_START(3); |
---|
| 748 | |
---|
| 749 | LABEL("exception (begin)"); |
---|
[88] | 750 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 751 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 752 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 753 | |
---|
[88] | 754 | uint32_t port = rand()%_param->_nb_decod_unit; |
---|
[83] | 755 | |
---|
| 756 | in_DECOD_EVENT_CONTEXT_ID [port]->write(context); |
---|
[88] | 757 | if (_param->_have_port_depth) |
---|
| 758 | in_DECOD_EVENT_DEPTH [port]->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
[83] | 759 | in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_EXCEPTION); |
---|
| 760 | in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(1); |
---|
| 761 | in_DECOD_EVENT_ADDRESS [port]->write(0x800); |
---|
| 762 | in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0x900); |
---|
| 763 | |
---|
| 764 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 765 | |
---|
| 766 | do |
---|
| 767 | { |
---|
| 768 | in_DECOD_EVENT_VAL [port]->write(rand()%percent_transaction_decod_event); |
---|
| 769 | |
---|
| 770 | SC_START(1); |
---|
| 771 | } |
---|
| 772 | while (not ( in_DECOD_EVENT_VAL [port]->read() and |
---|
| 773 | out_DECOD_EVENT_ACK [port]->read())); |
---|
| 774 | in_DECOD_EVENT_VAL [port]->write(0); |
---|
| 775 | |
---|
| 776 | LABEL("exception (wait end)"); |
---|
| 777 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 778 | |
---|
| 779 | SC_START(3); |
---|
| 780 | |
---|
[88] | 781 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 782 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 783 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 784 | |
---|
| 785 | SC_START(1); |
---|
| 786 | |
---|
| 787 | LABEL("exception (wait event)"); |
---|
| 788 | |
---|
| 789 | bool find = false; |
---|
| 790 | do |
---|
| 791 | { |
---|
| 792 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 793 | |
---|
| 794 | SC_START(0); |
---|
| 795 | |
---|
| 796 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 797 | { |
---|
| 798 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0x800); |
---|
| 799 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0x900); |
---|
| 800 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 801 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 802 | |
---|
| 803 | find = true; |
---|
| 804 | } |
---|
| 805 | |
---|
| 806 | SC_START(1); |
---|
| 807 | } |
---|
| 808 | while (not find); |
---|
| 809 | |
---|
| 810 | in_EVENT_ACK [context]->write(0); |
---|
| 811 | |
---|
| 812 | LABEL("exception (wait spr)"); |
---|
| 813 | |
---|
| 814 | find = false; |
---|
| 815 | do |
---|
| 816 | { |
---|
[88] | 817 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 818 | |
---|
| 819 | SC_START(0); |
---|
| 820 | |
---|
[88] | 821 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 822 | { |
---|
[88] | 823 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0x900); |
---|
| 824 | //TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),); |
---|
| 825 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 826 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 827 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 828 | |
---|
| 829 | find = true; |
---|
| 830 | } |
---|
| 831 | |
---|
| 832 | SC_START(1); |
---|
| 833 | } |
---|
| 834 | while (not find); |
---|
| 835 | |
---|
[88] | 836 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 837 | } |
---|
| 838 | |
---|
| 839 | if (1) |
---|
| 840 | { |
---|
| 841 | SC_START(3); |
---|
| 842 | |
---|
| 843 | LABEL("exception (begin)"); |
---|
[88] | 844 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 845 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 846 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 847 | |
---|
[88] | 848 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 849 | if (_param->_have_port_depth) |
---|
| 850 | in_COMMIT_EVENT_DEPTH ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
| 851 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 852 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(0); |
---|
| 853 | in_COMMIT_EVENT_ADDRESS ->write(0xa00); |
---|
| 854 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xb00); |
---|
| 855 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xc00); |
---|
| 856 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(0); |
---|
[83] | 857 | |
---|
| 858 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 859 | |
---|
| 860 | do |
---|
| 861 | { |
---|
[88] | 862 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 863 | |
---|
| 864 | SC_START(1); |
---|
| 865 | } |
---|
[88] | 866 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 867 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 868 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 869 | |
---|
| 870 | LABEL("exception (wait end)"); |
---|
| 871 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 872 | |
---|
| 873 | SC_START(3); |
---|
| 874 | |
---|
[88] | 875 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 876 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 877 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 878 | |
---|
| 879 | SC_START(1); |
---|
| 880 | |
---|
| 881 | LABEL("exception (wait event)"); |
---|
| 882 | |
---|
| 883 | bool find = false; |
---|
| 884 | do |
---|
| 885 | { |
---|
| 886 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 887 | |
---|
| 888 | SC_START(0); |
---|
| 889 | |
---|
| 890 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 891 | { |
---|
| 892 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xa00); |
---|
| 893 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xb00); |
---|
| 894 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 895 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 896 | |
---|
| 897 | find = true; |
---|
| 898 | } |
---|
| 899 | |
---|
| 900 | SC_START(1); |
---|
| 901 | } |
---|
| 902 | while (not find); |
---|
| 903 | |
---|
| 904 | in_EVENT_ACK [context]->write(0); |
---|
| 905 | |
---|
| 906 | LABEL("exception (wait spr)"); |
---|
| 907 | |
---|
| 908 | find = false; |
---|
| 909 | do |
---|
| 910 | { |
---|
[88] | 911 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 912 | |
---|
| 913 | SC_START(0); |
---|
| 914 | |
---|
[88] | 915 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 916 | { |
---|
[88] | 917 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xb00); |
---|
| 918 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xc00); |
---|
| 919 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 920 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 921 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 922 | |
---|
| 923 | find = true; |
---|
| 924 | } |
---|
| 925 | |
---|
| 926 | SC_START(1); |
---|
| 927 | } |
---|
| 928 | while (not find); |
---|
| 929 | |
---|
[88] | 930 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 931 | } |
---|
| 932 | |
---|
| 933 | if (1) |
---|
| 934 | { |
---|
| 935 | SC_START(3); |
---|
| 936 | |
---|
| 937 | LABEL("exception (begin)"); |
---|
[88] | 938 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 939 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 940 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 941 | |
---|
[88] | 942 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 943 | if (_param->_have_port_depth) |
---|
| 944 | in_COMMIT_EVENT_DEPTH ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
| 945 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 946 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(1); |
---|
| 947 | in_COMMIT_EVENT_ADDRESS ->write(0xd00); |
---|
| 948 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xe00); |
---|
| 949 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xf00); |
---|
| 950 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(0); |
---|
[83] | 951 | |
---|
| 952 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 953 | |
---|
| 954 | do |
---|
| 955 | { |
---|
[88] | 956 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 957 | |
---|
| 958 | SC_START(1); |
---|
| 959 | } |
---|
[88] | 960 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 961 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 962 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 963 | |
---|
| 964 | LABEL("exception (wait end)"); |
---|
| 965 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 966 | |
---|
| 967 | SC_START(3); |
---|
| 968 | |
---|
[88] | 969 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 970 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 971 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 972 | |
---|
| 973 | SC_START(1); |
---|
| 974 | |
---|
| 975 | LABEL("exception (wait event)"); |
---|
| 976 | |
---|
| 977 | bool find = false; |
---|
| 978 | do |
---|
| 979 | { |
---|
| 980 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 981 | |
---|
| 982 | SC_START(0); |
---|
| 983 | |
---|
| 984 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 985 | { |
---|
| 986 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xd00); |
---|
| 987 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xe00); |
---|
| 988 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 989 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 990 | |
---|
| 991 | find = true; |
---|
| 992 | } |
---|
| 993 | |
---|
| 994 | SC_START(1); |
---|
| 995 | } |
---|
| 996 | while (not find); |
---|
| 997 | |
---|
| 998 | in_EVENT_ACK [context]->write(0); |
---|
| 999 | |
---|
| 1000 | LABEL("exception (wait spr)"); |
---|
| 1001 | |
---|
| 1002 | find = false; |
---|
| 1003 | do |
---|
| 1004 | { |
---|
[88] | 1005 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1006 | |
---|
| 1007 | SC_START(0); |
---|
| 1008 | |
---|
[88] | 1009 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1010 | { |
---|
[88] | 1011 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xe00); |
---|
| 1012 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xf00); |
---|
| 1013 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),0); |
---|
| 1014 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 1015 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1016 | |
---|
| 1017 | find = true; |
---|
| 1018 | } |
---|
| 1019 | |
---|
| 1020 | SC_START(1); |
---|
| 1021 | } |
---|
| 1022 | while (not find); |
---|
| 1023 | |
---|
[88] | 1024 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1025 | } |
---|
| 1026 | |
---|
| 1027 | if (1) |
---|
| 1028 | { |
---|
| 1029 | SC_START(3); |
---|
| 1030 | |
---|
| 1031 | LABEL("exception (begin)"); |
---|
[88] | 1032 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1033 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1034 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1035 | |
---|
[88] | 1036 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1037 | if (_param->_have_port_depth) |
---|
| 1038 | in_COMMIT_EVENT_DEPTH ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
| 1039 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1040 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(0); |
---|
| 1041 | in_COMMIT_EVENT_ADDRESS ->write(0xa00); |
---|
| 1042 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xb00); |
---|
| 1043 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xc00); |
---|
| 1044 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(1); |
---|
[83] | 1045 | |
---|
| 1046 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1047 | |
---|
| 1048 | do |
---|
| 1049 | { |
---|
[88] | 1050 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1051 | |
---|
| 1052 | SC_START(1); |
---|
| 1053 | } |
---|
[88] | 1054 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1055 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1056 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1057 | |
---|
| 1058 | LABEL("exception (wait end)"); |
---|
| 1059 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1060 | |
---|
| 1061 | SC_START(3); |
---|
| 1062 | |
---|
[88] | 1063 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1064 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1065 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1066 | |
---|
| 1067 | SC_START(1); |
---|
| 1068 | |
---|
| 1069 | LABEL("exception (wait event)"); |
---|
| 1070 | |
---|
| 1071 | bool find = false; |
---|
| 1072 | do |
---|
| 1073 | { |
---|
| 1074 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1075 | |
---|
| 1076 | SC_START(0); |
---|
| 1077 | |
---|
| 1078 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1079 | { |
---|
| 1080 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xa00); |
---|
| 1081 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xb00); |
---|
| 1082 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1083 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1084 | |
---|
| 1085 | find = true; |
---|
| 1086 | } |
---|
| 1087 | |
---|
| 1088 | SC_START(1); |
---|
| 1089 | } |
---|
| 1090 | while (not find); |
---|
| 1091 | |
---|
| 1092 | in_EVENT_ACK [context]->write(0); |
---|
| 1093 | |
---|
| 1094 | LABEL("exception (wait spr)"); |
---|
| 1095 | |
---|
| 1096 | find = false; |
---|
| 1097 | do |
---|
| 1098 | { |
---|
[88] | 1099 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1100 | |
---|
| 1101 | SC_START(0); |
---|
| 1102 | |
---|
[88] | 1103 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1104 | { |
---|
[88] | 1105 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xb00); |
---|
| 1106 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xc00); |
---|
| 1107 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),1); |
---|
| 1108 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),0); |
---|
| 1109 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1110 | |
---|
| 1111 | find = true; |
---|
| 1112 | } |
---|
| 1113 | |
---|
| 1114 | SC_START(1); |
---|
| 1115 | } |
---|
| 1116 | while (not find); |
---|
| 1117 | |
---|
[88] | 1118 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1119 | } |
---|
| 1120 | |
---|
| 1121 | if (1) |
---|
| 1122 | { |
---|
| 1123 | SC_START(3); |
---|
| 1124 | |
---|
| 1125 | LABEL("exception (begin)"); |
---|
[88] | 1126 | in_NB_INST_DECOD_ALL [context]->write(1); |
---|
| 1127 | in_NB_INST_COMMIT_ALL [context]->write(1); |
---|
| 1128 | in_NB_INST_COMMIT_MEM [context]->write(1); |
---|
[83] | 1129 | |
---|
[88] | 1130 | in_COMMIT_EVENT_CONTEXT_ID ->write(context); |
---|
| 1131 | if (_param->_have_port_depth) |
---|
| 1132 | in_COMMIT_EVENT_DEPTH ->write((_param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context])); |
---|
| 1133 | in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); |
---|
| 1134 | in_COMMIT_EVENT_IS_DELAY_SLOT ->write(1); |
---|
| 1135 | in_COMMIT_EVENT_ADDRESS ->write(0xd00); |
---|
| 1136 | in_COMMIT_EVENT_ADDRESS_EPCR ->write(0xe00); |
---|
| 1137 | in_COMMIT_EVENT_ADDRESS_EEAR ->write(0xf00); |
---|
| 1138 | in_COMMIT_EVENT_ADDRESS_EEAR_VAL ->write(1); |
---|
[83] | 1139 | |
---|
| 1140 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); |
---|
| 1141 | |
---|
| 1142 | do |
---|
| 1143 | { |
---|
[88] | 1144 | in_COMMIT_EVENT_VAL ->write(rand()%percent_transaction_commit_event); |
---|
[83] | 1145 | |
---|
| 1146 | SC_START(1); |
---|
| 1147 | } |
---|
[88] | 1148 | while (not ( in_COMMIT_EVENT_VAL ->read() and |
---|
| 1149 | out_COMMIT_EVENT_ACK ->read())); |
---|
| 1150 | in_COMMIT_EVENT_VAL ->write(0); |
---|
[83] | 1151 | |
---|
| 1152 | LABEL("exception (wait end)"); |
---|
| 1153 | TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 0); |
---|
| 1154 | |
---|
| 1155 | SC_START(3); |
---|
| 1156 | |
---|
[88] | 1157 | in_NB_INST_DECOD_ALL [context]->write(0); |
---|
| 1158 | in_NB_INST_COMMIT_ALL [context]->write(0); |
---|
| 1159 | in_NB_INST_COMMIT_MEM [context]->write(0); |
---|
[83] | 1160 | |
---|
| 1161 | SC_START(1); |
---|
| 1162 | |
---|
| 1163 | LABEL("exception (wait event)"); |
---|
| 1164 | |
---|
| 1165 | bool find = false; |
---|
| 1166 | do |
---|
| 1167 | { |
---|
| 1168 | in_EVENT_ACK [context]->write(rand()%percent_transaction_event); |
---|
| 1169 | |
---|
| 1170 | SC_START(0); |
---|
| 1171 | |
---|
| 1172 | if (out_EVENT_VAL [context]->read() and in_EVENT_ACK [context]->read()) |
---|
| 1173 | { |
---|
| 1174 | TEST(Taddress_t,out_EVENT_ADDRESS [context]->read(),0xd00); |
---|
| 1175 | TEST(Taddress_t,out_EVENT_ADDRESS_NEXT [context]->read(),0xe00); |
---|
| 1176 | TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); |
---|
| 1177 | TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); |
---|
| 1178 | |
---|
| 1179 | find = true; |
---|
| 1180 | } |
---|
| 1181 | |
---|
| 1182 | SC_START(1); |
---|
| 1183 | } |
---|
| 1184 | while (not find); |
---|
| 1185 | |
---|
| 1186 | in_EVENT_ACK [context]->write(0); |
---|
| 1187 | |
---|
| 1188 | LABEL("exception (wait spr)"); |
---|
| 1189 | |
---|
| 1190 | find = false; |
---|
| 1191 | do |
---|
| 1192 | { |
---|
[88] | 1193 | in_SPR_EVENT_ACK [context]->write(rand()%percent_transaction_spr); |
---|
[83] | 1194 | |
---|
| 1195 | SC_START(0); |
---|
| 1196 | |
---|
[88] | 1197 | if (out_SPR_EVENT_VAL [context]->read() and in_SPR_EVENT_ACK [context]->read()) |
---|
[83] | 1198 | { |
---|
[88] | 1199 | TEST(Taddress_t,out_SPR_EVENT_EPCR [context]->read(),0xe00); |
---|
| 1200 | TEST(Taddress_t,out_SPR_EVENT_EEAR [context]->read(),0xf00); |
---|
| 1201 | TEST(Tcontrol_t,out_SPR_EVENT_EEAR_WEN [context]->read(),1); |
---|
| 1202 | TEST(Tcontrol_t,out_SPR_EVENT_SR_DSX [context]->read(),1); |
---|
| 1203 | TEST(Tcontrol_t,out_SPR_EVENT_SR_TO_ESR [context]->read(),1); |
---|
[83] | 1204 | |
---|
| 1205 | find = true; |
---|
| 1206 | } |
---|
| 1207 | |
---|
| 1208 | SC_START(1); |
---|
| 1209 | } |
---|
| 1210 | while (not find); |
---|
| 1211 | |
---|
[88] | 1212 | in_SPR_EVENT_ACK [context]->write(0); |
---|
[83] | 1213 | } |
---|
| 1214 | |
---|
| 1215 | |
---|
| 1216 | SC_START(1); |
---|
| 1217 | } |
---|
| 1218 | |
---|
| 1219 | |
---|
| 1220 | /******************************************************** |
---|
| 1221 | * Simulation - End |
---|
| 1222 | ********************************************************/ |
---|
| 1223 | |
---|
| 1224 | TEST_OK ("End of Simulation"); |
---|
| 1225 | delete _time; |
---|
| 1226 | |
---|
| 1227 | msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); |
---|
| 1228 | |
---|
| 1229 | delete in_CLOCK; |
---|
| 1230 | delete in_NRESET; |
---|
| 1231 | |
---|
[88] | 1232 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_VAL ,_param->_nb_context); |
---|
| 1233 | DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ACK ,_param->_nb_context); |
---|
| 1234 | //DELETE1_SC_SIGNAL( in_BRANCH_EVENT_CONTEXT_ID ,_param->_nb_context); |
---|
| 1235 | //DELETE1_SC_SIGNAL( in_BRANCH_EVENT_DEPTH ,_param->_nb_context); |
---|
| 1236 | //DELETE1_SC_SIGNAL( in_BRANCH_EVENT_MISS_PREDICTION ,_param->_nb_context); |
---|
| 1237 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_SRC ,_param->_nb_context); |
---|
[95] | 1238 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); |
---|
[88] | 1239 | DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); |
---|
[83] | 1240 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_VAL ,_param->_nb_decod_unit); |
---|
| 1241 | DELETE1_SC_SIGNAL(out_DECOD_EVENT_ACK ,_param->_nb_decod_unit); |
---|
| 1242 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_CONTEXT_ID ,_param->_nb_decod_unit); |
---|
| 1243 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_DEPTH ,_param->_nb_decod_unit); |
---|
| 1244 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_TYPE ,_param->_nb_decod_unit); |
---|
| 1245 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_IS_DELAY_SLOT ,_param->_nb_decod_unit); |
---|
| 1246 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS ,_param->_nb_decod_unit); |
---|
| 1247 | DELETE1_SC_SIGNAL( in_DECOD_EVENT_ADDRESS_EPCR ,_param->_nb_decod_unit); |
---|
[88] | 1248 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_VAL ); |
---|
| 1249 | DELETE_SC_SIGNAL (out_COMMIT_EVENT_ACK ); |
---|
| 1250 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_CONTEXT_ID ); |
---|
| 1251 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_DEPTH ); |
---|
| 1252 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_TYPE ); |
---|
| 1253 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_IS_DELAY_SLOT ); |
---|
| 1254 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS ); |
---|
| 1255 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EPCR ); |
---|
| 1256 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR_VAL ); |
---|
| 1257 | DELETE_SC_SIGNAL ( in_COMMIT_EVENT_ADDRESS_EEAR ); |
---|
[83] | 1258 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); |
---|
| 1259 | DELETE1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete); |
---|
| 1260 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); |
---|
| 1261 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); |
---|
| 1262 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); |
---|
| 1263 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); |
---|
| 1264 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); |
---|
| 1265 | DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); |
---|
[88] | 1266 | DELETE1_SC_SIGNAL( in_NB_INST_DECOD_ALL ,_param->_nb_context ); |
---|
| 1267 | DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_ALL ,_param->_nb_context ); |
---|
| 1268 | DELETE1_SC_SIGNAL( in_NB_INST_COMMIT_MEM ,_param->_nb_context ); |
---|
[83] | 1269 | DELETE1_SC_SIGNAL(out_EVENT_VAL ,_param->_nb_context ); |
---|
| 1270 | DELETE1_SC_SIGNAL( in_EVENT_ACK ,_param->_nb_context ); |
---|
| 1271 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS ,_param->_nb_context ); |
---|
| 1272 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT ,_param->_nb_context ); |
---|
| 1273 | DELETE1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL ,_param->_nb_context ); |
---|
| 1274 | DELETE1_SC_SIGNAL(out_EVENT_IS_DS_TAKE ,_param->_nb_context ); |
---|
[88] | 1275 | DELETE1_SC_SIGNAL(out_SPR_EVENT_VAL ,_param->_nb_context ); |
---|
| 1276 | DELETE1_SC_SIGNAL( in_SPR_EVENT_ACK ,_param->_nb_context ); |
---|
| 1277 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EPCR ,_param->_nb_context ); |
---|
| 1278 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EEAR ,_param->_nb_context ); |
---|
| 1279 | DELETE1_SC_SIGNAL(out_SPR_EVENT_EEAR_WEN ,_param->_nb_context ); |
---|
| 1280 | DELETE1_SC_SIGNAL(out_SPR_EVENT_SR_DSX ,_param->_nb_context ); |
---|
| 1281 | DELETE1_SC_SIGNAL(out_SPR_EVENT_SR_TO_ESR ,_param->_nb_context ); |
---|
[83] | 1282 | DELETE1_SC_SIGNAL(out_CONTEXT_DECOD_ENABLE ,_param->_nb_context ); |
---|
[88] | 1283 | DELETE1_SC_SIGNAL( in_DEPTH_MIN ,_param->_nb_context ); |
---|
| 1284 | DELETE1_SC_SIGNAL( in_SPR_SR_IEE ,_param->_nb_context ); |
---|
| 1285 | DELETE1_SC_SIGNAL( in_SPR_SR_EPH ,_param->_nb_context ); |
---|
| 1286 | |
---|
| 1287 | DELETE1_SC_SIGNAL( in_INTERRUPT_ENABLE ,_param->_nb_context ); |
---|
[83] | 1288 | } |
---|
| 1289 | #endif |
---|
| 1290 | |
---|
| 1291 | delete _Context_State; |
---|
| 1292 | #ifdef STATISTICS |
---|
| 1293 | delete _parameters_statistics; |
---|
| 1294 | #endif |
---|
| 1295 | } |
---|