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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/src/test.cpp @ 82

Last change on this file since 82 was 82, checked in by rosiere, 16 years ago
support locale (now must "just" translate) update all component with new test format update all component with usage New component : decod queue and prediction_unit
Property svn:keywords set to `Id`
File size: 67.2 KB

Line
1	/*
2	* $Id: test.cpp 82 2008-05-01 16:48:45Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX (2048*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/test.h"
13	#include <list>
14	#include "Common/include/Test.h"
15	#include "Behavioural/include/Allocation.h"
16
17	class entry_t
18	{
19	// public : Tcontrol_t _val ;
20	public : Tinstruction_t _instruction ;
21	// public : Tcontext_t _context_id ;
22	public : Tgeneral_address_t _address_previous ;
23	public : Tgeneral_address_t _address ;
24	public : Tgeneral_address_t _address_next ;
25	public : Tbranch_state_t _branch_state ;
26	public : Tprediction_ptr_t _branch_update_prediction_id;
27	public : Tbranch_condition_t _branch_condition ;
28	// public : Tcontrol_t _branch_stack_write ;
29	public : Tcontrol_t _branch_direction ;
30	public : Tgeneral_address_t _branch_address_dest ;
31	public : Tdepth_t _depth ;
32	public : Ttype_t _type ;
33	public : Toperation_t _operation ;
34	public : Tcontrol_t _is_delay_slot ;
35	public : Tcontrol_t _has_immediat ;
36	public : Tgeneral_data_t _immediat ;
37	public : Tcontrol_t _read_ra ;
38	public : Tgeneral_address_t _num_reg_ra ;
39	public : Tcontrol_t _read_rb ;
40	public : Tgeneral_address_t _num_reg_rb ;
41	public : Tcontrol_t _read_rc ;
42	public : Tspecial_address_t _num_reg_rc ;
43	public : Tcontrol_t _write_rd ;
44	public : Tgeneral_address_t _num_reg_rd ;
45	public : Tcontrol_t _write_re ;
46	public : Tspecial_address_t _num_reg_re ;
47	public : Texception_t _exception_use ;
48	public : Tevent_type_t _context_event_type ;
49
50	public : entry_t (
51	// Tcontrol_t val ,
52	Tinstruction_t instruction ,
53	// Tcontext_t context_id ,
54	Tgeneral_address_t address_previous ,
55	Tgeneral_address_t address ,
56	Tgeneral_address_t address_next ,
57	Tbranch_state_t branch_state ,
58	Tprediction_ptr_t branch_update_prediction_id,
59	Tbranch_condition_t branch_condition ,
60	// Tcontrol_t branch_stack_write ,
61	Tcontrol_t branch_direction ,
62	Tgeneral_address_t branch_address_dest ,
63	Tdepth_t depth ,
64	Ttype_t type ,
65	Toperation_t operation ,
66	Tcontrol_t is_delay_slot ,
67	Tcontrol_t has_immediat ,
68	Tgeneral_data_t immediat ,
69	Tcontrol_t read_ra ,
70	Tgeneral_address_t num_reg_ra ,
71	Tcontrol_t read_rb ,
72	Tgeneral_address_t num_reg_rb ,
73	Tcontrol_t read_rc ,
74	Tspecial_address_t num_reg_rc ,
75	Tcontrol_t write_rd ,
76	Tgeneral_address_t num_reg_rd ,
77	Tcontrol_t write_re ,
78	Tspecial_address_t num_reg_re ,
79	Texception_t exception_use ,
80	Tevent_type_t context_event_type )
81	{
82	// _val = val ;
83	_instruction = instruction ;
84	// _context_id = context_id ;
85	_address_previous = address_previous ;
86	_address = address ;
87	_address_next = address_next ;
88	_branch_state = branch_state ;
89	_branch_update_prediction_id = branch_update_prediction_id;
90	_branch_condition = branch_condition ;
91	// _branch_stack_write = branch_stack_write ;
92	_branch_direction = branch_direction ;
93	_branch_address_dest = branch_address_dest ;
94	_depth = depth ;
95	_type = type ;
96	_operation = operation ;
97	_is_delay_slot = is_delay_slot ;
98	_has_immediat = has_immediat ;
99	_immediat = immediat ;
100	_read_ra = read_ra ;
101	_num_reg_ra = num_reg_ra ;
102	_read_rb = read_rb ;
103	_num_reg_rb = num_reg_rb ;
104	_read_rc = read_rc ;
105	_num_reg_rc = num_reg_rc ;
106	_write_rd = write_rd ;
107	_num_reg_rd = num_reg_rd ;
108	_write_re = write_re ;
109	_num_reg_re = num_reg_re ;
110	_exception_use = exception_use ;
111	_context_event_type = context_event_type ;
112	}
113	};
114
115
116	void test (string name,
117	morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Parameters * _param)
118	{
119	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
120
121	#ifdef STATISTICS
122	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
123	#endif
124
125	Decod * _Decod = new Decod
126	(name.c_str(),
127	#ifdef STATISTICS
128	_parameters_statistics,
129	#endif
130	_param,
131	USE_ALL);
132
133	#ifdef SYSTEMC
134	/*********************************************************************
135	* Déclarations des signaux
136	*********************************************************************/
137	string rename;
138
139	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
140	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
141
142	ALLOC2_SC_SIGNAL( in_IFETCH_VAL ," in_IFETCH_VAL ",Tcontrol_t ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]);
143	ALLOC2_SC_SIGNAL(out_IFETCH_ACK ,"out_IFETCH_ACK ",Tcontrol_t ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]);
144	ALLOC2_SC_SIGNAL( in_IFETCH_INSTRUCTION ," in_IFETCH_INSTRUCTION ",Tinstruction_t ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]);
145	ALLOC1_SC_SIGNAL( in_IFETCH_CONTEXT_ID ," in_IFETCH_CONTEXT_ID ",Tcontext_t ,_param->_nb_context);
146	ALLOC1_SC_SIGNAL( in_IFETCH_ADDRESS ," in_IFETCH_ADDRESS ",Tgeneral_address_t ,_param->_nb_context);
147	// ALLOC1_SC_SIGNAL( in_IFETCH_ADDRESS_NEXT ," in_IFETCH_ADDRESS_NEXT ",Tgeneral_address_t ,_param->_nb_context);
148	ALLOC1_SC_SIGNAL( in_IFETCH_INST_IFETCH_PTR ," in_IFETCH_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ,_param->_nb_context);
149	ALLOC1_SC_SIGNAL( in_IFETCH_BRANCH_STATE ," in_IFETCH_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_context);
150	ALLOC1_SC_SIGNAL( in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ," in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_context);
151	ALLOC1_SC_SIGNAL(out_DECOD_VAL ,"out_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
152	ALLOC1_SC_SIGNAL( in_DECOD_ACK ," in_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
153	ALLOC1_SC_SIGNAL(out_DECOD_CONTEXT_ID ,"out_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod);
154	ALLOC1_SC_SIGNAL(out_DECOD_DEPTH ,"out_DECOD_DEPTH ",Tdepth_t ,_param->_nb_inst_decod);
155	ALLOC1_SC_SIGNAL(out_DECOD_TYPE ,"out_DECOD_TYPE ",Ttype_t ,_param->_nb_inst_decod);
156	ALLOC1_SC_SIGNAL(out_DECOD_OPERATION ,"out_DECOD_OPERATION ",Toperation_t ,_param->_nb_inst_decod);
157	ALLOC1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT ,"out_DECOD_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_inst_decod);
158	ALLOC1_SC_SIGNAL(out_DECOD_ADDRESS ,"out_DECOD_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_decod);
159	ALLOC1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT ,"out_DECOD_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_decod);
160	ALLOC1_SC_SIGNAL(out_DECOD_IMMEDIAT ,"out_DECOD_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_inst_decod);
161	ALLOC1_SC_SIGNAL(out_DECOD_READ_RA ,"out_DECOD_READ_RA ",Tcontrol_t ,_param->_nb_inst_decod);
162	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RA ,"out_DECOD_NUM_REG_RA ",Tgeneral_address_t ,_param->_nb_inst_decod);
163	ALLOC1_SC_SIGNAL(out_DECOD_READ_RB ,"out_DECOD_READ_RB ",Tcontrol_t ,_param->_nb_inst_decod);
164	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RB ,"out_DECOD_NUM_REG_RB ",Tgeneral_address_t ,_param->_nb_inst_decod);
165	ALLOC1_SC_SIGNAL(out_DECOD_READ_RC ,"out_DECOD_READ_RC ",Tcontrol_t ,_param->_nb_inst_decod);
166	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RC ,"out_DECOD_NUM_REG_RC ",Tspecial_address_t ,_param->_nb_inst_decod);
167	ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RD ,"out_DECOD_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_decod);
168	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RD ,"out_DECOD_NUM_REG_RD ",Tgeneral_address_t ,_param->_nb_inst_decod);
169	ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RE ,"out_DECOD_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_decod);
170	ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RE ,"out_DECOD_NUM_REG_RE ",Tspecial_address_t ,_param->_nb_inst_decod);
171	ALLOC1_SC_SIGNAL(out_DECOD_EXCEPTION_USE ,"out_DECOD_EXCEPTION_USE ",Texception_t ,_param->_nb_inst_decod);
172	ALLOC1_SC_SIGNAL(out_PREDICT_VAL ,"out_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
173	ALLOC1_SC_SIGNAL( in_PREDICT_ACK ," in_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
174	ALLOC1_SC_SIGNAL(out_PREDICT_CONTEXT_ID ,"out_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod);
175	ALLOC1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR ,"out_PREDICT_MATCH_INST_IFETCH_PTR ",Tcontrol_t ,_param->_nb_inst_decod);
176	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,"out_PREDICT_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_inst_decod);
177	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ,_param->_nb_inst_decod);
178	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION ,"out_PREDICT_BRANCH_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod);
179	// ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE ,"out_PREDICT_BRANCH_STACK_WRITE ",Tcontrol_t ,_param->_nb_inst_decod);
180	ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION ,"out_PREDICT_BRANCH_DIRECTION ",Tcontrol_t ,_param->_nb_inst_decod);
181	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod);
182	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_decod);
183	// ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE ," in_PREDICT_CAN_CONTINUE ",Tcontrol_t ,_param->_nb_inst_decod);
184	ALLOC1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE ," in_CONTEXT_DECOD_ENABLE ",Tcontrol_t ,_param->_nb_context);
185	ALLOC1_SC_SIGNAL( in_CONTEXT_DEPTH ," in_CONTEXT_DEPTH ",Tdepth_t ,_param->_nb_context);
186	ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_VAL ,"out_CONTEXT_EVENT_VAL ",Tcontrol_t );
187	ALLOC_SC_SIGNAL ( in_CONTEXT_EVENT_ACK ," in_CONTEXT_EVENT_ACK ",Tcontrol_t );
188	ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_CONTEXT_ID ,"out_CONTEXT_EVENT_CONTEXT_ID ",Tcontext_t );
189	ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_TYPE ,"out_CONTEXT_EVENT_TYPE ",Tevent_type_t );
190	ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_IS_DELAY_SLOT ,"out_CONTEXT_EVENT_IS_DELAY_SLOT ",Tcontrol_t );
191	ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_ADDRESS ,"out_CONTEXT_EVENT_ADDRESS ",Tgeneral_data_t );
192	ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_ADDRESS_EPCR ,"out_CONTEXT_EVENT_ADDRESS_EPCR ",Tgeneral_data_t );
193
194	/********************************************************
195	* Instanciation
196	********************************************************/
197
198	msg(_("<%s> : Instanciation of _Decod.\n"),name.c_str());
199
200	((_Decod->in_CLOCK)) ((in_CLOCK));
201	((_Decod->in_NRESET)) ((in_NRESET));
202
203	INSTANCE2_SC_SIGNAL(_Decod, in_IFETCH_VAL ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]);
204	INSTANCE2_SC_SIGNAL(_Decod,out_IFETCH_ACK ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]);
205	INSTANCE2_SC_SIGNAL(_Decod, in_IFETCH_INSTRUCTION ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]);
206	if (_param->_have_port_context_id)
207	INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_CONTEXT_ID ,_param->_nb_context);
208	INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_ADDRESS ,_param->_nb_context);
209	// INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_ADDRESS_NEXT ,_param->_nb_context);
210	if (_param->_have_port_inst_ifetch_ptr)
211	INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context);
212	INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_BRANCH_STATE ,_param->_nb_context);
213	if (_param->_have_port_branch_update_prediction_id)
214	INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context);
215	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_VAL ,_param->_nb_inst_decod);
216	INSTANCE1_SC_SIGNAL(_Decod, in_DECOD_ACK ,_param->_nb_inst_decod);
217	if (_param->_have_port_context_id)
218	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod);
219	if (_param->_have_port_depth)
220	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_DEPTH ,_param->_nb_inst_decod);
221	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_TYPE ,_param->_nb_inst_decod);
222	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_OPERATION ,_param->_nb_inst_decod);
223	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_IS_DELAY_SLOT ,_param->_nb_inst_decod);
224	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_ADDRESS ,_param->_nb_inst_decod);
225	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_HAS_IMMEDIAT ,_param->_nb_inst_decod);
226	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_IMMEDIAT ,_param->_nb_inst_decod);
227	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_READ_RA ,_param->_nb_inst_decod);
228	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RA ,_param->_nb_inst_decod);
229	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_READ_RB ,_param->_nb_inst_decod);
230	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RB ,_param->_nb_inst_decod);
231	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_READ_RC ,_param->_nb_inst_decod);
232	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RC ,_param->_nb_inst_decod);
233	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_WRITE_RD ,_param->_nb_inst_decod);
234	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RD ,_param->_nb_inst_decod);
235	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_WRITE_RE ,_param->_nb_inst_decod);
236	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RE ,_param->_nb_inst_decod);
237	INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_EXCEPTION_USE ,_param->_nb_inst_decod);
238	INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_VAL ,_param->_nb_inst_decod);
239	INSTANCE1_SC_SIGNAL(_Decod, in_PREDICT_ACK ,_param->_nb_inst_decod);
240	if (_param->_have_port_context_id)
241	INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_CONTEXT_ID ,_param->_nb_inst_decod);
242	INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_MATCH_INST_IFETCH_PTR ,_param->_nb_inst_decod);
243	INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_STATE ,_param->_nb_inst_decod);
244	if (_param->_have_port_branch_update_prediction_id)
245	INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod);
246	INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_CONDITION ,_param->_nb_inst_decod);
247	// INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_STACK_WRITE ,_param->_nb_inst_decod);
248	INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_DIRECTION ,_param->_nb_inst_decod);
249	INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod);
250	INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod);
251	// INSTANCE1_SC_SIGNAL(_Decod, in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod);
252	INSTANCE1_SC_SIGNAL(_Decod, in_CONTEXT_DECOD_ENABLE ,_param->_nb_context);
253	if (_param->_have_port_depth)
254	INSTANCE1_SC_SIGNAL(_Decod, in_CONTEXT_DEPTH ,_param->_nb_context);
255	INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_VAL );
256	INSTANCE_SC_SIGNAL (_Decod, in_CONTEXT_EVENT_ACK );
257	if (_param->_have_port_context_id)
258	INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_CONTEXT_ID );
259	INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_TYPE );
260	INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_IS_DELAY_SLOT );
261	INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_ADDRESS );
262	INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_ADDRESS_EPCR );
263
264	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
265
266	Time * _time = new Time();
267
268	/********************************************************
269	* Simulation - Begin
270	********************************************************/
271
272	// Initialisation
273
274	const uint32_t seed = 0;
275	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
276
277	const int32_t percent_transaction_ifetch = 75;
278	const int32_t percent_transaction_decod = 75;
279	const int32_t percent_transaction_predict = 75;
280	const int32_t percent_transaction_event = 75;
281
282	srand(seed);
283
284	SC_START(0);
285	LABEL("Initialisation");
286
287	LABEL("Reset");
288	in_NRESET->write(0);
289	SC_START(5);
290	in_NRESET->write(1);
291
292	LABEL("Loop of Test");
293
294	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
295	{
296	LABEL("Iteration %d",iteration);
297
298	list<entry_t> request [_param->_nb_context];
299
300	uint32_t w;
301	uint32_t x = 0xfc;
302	uint32_t y = 0x100;
303	uint32_t z = 0x104;
304
305	uint32_t delay_slot_previous [_param->_nb_context];
306	uint32_t delay_slot_current [_param->_nb_context];
307	uint32_t delay_slot_next [_param->_nb_context];
308
309	#define SEQ do {x=y; y=z; z+=4;} while(0);
310	#define JMP(j) do {x=y; y=z; z =j;} while(0);
311
312	// ===== l.add r15, r4 , r8
313	request [0].push_back (entry_t(
314	//instruction,address_previous,address,address_next
315	0xe1e44000,x,y,z,
316	//branch_state,branch_update_prediction_id,branch_condition,branch_stack_write,branch_direction, branch_address_dest
317	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0,0x0,
318	//depth,type,operation,is_delay_slot
319	0,TYPE_ALU,OPERATION_ALU_L_ADD,false,
320	//has_immediat,immediat,read_ra,reg_ra,read_rb,reg_rb,read_rc,reg_rc,write_rd,reg_rd,write_re,reg_re
321	0,0x00000000,1, 4,1, 8,0,0 ,1,15,1,SPR_LOGIC_SR_CY_OV,
322	//exception_use,context_event_type
323	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
324	SEQ;
325
326	// ===== l.addc r15, r4 , r31
327	request [0].push_back (entry_t(
328	0xe1e4f801,x,y,z,
329	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0,0x0,
330	0,TYPE_ALU,OPERATION_ALU_L_ADD,false,
331	0,0x00000000,1, 4,1,31,1,SPR_LOGIC_SR_CY_OV,1,15,1,SPR_LOGIC_SR_CY_OV,
332	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
333	SEQ;
334
335	// ===== l.addi r7 , r12, -1
336	request [0].push_back (entry_t(
337	0x9cecffff,x,y,z,
338	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
339	0,TYPE_ALU,OPERATION_ALU_L_ADD,false,
340	1,0xffffffff,1,12,0, 0,0,0 ,1,7 ,1,SPR_LOGIC_SR_CY_OV,
341	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
342	SEQ;
343
344	// ===== l.addi r8 , r17, 0
345	request [0].push_back (entry_t(
346	0x9d110000,x,y,z,
347	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
348	0,TYPE_ALU,OPERATION_ALU_L_ADD,false,
349	1,0x00000000,1,17,0, 0,0,0 ,1,8 ,1,SPR_LOGIC_SR_CY_OV,
350	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
351	SEQ;
352
353	// ===== l.addi r21, r7 , 1981
354	request [0].push_back (entry_t(
355	0x9ea707bd,x,y,z,
356	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
357	0,TYPE_ALU,OPERATION_ALU_L_ADD,false,
358	1,0x000007bd,1, 7,0, 0,0,0 ,1,21,1,SPR_LOGIC_SR_CY_OV,
359	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
360	SEQ;
361
362	// ===== l.addic r7 , r12, -1
363	request [0].push_back (entry_t(
364	0xa0ecffff,x,y,z,
365	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
366	0,TYPE_ALU,OPERATION_ALU_L_ADD,false,
367	1,0xffffffff,1,12,0, 0,1,SPR_LOGIC_SR_CY_OV,1,7 ,1,SPR_LOGIC_SR_CY_OV,
368	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
369	SEQ;
370
371	// ===== l.addic r8 , r17, 0
372	request [0].push_back (entry_t(
373	0xa1110000,x,y,z,
374	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
375	0,TYPE_ALU,OPERATION_ALU_L_ADD,false,
376	1,0x00000000,1,17,0, 0,1,SPR_LOGIC_SR_CY_OV,1,8 ,1,SPR_LOGIC_SR_CY_OV,
377	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
378	SEQ;
379
380	// ===== l.addic r21, r7 , 1981
381	request [0].push_back (entry_t(
382	0xa2a707bd,x,y,z,
383	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
384	0,TYPE_ALU,OPERATION_ALU_L_ADD,false,
385	1,0x000007bd,1, 7,0, 0,1,SPR_LOGIC_SR_CY_OV,1,21,1,SPR_LOGIC_SR_CY_OV,
386	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
387	SEQ;
388
389	// ===== l.and r24, r0 , r14
390	request [0].push_back (entry_t(
391	0xe3007003,x,y,z,
392	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
393	0,TYPE_ALU,OPERATION_ALU_L_AND,false,
394	0,0x0 ,1, 0,1,14,0,0 ,1,24,0,0 ,
395	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
396	SEQ;
397
398	// ===== l.andi r24, r4 , 1981
399	request [0].push_back (entry_t(
400	0xa70407bd,x,y,z,
401	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
402	0,TYPE_ALU,OPERATION_ALU_L_AND,false,
403	1,0x000007bd,1, 4,0,0 ,0,0 ,1,24,0,0 ,
404	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
405	SEQ;
406
407	// ===== l.bf 11
408	w = y+(11<<2);
409	request [0].push_back (entry_t(
410	0x1000000b,x,y,z,
411	BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_SET,0, w,
412	0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_F,false,
413	1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 ,
414	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
415	JMP(w);
416
417	// ===== l.cmov r30, r10, r20
418	request [0].push_back (entry_t(
419	0xe3caa00e,x,y,z,
420	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
421	0,TYPE_MOVE,OPERATION_MOVE_L_CMOV,true,
422	0,0x0,1,10,1,20,1,SPR_LOGIC_SR_F ,1,30,0,0 ,
423	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
424	SEQ;
425
426	// ===== l.div r30,r10,r20
427	request [0].push_back (entry_t(
428	0xe3caa309,x,y,z,
429	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
430	0,TYPE_MUL_DIV,OPERATION_MUL_DIV_L_DIV,false,
431	0,0x0,1,10,1,20,0,0 ,1,30,1,SPR_LOGIC_SR_CY_OV,
432	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
433	SEQ;
434
435	// ===== l.bf -9
436	w = y+(-9<<2);
437	request [0].push_back (entry_t(
438	0x13fffff7,x,y,z,
439	BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_SET,1, w,
440	0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_F,false,
441	1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 ,
442	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
443	JMP(w);
444
445	// ===== l.divu r30,r10,r20
446	request [0].push_back (entry_t(
447	0xe3caa30a,x,y,z,
448	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
449	0,TYPE_MUL_DIV,OPERATION_MUL_DIV_L_DIVU,true,
450	0,0x0,1,10,1,20,0,0 ,1,30,1,SPR_LOGIC_SR_CY_OV,
451	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
452	SEQ;
453
454	// ===== l.extbs r30,r10
455	request [0].push_back (entry_t(
456	0xe3ca004c,x,y,z,
457	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
458	0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_S,false,
459	1,8 ,1,10,0,0 ,0,0 ,1,30,0,0 ,
460	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
461	SEQ;
462
463	// ===== l.bnf 11
464	w = y+(11<<2);
465	request [0].push_back (entry_t(
466	0x0c00000b,x,y,z,
467	BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_UNSET,0, w,
468	0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_NF,false,
469	1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 ,
470	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
471	JMP(w);
472
473	// ===== l.extbz r30,r10
474	request [0].push_back (entry_t(
475	0xe3ca00cc,x,y,z,
476	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
477	0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_Z,true ,
478	1,8 ,1,10,0,0 ,0,0 ,1,30,0,0 ,
479	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
480	SEQ;
481
482	// ===== l.exths r30,r10
483	request [0].push_back (entry_t(
484	0xe3ca000c,x,y,z,
485	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
486	0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_S,false,
487	1,16 ,1,10,0,0 ,0,0 ,1,30,0,0 ,
488	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
489	SEQ;
490
491	// ===== l.bnf -9
492	w = y+(-9<<2);
493	request [0].push_back (entry_t(
494	0x0ffffff7,x,y,z,
495	BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_UNSET,1, w,
496	0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_NF,false,
497	1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 ,
498	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
499	JMP(w);
500
501	// ===== l.exthz r30,r10
502	request [0].push_back (entry_t(
503	0xe3ca008c,x,y,z,
504	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
505	0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_Z,true ,
506	1,16 ,1,10,0,0 ,0,0 ,1,30,0,0 ,
507	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
508	SEQ;
509
510	// ===== l.extws r30,r10
511	request [0].push_back (entry_t(
512	0xe3ca000d,x,y,z,
513	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
514	0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_S,false,
515	1,32 ,1,10,0,0 ,0,0 ,1,30,0,0 ,
516	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
517	SEQ;
518
519	// ===== l.extwz r30,r10
520	request [0].push_back (entry_t(
521	0xe3ca004d,x,y,z,
522	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
523	0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_Z,false,
524	1,32 ,1,10,0,0 ,0,0 ,1,30,0,0 ,
525	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
526	SEQ;
527
528	// ===== l.csync
529	request [0].push_back (entry_t(
530	0x23000000,x,y,z,
531	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
532	0,TYPE_SPECIAL,OPERATION_SPECIAL_L_CSYNC,false,
533	0,0 ,0,0 ,0,0 ,0,0 ,0,0 ,0,0 ,
534	EXCEPTION_USE_NONE,EVENT_TYPE_CSYNC));
535	SEQ;
536
537	// ===== l.ff1 r30,r10
538	request [0].push_back (entry_t(
539	0xe3ca000f,x,y,z,
540	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
541	0,TYPE_FIND,OPERATION_FIND_L_FF1,false,
542	0,0 ,1,10,0,0 ,0,0 ,1,30,0,0 ,
543	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
544	SEQ;
545
546	// ===== l.fl1 r30,r10
547	request [0].push_back (entry_t(
548	0xe3ca010f,x,y,z,
549	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
550	0,TYPE_FIND,OPERATION_FIND_L_FL1,false,
551	0,0 ,1,10,0,0 ,0,0 ,1,30,0,0 ,
552	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
553	SEQ;
554
555	// ===== l.j 1018
556	w = y+(1018<<2);
557	request [0].push_back (entry_t(
558	0x000003fa,x,y,z,
559	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,1, w,
560	0,TYPE_BRANCH,OPERATION_BRANCH_NONE,false,
561	0,0,0, 0,0,0 ,0,0 ,0,0 ,0,0 ,
562	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
563	JMP(w);
564
565	// ===== l.lbs r30,0x3fa(r10)
566	request [0].push_back (entry_t(
567	0x93ca03fa,x,y,z,
568	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
569	0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_8_S,true,
570	1,0x3fa,1,10,0,0 ,0,0,1,30,0,0,
571	EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE));
572	SEQ;
573
574	// ===== l.lbz r30,0x3fa(r10)
575	request [0].push_back (entry_t(
576	0x8fca03fa,x,y,z,
577	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
578	0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_8_Z,false,
579	1,0x3fa,1,10,0,0 ,0,0,1,30,0,0,
580	EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE));
581	SEQ;
582
583	// ===== l.j -1018
584	w = y+(-1018<<2);
585	request [0].push_back (entry_t(
586	0x03fffc06,x,y,z,
587	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,1, w,
588	0,TYPE_BRANCH,OPERATION_BRANCH_NONE,false,
589	0,0,0, 0,0,0 ,0,0 ,0,0 ,0,0 ,
590	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
591	JMP(w);
592
593	// ===== l.lhs r30,0x3fa(r10)
594	request [0].push_back (entry_t(
595	0x9bca03fa,x,y,z,
596	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
597	0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_16_S,true,
598	1,0x3fa,1,10,0,0 ,0,0,1,30,0,0,
599	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
600	SEQ;
601
602	// ===== l.lhz r30,0x3fa(r10)
603	request [0].push_back (entry_t(
604	0x97ca03fa,x,y,z,
605	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
606	0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_16_Z,false,
607	1,0x3fa,1,10,0,0 ,0,0,1,30,0,0,
608	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
609	SEQ;
610
611	// ===== l.jal 1018
612	w = y+(1018<<2);
613	request [0].push_back (entry_t(
614	0x040003fa,x,y,z,
615	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITH_WRITE_STACK,1, w,
616	0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false,
617	1,z+4,0, 0,0,0 ,0,0 ,1,9 ,0,0 ,
618	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
619	JMP(w);
620
621	// ===== l.lws r30,0x3fa(r10)
622	request [0].push_back (entry_t(
623	0x8bca03fa,x,y,z,
624	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
625	0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_32_S,true,
626	1,0x3fa,1,10,0,0 ,0,0,1,30,0,0,
627	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
628	SEQ;
629
630	// ===== l.lwz r30,0x3fa(r10)
631	request [0].push_back (entry_t(
632	0x87ca03fa,x,y,z,
633	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
634	0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_32_Z,false,
635	1,0x3fa,1,10,0,0 ,0,0,1,30,0,0,
636	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
637	SEQ;
638
639	// ===== l.jal -1018
640	w = y+(-1018<<2);
641	request [0].push_back (entry_t(
642	0x07fffc06,x,y,z,
643	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITH_WRITE_STACK,1, w,
644	0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false,
645	1,z+4,0, 0,0,0 ,0,0 ,1,9 ,0,0 ,
646	EXCEPTION_USE_NONE ,EVENT_TYPE_NONE));
647	JMP(w);
648
649	// ===== l.ld r30,1018(r10)
650	request [0].push_back (entry_t(
651	0x83ca03fa,x,y,z,
652	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
653	0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_64_S,true,
654	1,1018,1,10,0,0 ,0,0,1,30,0,0,
655	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
656	SEQ;
657
658	// ===== l.ld r30,-1018(r10)
659	request [0].push_back (entry_t(
660	0x83cafc06,x,y,z,
661	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
662	0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_64_S,false,
663	1,static_cast<Tgeneral_data_t>(-1018),1,10,0,0 ,0,0,1,30,0,0,
664	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
665	SEQ;
666
667	// ===== l.jalr r20
668	request [0].push_back (entry_t(
669	0x4800a000,x,y,z,
670	BRANCH_STATE_NONE,0,BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK,1, z, // branch_address_dest can be determined if BRANCH_STATE != NONE (also : previous prediction)
671	0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false,
672	0,0 ,0,0 ,1,20,0,0,1,9 ,0,0,
673	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
674	SEQ;
675
676	// ===== l.mac r10,r20
677	request [0].push_back (entry_t(
678	0xc40aa001,x,y,z,
679	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
680	0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MAC,true,
681	0,0,1,10,1,20,0,0,0,0,0,0,
682	EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS));
683	SEQ;
684
685	// ===== l.maci r10,1018
686	request [0].push_back (entry_t(
687	0x4c0a03fa,x,y,z,
688	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
689	0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MAC,false,
690	1,1018,1,10,0,0,0,0,0,0,0,0,
691	EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS));
692	SEQ;
693
694	// ===== l.maci r10,-1018
695	request [0].push_back (entry_t(
696	0x4fea0406,x,y,z,
697	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
698	0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MAC,false,
699	1,static_cast<Tgeneral_data_t>(-1018),1,10,0,0,0,0,0,0,0,0,
700	EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS));
701	SEQ;
702
703	// ===== l.jr r10
704	request [0].push_back (entry_t(
705	0x44005000,x,y,z,
706	BRANCH_STATE_NONE,0,BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK,1, z,
707	0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false,
708	0,0 ,0, 0,1,10,0,0,0,0 ,0,0,
709	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
710	SEQ;
711
712	// ===== l.macrc r30
713	request [0].push_back (entry_t(
714	0x1bc10000,x,y,z,
715	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
716	0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MACRC,true,
717	0,0,0, 0,0, 0,0,0,1,30,0,0,
718	EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS));
719	SEQ;
720
721	// ===== l.mfspr r30,r10,1018
722	request [0].push_back (entry_t(
723	0xb7ca03fa,x,y,z,
724	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
725	0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MFSPR,false,
726	1,1018,1,10,0, 0,0,0,1,30,0,0,
727	EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS));
728	SEQ;
729
730	// ===== l.mfspr r30,r10,-1018
731	request [0].push_back (entry_t(
732	0xb7cafc06,x,y,z,
733	BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0,
734	0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MFSPR,false,
735	1,0xfc06,1,10,0, 0,0,0,1,30,0,0,
736	EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS));
737	SEQ;
738
739	// ===== l.jr r9
740	request [0].push_back (entry_t(
741	0x44004800,x,y,z,
742	BRANCH_STATE_NONE,0,BRANCH_CONDITION_READ_STACK,1, z,
743	0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false,
744	0,0 ,0, 0,1,9,0,0,0,0 ,0,0,
745	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
746	SEQ;
747
748	// ===== l.movhi r30,0x3fa
749	request [0].push_back (entry_t(
750	0x1bc003fa,x,y,z,
751	0,0,0,0,0,0,
752	TYPE_MOVE,OPERATION_MOVE_L_MOVHI,true,
753	1,0x3fa,0,0, 0,0, 0,0, 1,30, 0,0,
754	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
755	SEQ;
756
757	// ===== l.movhi r30,0xfc06
758	request [0].push_back (entry_t(
759	0x1bc0fc06,x,y,z,
760	0,0,0,0,0,0,
761	TYPE_MOVE,OPERATION_MOVE_L_MOVHI,false,
762	1,0xfc06,0,0, 0,0, 0,0, 1,30, 0,0,
763	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
764	SEQ;
765
766	// ===== l.msb r10,r20
767	request [0].push_back (entry_t(
768	0xc40aa002,x,y,z,
769	0,0,0,0,0,0,
770	TYPE_SPECIAL,OPERATION_SPECIAL_L_MSB,false,
771	0,0, 1,10, 1,20, 0,0, 0,0, 0,0,
772	EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS));
773	SEQ;
774
775	// ===== l.msync
776	request [0].push_back (entry_t(
777	0x22000000,x,y,z,
778	0,0,0,0,0,0,
779	TYPE_SPECIAL,OPERATION_SPECIAL_L_MSYNC,false,
780	0,0, 0,0, 0,0, 0,0, 0,0, 0,0,
781	EXCEPTION_USE_NONE,EVENT_TYPE_MSYNC));
782	SEQ;
783
784	// ===== l.mtspr r10,r20,0x3fa
785	request [0].push_back (entry_t(
786	0xc00aa3fa,x,y,z,
787	0,0,0,0,0,0,
788	TYPE_SPECIAL,OPERATION_SPECIAL_L_MTSPR,false,
789	1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0,
790	EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS));
791	SEQ;
792
793	// ===== l.mtspr r10,r20,0xfc06
794	request [0].push_back (entry_t(
795	0xc3eaa406,x,y,z,
796	0,0,0,0,0,0,
797	TYPE_SPECIAL,OPERATION_SPECIAL_L_MTSPR,false,
798	1,0xfc06, 1,10, 1,20, 0,0, 0,0, 0,0,
799	EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS));
800	SEQ;
801
802	// ===== l.mul r30,r10,r20
803	request [0].push_back (entry_t(
804	0xe3caa306,x,y,z,
805	0,0,0,0,0,0,
806	TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MUL,false,
807	0,0, 1,10, 1,20, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV,
808	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
809	SEQ;
810
811	// ===== l.muli r30,r10,0x3fa
812	request [0].push_back (entry_t(
813	0xb3ca03fa,x,y,z,
814	0,0,0,0,0,0,
815	TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MUL,false,
816	1,0x3fa, 1,10, 0,0, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV,
817	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
818	SEQ;
819
820	// ===== l.muli r30,r10,0xfffffc06
821	request [0].push_back (entry_t(
822	0xb3cafc06,x,y,z,
823	0,0,0,0,0,0,
824	TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MUL,false,
825	1,0xfffffc06, 1,10, 0,0, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV,
826	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
827	SEQ;
828
829	// ===== l.mulu r30,r10,r20
830	request [0].push_back (entry_t(
831	0xe3caa30b,x,y,z,
832	0,0,0,0,0,0,
833	TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MULU,false,
834	0,0, 1,10, 1,20, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV,
835	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
836	SEQ;
837
838	// ===== l.nop 0x3fa
839	request [0].push_back (entry_t(
840	0x150003fa,x,y,z,
841	0,0,0,0,0,0,
842	TYPE_SPECIAL,OPERATION_SPECIAL_L_NOP,false,
843	0,0x3fa, 0,0, 0,0, 0,0, 0,0, 0,0,
844	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
845	SEQ;
846
847	// ===== l.nop 0xfc06
848	request [0].push_back (entry_t(
849	0x1500fc06,x,y,z,
850	0,0,0,0,0,0,
851	TYPE_SPECIAL,OPERATION_SPECIAL_L_NOP,false,
852	0,0xfc06, 0,0, 0,0, 0,0, 0,0, 0,0,
853	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
854	SEQ;
855
856	// ===== l.or r30,r10,r20
857	request [0].push_back (entry_t(
858	0xe3caa004,x,y,z,
859	0,0,0,0,0,0,
860	TYPE_ALU,OPERATION_ALU_L_OR,false,
861	0,0, 1,10, 1,20, 0,0, 1,30, 0,0,
862	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
863	SEQ;
864
865	// ===== l.ori r30,r10,0x3fa
866	request [0].push_back (entry_t(
867	0xabca03fa,x,y,z,
868	0,0,0,0,0,0,
869	TYPE_ALU,OPERATION_ALU_L_OR,false,
870	1,0x3fa, 1,10, 0,0, 0,0, 1,30, 0,0,
871	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
872	SEQ;
873
874	// ===== l.ori r30,r10,0xfc06
875	request [0].push_back (entry_t(
876	0xabcafc06,x,y,z,
877	0,0,0,0,0,0,
878	TYPE_ALU,OPERATION_ALU_L_OR,false,
879	1,0xfc06, 1,10, 0,0, 0,0, 1,30, 0,0,
880	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
881	SEQ;
882
883	// ===== l.psync
884	request [0].push_back (entry_t(
885	0x22800000,x,y,z,
886	0,0,0,0,0,0,
887	TYPE_SPECIAL,OPERATION_SPECIAL_L_PSYNC,false,
888	0,0, 0,0, 0,0, 0,0, 0,0, 0,0,
889	EXCEPTION_USE_NONE,EVENT_TYPE_PSYNC));
890	SEQ;
891
892	// ===== l.ror r30,r10,r20
893	request [0].push_back (entry_t(
894	0xe3caa0c8,x,y,z,
895	0,0,0,0,0,0,
896	TYPE_SHIFT,OPERATION_SHIFT_L_ROR,false,
897	0,0, 1,10, 1,20, 0,0, 1,30, 0,0,
898	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
899	SEQ;
900
901	// ===== l.rori r30,r10,0x3f
902	request [0].push_back (entry_t(
903	0xbbca00ff,x,y,z,
904	0,0,0,0,0,0,
905	TYPE_SHIFT,OPERATION_SHIFT_L_ROR,false,
906	1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0,
907	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
908	SEQ;
909
910	// ===== l.rori r30,r10,0x1
911	request [0].push_back (entry_t(
912	0xbbca00c1,x,y,z,
913	0,0,0,0,0,0,
914	TYPE_SHIFT,OPERATION_SHIFT_L_ROR,false,
915	1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0,
916	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
917	SEQ;
918
919	// ===== l.sb 0x3fa(r10),r20
920	request [0].push_back (entry_t(
921	0xd80aa3fa,x,y,z,
922	0,0,0,0,0,0,
923	TYPE_MEMORY,OPERATION_MEMORY_STORE_8,false,
924	1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0,
925	EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE));
926	SEQ;
927
928	// ===== l.sb 0xfffffc06(r10),r20
929	request [0].push_back (entry_t(
930	0xdbeaa406,x,y,z,
931	0,0,0,0,0,0,
932	TYPE_MEMORY,OPERATION_MEMORY_STORE_8,false,
933	1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0,
934	EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE));
935	SEQ;
936
937	// ===== l.sd 0x3fa(r10),r20
938	request [0].push_back (entry_t(
939	0xd00aa3fa,x,y,z,
940	0,0,0,0,0,0,
941	TYPE_MEMORY,OPERATION_MEMORY_STORE_64,false,
942	1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0,
943	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
944	SEQ;
945
946	// ===== l.sd 0xfffffc06(r10),r20
947	request [0].push_back (entry_t(
948	0xd3eaa406,x,y,z,
949	0,0,0,0,0,0,
950	TYPE_MEMORY,OPERATION_MEMORY_STORE_64,false,
951	1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0,
952	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
953	SEQ;
954
955	// ===== l.sh 0x3fa(r10),r20
956	request [0].push_back (entry_t(
957	0xdc0aa3fa,x,y,z,
958	0,0,0,0,0,0,
959	TYPE_MEMORY,OPERATION_MEMORY_STORE_16,false,
960	1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0,
961	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
962	SEQ;
963
964	// ===== l.sh 0xfffffc06(r10),r20
965	request [0].push_back (entry_t(
966	0xdfeaa406,x,y,z,
967	0,0,0,0,0,0,
968	TYPE_MEMORY,OPERATION_MEMORY_STORE_16,false,
969	1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0,
970	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
971	SEQ;
972
973	// ===== l.sw 0x3fa(r10),r20
974	request [0].push_back (entry_t(
975	0xd40aa3fa,x,y,z,
976	0,0,0,0,0,0,
977	TYPE_MEMORY,OPERATION_MEMORY_STORE_32,false,
978	1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0,
979	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
980	SEQ;
981
982	// ===== l.sw 0xfffffc06(r10),r20
983	request [0].push_back (entry_t(
984	0xd7eaa406,x,y,z,
985	0,0,0,0,0,0,
986	TYPE_MEMORY,OPERATION_MEMORY_STORE_32,false,
987	1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0,
988	EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE));
989	SEQ;
990
991	// ===== l.sll r30,r10,r20
992	request [0].push_back (entry_t(
993	0xe3caa008,x,y,z,
994	0,0,0,0,0,0,
995	TYPE_SHIFT,OPERATION_SHIFT_L_SLL,false,
996	0,0, 1,10, 1,20, 0,0, 1,30, 0,0,
997	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
998	SEQ;
999
1000	// ===== l.slli r30,r10,0x1
1001	request [0].push_back (entry_t(
1002	0xbbca0001,x,y,z,
1003	0,0,0,0,0,0,
1004	TYPE_SHIFT,OPERATION_SHIFT_L_SLL,false,
1005	1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0,
1006	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1007	SEQ;
1008
1009	// ===== l.slli r30,r10,0x3f
1010	request [0].push_back (entry_t(
1011	0xbbca003f,x,y,z,
1012	0,0,0,0,0,0,
1013	TYPE_SHIFT,OPERATION_SHIFT_L_SLL,false,
1014	1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0,
1015	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1016	SEQ;
1017
1018	// ===== l.sra r30,r10,r20
1019	request [0].push_back (entry_t(
1020	0xe3caa088,x,y,z,
1021	0,0,0,0,0,0,
1022	TYPE_SHIFT,OPERATION_SHIFT_L_SRA,false,
1023	0,0, 1,10, 1,20, 0,0, 1,30, 0,0,
1024	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1025	SEQ;
1026
1027	// ===== l.srai r30,r10,0x1
1028	request [0].push_back (entry_t(
1029	0xbbca0081,x,y,z,
1030	0,0,0,0,0,0,
1031	TYPE_SHIFT,OPERATION_SHIFT_L_SRA,false,
1032	1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0,
1033	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1034	SEQ;
1035
1036	// ===== l.srai r30,r10,0x3f
1037	request [0].push_back (entry_t(
1038	0xbbca00bf,x,y,z,
1039	0,0,0,0,0,0,
1040	TYPE_SHIFT,OPERATION_SHIFT_L_SRA,false,
1041	1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0,
1042	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1043	SEQ;
1044
1045	// ===== l.srl r30,r10,r20
1046	request [0].push_back (entry_t(
1047	0xe3caa048,x,y,z,
1048	0,0,0,0,0,0,
1049	TYPE_SHIFT,OPERATION_SHIFT_L_SRL,false,
1050	0,0, 1,10, 1,20, 0,0, 1,30, 0,0,
1051	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1052	SEQ;
1053
1054	// ===== l.srli r30,r10,0x1
1055	request [0].push_back (entry_t(
1056	0xbbca0041,x,y,z,
1057	0,0,0,0,0,0,
1058	TYPE_SHIFT,OPERATION_SHIFT_L_SRL,false,
1059	1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0,
1060	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1061	SEQ;
1062
1063	// ===== l.srli r30,r10,0x3f
1064	request [0].push_back (entry_t(
1065	0xbbca007f,x,y,z,
1066	0,0,0,0,0,0,
1067	TYPE_SHIFT,OPERATION_SHIFT_L_SRL,false,
1068	1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0,
1069	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1070	SEQ;
1071
1072	// ===== l.xor r30,r10,r20
1073	request [0].push_back (entry_t(
1074	0xe3caa005,x,y,z,
1075	0,0,0,0,0,0,
1076	TYPE_ALU,OPERATION_ALU_L_XOR,false,
1077	0,0, 1,10, 1,20, 0,0, 1,30, 0,0,
1078	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1079	SEQ;
1080
1081	// ===== l.xori r30,r10,0x3fa
1082	request [0].push_back (entry_t(
1083	0xafca03fa,x,y,z,
1084	0,0,0,0,0,0,
1085	TYPE_ALU,OPERATION_ALU_L_XOR,false,
1086	1,0x3fa, 1,10, 0,0, 0,0, 1,30, 0,0,
1087	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1088	SEQ;
1089
1090	// ===== l.xori r30,r10,0xfffffc06
1091	request [0].push_back (entry_t(
1092	0xafcafc06,x,y,z,
1093	0,0,0,0,0,0,
1094	TYPE_ALU,OPERATION_ALU_L_XOR,false,
1095	1,0xfffffc06, 1,10, 0,0, 0,0, 1,30, 0,0,
1096	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1097	SEQ;
1098
1099	// ===== l.sub r30,r10,r20
1100	request [0].push_back (entry_t(
1101	0xe3caa002,x,y,z,
1102	0,0,0,0,0,0,
1103	TYPE_ALU,OPERATION_ALU_L_SUB,false,
1104	0,0, 1,10, 1,20, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV,
1105	EXCEPTION_USE_RANGE,EVENT_TYPE_NONE));
1106	SEQ;
1107
1108	// ===== l.sys 0x3fa
1109	request [0].push_back (entry_t(
1110	0x200003fa,x,y,z,
1111	0,0,0,0,0,z,
1112	TYPE_SPECIAL,OPERATION_SPECIAL_L_SYS,false,
1113	0,0, 0,0, 0,0, 0,0, 0,0, 0,0,
1114	EXCEPTION_USE_SYSCALL,EVENT_TYPE_EXCEPTION));
1115	SEQ;
1116
1117	// ===== l.sys 0xfc06
1118	request [0].push_back (entry_t(
1119	0x2000fc06,x,y,z,
1120	0,0,0,0,0,z,
1121	TYPE_SPECIAL,OPERATION_SPECIAL_L_SYS,false,
1122	0,0, 0,0, 0,0, 0,0, 0,0, 0,0,
1123	EXCEPTION_USE_SYSCALL,EVENT_TYPE_EXCEPTION));
1124	SEQ;
1125
1126	// ===== l.trap 0x3fa
1127	request [0].push_back (entry_t(
1128	0x210003fa,x,y,z,
1129	0,0,0,0,0,0,
1130	TYPE_SPECIAL,OPERATION_SPECIAL_L_TRAP,false,
1131	1,0x3fa, 0,0, 0,0, 0,0, 0,0, 0,0,
1132	EXCEPTION_USE_TRAP,EVENT_TYPE_NONE));
1133	SEQ;
1134
1135	// ===== l.trap 0xfc06
1136	request [0].push_back (entry_t(
1137	0x2100fc06,x,y,z,
1138	0,0,0,0,0,0,
1139	TYPE_SPECIAL,OPERATION_SPECIAL_L_TRAP,false,
1140	1,0xfc06, 0,0, 0,0, 0,0, 0,0, 0,0,
1141	EXCEPTION_USE_TRAP,EVENT_TYPE_NONE));
1142	SEQ;
1143
1144	// ===== l.rfe
1145	request [0].push_back (entry_t(
1146	0x24000000,x,y,z,
1147	0,0,0,0,0,0,
1148	TYPE_SPECIAL,OPERATION_SPECIAL_L_RFE,false,
1149	0,0, 0,0, 0,0, 0,0, 0,0, 0,0,
1150	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1151	SEQ;
1152
1153	// ===== l.sfeq r10,r20
1154	request [0].push_back (entry_t(
1155	0xe40aa000,x,y,z,
1156	0,0,0,0,0,0,
1157	TYPE_TEST,OPERATION_TEST_L_SFEQ,false,
1158	0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1159	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1160	SEQ;
1161
1162	// ===== l.sfeqi r10,0x3fa
1163	request [0].push_back (entry_t(
1164	0xbc0a03fa,x,y,z,
1165	0,0,0,0,0,0,
1166	TYPE_TEST,OPERATION_TEST_L_SFEQ,false,
1167	1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1168	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1169	SEQ;
1170
1171	// ===== l.sfeqi r10,0xfffffc06
1172	request [0].push_back (entry_t(
1173	0xbc0afc06,x,y,z,
1174	0,0,0,0,0,0,
1175	TYPE_TEST,OPERATION_TEST_L_SFEQ,false,
1176	1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1177	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1178	SEQ;
1179
1180	// ===== l.sfne r10,r20
1181	request [0].push_back (entry_t(
1182	0xe42aa000,x,y,z,
1183	0,0,0,0,0,0,
1184	TYPE_TEST,OPERATION_TEST_L_SFNE,false,
1185	0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1186	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1187	SEQ;
1188
1189	// ===== l.sfnei r10,0x3fa
1190	request [0].push_back (entry_t(
1191	0xbc2a03fa,x,y,z,
1192	0,0,0,0,0,0,
1193	TYPE_TEST,OPERATION_TEST_L_SFNE,false,
1194	1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1195	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1196	SEQ;
1197
1198	// ===== l.sfnei r10,0xfffffc06
1199	request [0].push_back (entry_t(
1200	0xbc2afc06,x,y,z,
1201	0,0,0,0,0,0,
1202	TYPE_TEST,OPERATION_TEST_L_SFNE,false,
1203	1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1204	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1205	SEQ;
1206
1207	// ===== l.sfges r10,r20
1208	request [0].push_back (entry_t(
1209	0xe56aa000,x,y,z,
1210	0,0,0,0,0,0,
1211	TYPE_TEST,OPERATION_TEST_L_SFGES,false,
1212	0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1213	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1214	SEQ;
1215
1216	// ===== l.sfgesi r10,0x3fa
1217	request [0].push_back (entry_t(
1218	0xbd6a03fa,x,y,z,
1219	0,0,0,0,0,0,
1220	TYPE_TEST,OPERATION_TEST_L_SFGES,false,
1221	1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1222	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1223	SEQ;
1224
1225	// ===== l.sfgesi r10,0xfffffc06
1226	request [0].push_back (entry_t(
1227	0xbd6afc06,x,y,z,
1228	0,0,0,0,0,0,
1229	TYPE_TEST,OPERATION_TEST_L_SFGES,false,
1230	1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1231	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1232	SEQ;
1233
1234	// ===== l.sfgeu r10,r20
1235	request [0].push_back (entry_t(
1236	0xe46aa000,x,y,z,
1237	0,0,0,0,0,0,
1238	TYPE_TEST,OPERATION_TEST_L_SFGEU,false,
1239	0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1240	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1241	SEQ;
1242
1243	// ===== l.sfgeui r10,0x3fa
1244	request [0].push_back (entry_t(
1245	0xbc6a03fa,x,y,z,
1246	0,0,0,0,0,0,
1247	TYPE_TEST,OPERATION_TEST_L_SFGEU,false,
1248	1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1249	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1250	SEQ;
1251
1252	// ===== l.sfgeui r10,0xfffffc06
1253	request [0].push_back (entry_t(
1254	0xbc6afc06,x,y,z,
1255	0,0,0,0,0,0,
1256	TYPE_TEST,OPERATION_TEST_L_SFGEU,false,
1257	1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1258	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1259	SEQ;
1260
1261	// ===== l.sfgts r10,r20
1262	request [0].push_back (entry_t(
1263	0xe54aa000,x,y,z,
1264	0,0,0,0,0,0,
1265	TYPE_TEST,OPERATION_TEST_L_SFGTS,false,
1266	0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1267	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1268	SEQ;
1269
1270	// ===== l.sfgtsi r10,0x3fa
1271	request [0].push_back (entry_t(
1272	0xbd4a03fa,x,y,z,
1273	0,0,0,0,0,0,
1274	TYPE_TEST,OPERATION_TEST_L_SFGTS,false,
1275	1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1276	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1277	SEQ;
1278
1279	// ===== l.sfgtsi r10,0xfffffc06
1280	request [0].push_back (entry_t(
1281	0xbd4afc06,x,y,z,
1282	0,0,0,0,0,0,
1283	TYPE_TEST,OPERATION_TEST_L_SFGTS,false,
1284	1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1285	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1286	SEQ;
1287
1288	// ===== l.sfgtu r10,r20
1289	request [0].push_back (entry_t(
1290	0xe44aa000,x,y,z,
1291	0,0,0,0,0,0,
1292	TYPE_TEST,OPERATION_TEST_L_SFGTU,false,
1293	0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1294	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1295	SEQ;
1296
1297	// ===== l.sfgtui r10,0x3fa
1298	request [0].push_back (entry_t(
1299	0xbc4a03fa,x,y,z,
1300	0,0,0,0,0,0,
1301	TYPE_TEST,OPERATION_TEST_L_SFGTU,false,
1302	1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1303	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1304	SEQ;
1305
1306	// ===== l.sfgtui r10,0xfffffc06
1307	request [0].push_back (entry_t(
1308	0xbc4afc06,x,y,z,
1309	0,0,0,0,0,0,
1310	TYPE_TEST,OPERATION_TEST_L_SFGTU,false,
1311	1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1312	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1313	SEQ;
1314
1315	// ===== l.sfles r10,r20
1316	request [0].push_back (entry_t(
1317	0xe5aaa000,x,y,z,
1318	0,0,0,0,0,0,
1319	TYPE_TEST,OPERATION_TEST_L_SFLES,false,
1320	0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1321	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1322	SEQ;
1323
1324	// ===== l.sflesi r10,0x3fa
1325	request [0].push_back (entry_t(
1326	0xbdaa03fa,x,y,z,
1327	0,0,0,0,0,0,
1328	TYPE_TEST,OPERATION_TEST_L_SFLES,false,
1329	1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1330	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1331	SEQ;
1332
1333	// ===== l.sflesi r10,0xfffffc06
1334	request [0].push_back (entry_t(
1335	0xbdaafc06,x,y,z,
1336	0,0,0,0,0,0,
1337	TYPE_TEST,OPERATION_TEST_L_SFLES,false,
1338	1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1339	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1340	SEQ;
1341
1342	// ===== l.sfleu r10,r20
1343	request [0].push_back (entry_t(
1344	0xe4aaa000,x,y,z,
1345	0,0,0,0,0,0,
1346	TYPE_TEST,OPERATION_TEST_L_SFLEU,false,
1347	0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1348	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1349	SEQ;
1350
1351	// ===== l.sfleui r10,0x3fa
1352	request [0].push_back (entry_t(
1353	0xbcaa03fa,x,y,z,
1354	0,0,0,0,0,0,
1355	TYPE_TEST,OPERATION_TEST_L_SFLEU,false,
1356	1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1357	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1358	SEQ;
1359
1360	// ===== l.sfleui r10,0xfffffc06
1361	request [0].push_back (entry_t(
1362	0xbcaafc06,x,y,z,
1363	0,0,0,0,0,0,
1364	TYPE_TEST,OPERATION_TEST_L_SFLEU,false,
1365	1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1366	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1367	SEQ;
1368
1369	// ===== l.sflts r10,r20
1370	request [0].push_back (entry_t(
1371	0xe58aa000,x,y,z,
1372	0,0,0,0,0,0,
1373	TYPE_TEST,OPERATION_TEST_L_SFLTS,false,
1374	0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1375	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1376	SEQ;
1377
1378	// ===== l.sfltsi r10,0x3fa
1379	request [0].push_back (entry_t(
1380	0xbd8a03fa,x,y,z,
1381	0,0,0,0,0,0,
1382	TYPE_TEST,OPERATION_TEST_L_SFLTS,false,
1383	1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1384	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1385	SEQ;
1386
1387	// ===== l.sfltsi r10,0xfffffc06
1388	request [0].push_back (entry_t(
1389	0xbd8afc06,x,y,z,
1390	0,0,0,0,0,0,
1391	TYPE_TEST,OPERATION_TEST_L_SFLTS,false,
1392	1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1393	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1394	SEQ;
1395
1396	// ===== l.sfltu r10,r20
1397	request [0].push_back (entry_t(
1398	0xe48aa000,x,y,z,
1399	0,0,0,0,0,0,
1400	TYPE_TEST,OPERATION_TEST_L_SFLTU,false,
1401	0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1402	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1403	SEQ;
1404
1405	// ===== l.sfltui r10,0x3fa
1406	request [0].push_back (entry_t(
1407	0xbc8a03fa,x,y,z,
1408	0,0,0,0,0,0,
1409	TYPE_TEST,OPERATION_TEST_L_SFLTU,false,
1410	1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1411	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1412	SEQ;
1413
1414	// ===== l.sfltui r10,0xfffffc06
1415	request [0].push_back (entry_t(
1416	0xbc8afc06,x,y,z,
1417	0,0,0,0,0,0,
1418	TYPE_TEST,OPERATION_TEST_L_SFLTU,false,
1419	1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F,
1420	EXCEPTION_USE_NONE,EVENT_TYPE_NONE));
1421	SEQ;
1422
1423	for (uint32_t i=1; i<_param->_nb_context; i++)
1424	{
1425	request[i] = request [0];
1426	}
1427
1428	for (uint32_t i=0; i<_param->_nb_context; i++)
1429	{
1430	delay_slot_current [i] = false;
1431	delay_slot_next [i] = false;
1432	}
1433
1434	uint32_t nb_request = request[0].size() * _param->_nb_context;
1435
1436	while (nb_request > 0)
1437	{
1438	for (uint32_t i=0; i<_param->_nb_context; i++)
1439	{
1440	delay_slot_previous [i] = false;
1441
1442	in_CONTEXT_DECOD_ENABLE [i]->write((rand()%100)<percent_transaction_decod);
1443
1444	for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++)
1445	in_IFETCH_VAL [i][j]->write(0);
1446
1447	if ((rand()%100)<percent_transaction_ifetch)
1448	{
1449	list<entry_t>::iterator it = request [i].begin();
1450
1451	if (it!=request [i].end())
1452	{
1453	uint32_t lsb = (it->_address>>2)%_param->_nb_inst_fetch[i];
1454
1455	in_IFETCH_ADDRESS [i]->write(it->_address-(lsb<<2));
1456	in_IFETCH_BRANCH_STATE [i]->write(BRANCH_STATE_NONE);
1457	if (_param->_have_port_inst_ifetch_ptr)
1458	in_IFETCH_INST_IFETCH_PTR [i]->write(0);
1459
1460	// Alignement
1461	for (uint32_t j=lsb; j<_param->_nb_inst_fetch[i]; j++)
1462	{
1463	in_IFETCH_VAL [i][j]->write(1);
1464	in_IFETCH_INSTRUCTION [i][j]->write(it->_instruction);
1465	// in_IFETCH_ADDRESS_NEXT [i]->write(it->_address_next);
1466	if (it->_type == TYPE_BRANCH)
1467	in_IFETCH_BRANCH_STATE [i]->write(it->_branch_state);
1468	in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i]->write(it->_branch_update_prediction_id);
1469
1470	if ((it->_is_delay_slot) or
1471	((++it)==request [i].end()))
1472	break;
1473	}
1474	}
1475	}
1476	}
1477
1478	{
1479	bool previous_ack = true;
1480
1481	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
1482	{
1483	bool ack = previous_ack and ((rand()%100)<percent_transaction_decod);
1484	in_DECOD_ACK [i]->write(ack);
1485
1486	previous_ack = ack;
1487
1488	in_PREDICT_ACK [i]->write((rand()%100)<percent_transaction_predict);
1489	// in_PREDICT_CAN_CONTINUE [i]->write(0);
1490	}
1491	}
1492
1493	in_CONTEXT_EVENT_ACK->write((rand()%100)<percent_transaction_event);
1494
1495	SC_START(0);
1496
1497
1498	uint32_t nb_inst_ifetch = 0;
1499	for (uint32_t i=0; i<_param->_nb_context; i++)
1500	for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++)
1501	if (in_IFETCH_VAL[i][j]->read() and out_IFETCH_ACK[i][j]->read())
1502	{
1503	LABEL("IFETCH [%d][%d] : transaction",i,j);
1504	nb_inst_ifetch ++;
1505	}
1506
1507	uint32_t nb_inst_decod = 0;
1508	uint32_t find_event = false;
1509
1510	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
1511	if (out_DECOD_VAL[i]->read() and in_DECOD_ACK[i]->read())
1512	{
1513	Tcontext_t context = (_param->_have_port_context_id)?out_DECOD_CONTEXT_ID[i]->read():0;
1514
1515	LABEL("DECOD [%d] : transaction",i );
1516	LABEL(" * context : %d",context);
1517
1518	if (_param->_have_port_depth)
1519	TEST(Tdepth_t , out_DECOD_DEPTH [i]->read(), request [context].front()._depth );
1520	TEST(Ttype_t , out_DECOD_TYPE [i]->read(), request [context].front()._type );
1521	TEST(Toperation_t , out_DECOD_OPERATION [i]->read(), request [context].front()._operation );
1522	TEST(Tcontrol_t , out_DECOD_IS_DELAY_SLOT [i]->read(), request [context].front()._is_delay_slot);
1523	TEST(Tcontrol_t , delay_slot_current [context] , request [context].front()._is_delay_slot);
1524	TEST(Tgeneral_data_t , out_DECOD_ADDRESS [i]->read(), request [context].front()._address );
1525	TEST(Tcontrol_t , out_DECOD_HAS_IMMEDIAT [i]->read(), request [context].front()._has_immediat );
1526	if (request [context].front()._has_immediat)
1527	TEST(Tgeneral_data_t , out_DECOD_IMMEDIAT [i]->read(), request [context].front()._immediat );
1528	TEST(Tcontrol_t , out_DECOD_READ_RA [i]->read(), request [context].front()._read_ra );
1529	if (request [context].front()._read_ra)
1530	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RA [i]->read(), request [context].front()._num_reg_ra );
1531	TEST(Tcontrol_t , out_DECOD_READ_RB [i]->read(), request [context].front()._read_rb );
1532	if (request [context].front()._read_rb)
1533	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RB [i]->read(), request [context].front()._num_reg_rb );
1534	TEST(Tcontrol_t , out_DECOD_READ_RC [i]->read(), request [context].front()._read_rc );
1535	if (request [context].front()._read_rc)
1536	TEST(Tspecial_address_t, out_DECOD_NUM_REG_RC [i]->read(), request [context].front()._num_reg_rc );
1537	TEST(Tcontrol_t , out_DECOD_WRITE_RD [i]->read(), request [context].front()._write_rd );
1538	if (request [context].front()._write_rd)
1539	TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RD [i]->read(), request [context].front()._num_reg_rd );
1540	TEST(Tcontrol_t , out_DECOD_WRITE_RE [i]->read(), request [context].front()._write_re );
1541	if (request [context].front()._write_re)
1542	TEST(Tspecial_address_t, out_DECOD_NUM_REG_RE [i]->read(), request [context].front()._num_reg_re );
1543	TEST(Texception_t , out_DECOD_EXCEPTION_USE [i]->read(), request [context].front()._exception_use);
1544
1545	if (request [context].front()._type == TYPE_BRANCH)
1546	{
1547	delay_slot_next [context] = true;
1548
1549	TEST(Tcontrol_t, out_PREDICT_VAL[i]->read(), true);
1550	TEST(Tcontrol_t, in_PREDICT_ACK[i]->read(), true);
1551
1552	LABEL("PREDICT [%d] : transaction",i );
1553
1554	if (_param->_have_port_context_id)
1555	TEST(Tcontext_t , out_PREDICT_CONTEXT_ID [i]->read(), context);
1556	TEST(Tcontrol_t , out_PREDICT_MATCH_INST_IFETCH_PTR [i]->read(),((request [context].front()._address>>2)%_param->_nb_inst_fetch[context]) == 0);
1557	TEST(Tbranch_state_t , out_PREDICT_BRANCH_STATE [i]->read(), request [context].front()._branch_state );
1558	if (_param->_have_port_branch_update_prediction_id)
1559	TEST(Tprediction_ptr_t , out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i]->read(), request [context].front()._branch_update_prediction_id);
1560	TEST(Tbranch_condition_t, out_PREDICT_BRANCH_CONDITION [i]->read(), request [context].front()._branch_condition );
1561	// TEST(Tcontrol_t , out_PREDICT_BRANCH_STACK_WRITE [i]->read(), request [context].front()._branch_stack_write );
1562	TEST(Tcontrol_t , out_PREDICT_BRANCH_DIRECTION [i]->read(), request [context].front()._branch_direction );
1563	TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_SRC [i]->read(), request [context].front()._address );
1564	TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_DEST [i]->read(), request [context].front()._branch_address_dest );
1565	}
1566	else
1567	{
1568	TEST(Tcontrol_t, out_PREDICT_VAL[i]->read(), false);
1569	}
1570
1571	TEST(bool, find_event, false); // can continue decod after event
1572	if (request [context].front()._context_event_type != EVENT_TYPE_NONE)
1573	{
1574	find_event = true;
1575
1576	LABEL("CONTEXT_EVENT : transaction");
1577
1578	if (_param->_have_port_context_id)
1579	TEST(Tcontext_t ,out_CONTEXT_EVENT_CONTEXT_ID ->read(), context);
1580	TEST(Tevent_type_t ,out_CONTEXT_EVENT_TYPE ->read(), request [context].front()._context_event_type);
1581	TEST(Tcontrol_t ,out_CONTEXT_EVENT_IS_DELAY_SLOT->read(), request [context].front()._is_delay_slot);
1582	TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS ->read(), request [context].front()._address );
1583	TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS_EPCR ->read(), request [context].front()._address_next );
1584
1585	}
1586
1587	TEST(bool, delay_slot_previous [context], false); // can't continue
1588	delay_slot_previous [context] = delay_slot_current [context];
1589	delay_slot_current [context] = delay_slot_next [context];
1590	delay_slot_next [context] = false;
1591
1592	request [context].pop_front();
1593	nb_inst_decod ++;
1594	nb_request --;
1595	}
1596
1597	TEST(bool, (out_CONTEXT_EVENT_VAL->read() and in_CONTEXT_EVENT_ACK->read()), find_event);
1598	TEST(uint32_t, nb_inst_decod, nb_inst_ifetch);
1599
1600	SC_START(1);
1601	}
1602	}
1603
1604	/********************************************************
1605	* Simulation - End
1606	********************************************************/
1607
1608	TEST_OK ("End of Simulation");
1609	delete _time;
1610
1611	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
1612
1613	delete in_CLOCK;
1614	delete in_NRESET;
1615
1616	delete [] in_IFETCH_VAL ;
1617	delete [] out_IFETCH_ACK ;
1618	delete [] in_IFETCH_INSTRUCTION ;
1619	delete [] in_IFETCH_CONTEXT_ID ;
1620	delete [] in_IFETCH_ADDRESS ;
1621	// delete [] in_IFETCH_ADDRESS_NEXT ;
1622	delete [] in_IFETCH_INST_IFETCH_PTR ;
1623	delete [] in_IFETCH_BRANCH_STATE ;
1624	delete [] in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;
1625
1626	delete [] out_DECOD_VAL ;
1627	delete [] in_DECOD_ACK ;
1628	delete [] out_DECOD_CONTEXT_ID ;
1629	delete [] out_DECOD_DEPTH ;
1630	delete [] out_DECOD_TYPE ;
1631	delete [] out_DECOD_OPERATION ;
1632	delete [] out_DECOD_IS_DELAY_SLOT ;
1633	delete [] out_DECOD_ADDRESS ;
1634	delete [] out_DECOD_HAS_IMMEDIAT ;
1635	delete [] out_DECOD_IMMEDIAT ;
1636	delete [] out_DECOD_READ_RA ;
1637	delete [] out_DECOD_NUM_REG_RA ;
1638	delete [] out_DECOD_READ_RB ;
1639	delete [] out_DECOD_NUM_REG_RB ;
1640	delete [] out_DECOD_READ_RC ;
1641	delete [] out_DECOD_NUM_REG_RC ;
1642	delete [] out_DECOD_WRITE_RD ;
1643	delete [] out_DECOD_NUM_REG_RD ;
1644	delete [] out_DECOD_WRITE_RE ;
1645	delete [] out_DECOD_NUM_REG_RE ;
1646	delete [] out_DECOD_EXCEPTION_USE ;
1647
1648	delete [] out_PREDICT_VAL ;
1649	delete [] in_PREDICT_ACK ;
1650	delete [] out_PREDICT_CONTEXT_ID ;
1651	delete [] out_PREDICT_MATCH_INST_IFETCH_PTR ;
1652	delete [] out_PREDICT_BRANCH_STATE ;
1653	delete [] out_PREDICT_BRANCH_UPDATE_PREDICTION_ID;
1654	delete [] out_PREDICT_BRANCH_CONDITION ;
1655	// delete [] out_PREDICT_BRANCH_STACK_WRITE ;
1656	delete [] out_PREDICT_BRANCH_DIRECTION ;
1657	delete [] out_PREDICT_ADDRESS_SRC ;
1658	delete [] out_PREDICT_ADDRESS_DEST ;
1659	// delete [] in_PREDICT_CAN_CONTINUE ;
1660
1661	delete [] in_CONTEXT_DECOD_ENABLE ;
1662	delete [] in_CONTEXT_DEPTH ;
1663
1664	delete out_CONTEXT_EVENT_VAL ;
1665	delete in_CONTEXT_EVENT_ACK ;
1666	delete out_CONTEXT_EVENT_CONTEXT_ID ;
1667	delete out_CONTEXT_EVENT_TYPE ;
1668	delete out_CONTEXT_EVENT_IS_DELAY_SLOT ;
1669	delete out_CONTEXT_EVENT_ADDRESS ;
1670	delete out_CONTEXT_EVENT_ADDRESS_EPCR ;
1671	#endif
1672
1673	delete _Decod;
1674	#ifdef STATISTICS
1675	delete _parameters_statistics;
1676	#endif
1677	}

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