1 | /* |
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2 | * $Id: test.cpp 86 2008-05-14 17:08:56Z rosiere $ |
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3 | * |
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4 | * [ Description ] |
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5 | * |
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6 | * Test |
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7 | */ |
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8 | |
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9 | #define NB_ITERATION 1 |
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10 | #define CYCLE_MAX (2048*NB_ITERATION) |
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11 | |
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12 | #include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/include/test.h" |
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13 | #include <list> |
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14 | #include "Common/include/Test.h" |
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15 | #include "Behavioural/include/Allocation.h" |
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16 | |
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17 | class entry_t |
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18 | { |
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19 | //public : Tcontrol_t _val ; |
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20 | public : Tinstruction_t _instruction ; |
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21 | //public : Tcontext_t _context_id ; |
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22 | public : Tgeneral_address_t _address_previous ; |
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23 | public : Tgeneral_address_t _address ; |
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24 | public : Tgeneral_address_t _address_next ; |
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25 | public : Tbranch_state_t _branch_state ; |
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26 | public : Tprediction_ptr_t _branch_update_prediction_id; |
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27 | public : Tbranch_condition_t _branch_condition ; |
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28 | //public : Tcontrol_t _branch_stack_write ; |
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29 | public : Tcontrol_t _branch_direction ; |
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30 | public : Tgeneral_address_t _branch_address_dest ; |
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31 | public : Tdepth_t _depth ; |
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32 | public : Ttype_t _type ; |
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33 | public : Toperation_t _operation ; |
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34 | public : Tcontrol_t _is_delay_slot ; |
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35 | public : Tcontrol_t _has_immediat ; |
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36 | public : Tgeneral_data_t _immediat ; |
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37 | public : Tcontrol_t _read_ra ; |
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38 | public : Tgeneral_address_t _num_reg_ra ; |
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39 | public : Tcontrol_t _read_rb ; |
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40 | public : Tgeneral_address_t _num_reg_rb ; |
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41 | public : Tcontrol_t _read_rc ; |
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42 | public : Tspecial_address_t _num_reg_rc ; |
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43 | public : Tcontrol_t _write_rd ; |
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44 | public : Tgeneral_address_t _num_reg_rd ; |
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45 | public : Tcontrol_t _write_re ; |
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46 | public : Tspecial_address_t _num_reg_re ; |
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47 | public : Texception_t _exception_use ; |
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48 | public : Tevent_type_t _context_event_type ; |
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49 | |
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50 | public : entry_t ( |
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51 | // Tcontrol_t val , |
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52 | Tinstruction_t instruction , |
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53 | // Tcontext_t context_id , |
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54 | Tgeneral_address_t address_previous , |
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55 | Tgeneral_address_t address , |
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56 | Tgeneral_address_t address_next , |
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57 | Tbranch_state_t branch_state , |
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58 | Tprediction_ptr_t branch_update_prediction_id, |
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59 | Tbranch_condition_t branch_condition , |
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60 | // Tcontrol_t branch_stack_write , |
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61 | Tcontrol_t branch_direction , |
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62 | Tgeneral_address_t branch_address_dest , |
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63 | Tdepth_t depth , |
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64 | Ttype_t type , |
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65 | Toperation_t operation , |
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66 | Tcontrol_t is_delay_slot , |
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67 | Tcontrol_t has_immediat , |
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68 | Tgeneral_data_t immediat , |
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69 | Tcontrol_t read_ra , |
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70 | Tgeneral_address_t num_reg_ra , |
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71 | Tcontrol_t read_rb , |
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72 | Tgeneral_address_t num_reg_rb , |
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73 | Tcontrol_t read_rc , |
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74 | Tspecial_address_t num_reg_rc , |
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75 | Tcontrol_t write_rd , |
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76 | Tgeneral_address_t num_reg_rd , |
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77 | Tcontrol_t write_re , |
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78 | Tspecial_address_t num_reg_re , |
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79 | Texception_t exception_use , |
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80 | Tevent_type_t context_event_type ) |
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81 | { |
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82 | // _val = val ; |
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83 | _instruction = instruction ; |
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84 | // _context_id = context_id ; |
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85 | _address_previous = address_previous ; |
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86 | _address = address ; |
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87 | _address_next = address_next ; |
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88 | _branch_state = branch_state ; |
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89 | _branch_update_prediction_id = branch_update_prediction_id; |
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90 | _branch_condition = branch_condition ; |
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91 | // _branch_stack_write = branch_stack_write ; |
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92 | _branch_direction = branch_direction ; |
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93 | _branch_address_dest = branch_address_dest ; |
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94 | _depth = depth ; |
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95 | _type = type ; |
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96 | _operation = operation ; |
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97 | _is_delay_slot = is_delay_slot ; |
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98 | _has_immediat = has_immediat ; |
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99 | _immediat = immediat ; |
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100 | _read_ra = read_ra ; |
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101 | _num_reg_ra = num_reg_ra ; |
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102 | _read_rb = read_rb ; |
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103 | _num_reg_rb = num_reg_rb ; |
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104 | _read_rc = read_rc ; |
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105 | _num_reg_rc = num_reg_rc ; |
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106 | _write_rd = write_rd ; |
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107 | _num_reg_rd = num_reg_rd ; |
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108 | _write_re = write_re ; |
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109 | _num_reg_re = num_reg_re ; |
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110 | _exception_use = exception_use ; |
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111 | _context_event_type = context_event_type ; |
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112 | } |
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113 | }; |
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114 | |
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115 | |
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116 | void test (string name, |
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117 | morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Parameters * _param) |
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118 | { |
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119 | msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); |
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120 | |
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121 | #ifdef STATISTICS |
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122 | morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50); |
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123 | #endif |
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124 | |
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125 | Decod * _Decod = new Decod |
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126 | (name.c_str(), |
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127 | #ifdef STATISTICS |
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128 | _parameters_statistics, |
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129 | #endif |
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130 | _param, |
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131 | USE_ALL); |
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132 | |
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133 | #ifdef SYSTEMC |
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134 | /********************************************************************* |
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135 | * Déclarations des signaux |
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136 | *********************************************************************/ |
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137 | string rename; |
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138 | |
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139 | sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); |
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140 | sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); |
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141 | |
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142 | ALLOC2_SC_SIGNAL( in_IFETCH_VAL ," in_IFETCH_VAL ",Tcontrol_t ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); |
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143 | ALLOC2_SC_SIGNAL(out_IFETCH_ACK ,"out_IFETCH_ACK ",Tcontrol_t ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); |
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144 | ALLOC2_SC_SIGNAL( in_IFETCH_INSTRUCTION ," in_IFETCH_INSTRUCTION ",Tinstruction_t ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); |
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145 | ALLOC1_SC_SIGNAL( in_IFETCH_CONTEXT_ID ," in_IFETCH_CONTEXT_ID ",Tcontext_t ,_param->_nb_context); |
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146 | ALLOC1_SC_SIGNAL( in_IFETCH_ADDRESS ," in_IFETCH_ADDRESS ",Tgeneral_address_t ,_param->_nb_context); |
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147 | // ALLOC1_SC_SIGNAL( in_IFETCH_ADDRESS_NEXT ," in_IFETCH_ADDRESS_NEXT ",Tgeneral_address_t ,_param->_nb_context); |
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148 | ALLOC1_SC_SIGNAL( in_IFETCH_INST_IFETCH_PTR ," in_IFETCH_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ,_param->_nb_context); |
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149 | ALLOC1_SC_SIGNAL( in_IFETCH_BRANCH_STATE ," in_IFETCH_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_context); |
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150 | ALLOC1_SC_SIGNAL( in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ," in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_context); |
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151 | ALLOC1_SC_SIGNAL(out_DECOD_VAL ,"out_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod); |
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152 | ALLOC1_SC_SIGNAL( in_DECOD_ACK ," in_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod); |
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153 | ALLOC1_SC_SIGNAL(out_DECOD_CONTEXT_ID ,"out_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod); |
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154 | ALLOC1_SC_SIGNAL(out_DECOD_DEPTH ,"out_DECOD_DEPTH ",Tdepth_t ,_param->_nb_inst_decod); |
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155 | ALLOC1_SC_SIGNAL(out_DECOD_TYPE ,"out_DECOD_TYPE ",Ttype_t ,_param->_nb_inst_decod); |
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156 | ALLOC1_SC_SIGNAL(out_DECOD_OPERATION ,"out_DECOD_OPERATION ",Toperation_t ,_param->_nb_inst_decod); |
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157 | ALLOC1_SC_SIGNAL(out_DECOD_IS_DELAY_SLOT ,"out_DECOD_IS_DELAY_SLOT ",Tcontrol_t ,_param->_nb_inst_decod); |
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158 | ALLOC1_SC_SIGNAL(out_DECOD_ADDRESS ,"out_DECOD_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_decod); |
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159 | ALLOC1_SC_SIGNAL(out_DECOD_HAS_IMMEDIAT ,"out_DECOD_HAS_IMMEDIAT ",Tcontrol_t ,_param->_nb_inst_decod); |
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160 | ALLOC1_SC_SIGNAL(out_DECOD_IMMEDIAT ,"out_DECOD_IMMEDIAT ",Tgeneral_data_t ,_param->_nb_inst_decod); |
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161 | ALLOC1_SC_SIGNAL(out_DECOD_READ_RA ,"out_DECOD_READ_RA ",Tcontrol_t ,_param->_nb_inst_decod); |
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162 | ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RA ,"out_DECOD_NUM_REG_RA ",Tgeneral_address_t ,_param->_nb_inst_decod); |
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163 | ALLOC1_SC_SIGNAL(out_DECOD_READ_RB ,"out_DECOD_READ_RB ",Tcontrol_t ,_param->_nb_inst_decod); |
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164 | ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RB ,"out_DECOD_NUM_REG_RB ",Tgeneral_address_t ,_param->_nb_inst_decod); |
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165 | ALLOC1_SC_SIGNAL(out_DECOD_READ_RC ,"out_DECOD_READ_RC ",Tcontrol_t ,_param->_nb_inst_decod); |
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166 | ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RC ,"out_DECOD_NUM_REG_RC ",Tspecial_address_t ,_param->_nb_inst_decod); |
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167 | ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RD ,"out_DECOD_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_decod); |
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168 | ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RD ,"out_DECOD_NUM_REG_RD ",Tgeneral_address_t ,_param->_nb_inst_decod); |
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169 | ALLOC1_SC_SIGNAL(out_DECOD_WRITE_RE ,"out_DECOD_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_decod); |
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170 | ALLOC1_SC_SIGNAL(out_DECOD_NUM_REG_RE ,"out_DECOD_NUM_REG_RE ",Tspecial_address_t ,_param->_nb_inst_decod); |
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171 | ALLOC1_SC_SIGNAL(out_DECOD_EXCEPTION_USE ,"out_DECOD_EXCEPTION_USE ",Texception_t ,_param->_nb_inst_decod); |
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172 | ALLOC1_SC_SIGNAL(out_PREDICT_VAL ,"out_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_decod); |
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173 | ALLOC1_SC_SIGNAL( in_PREDICT_ACK ," in_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_decod); |
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174 | ALLOC1_SC_SIGNAL(out_PREDICT_CONTEXT_ID ,"out_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod); |
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175 | ALLOC1_SC_SIGNAL(out_PREDICT_MATCH_INST_IFETCH_PTR ,"out_PREDICT_MATCH_INST_IFETCH_PTR ",Tcontrol_t ,_param->_nb_inst_decod); |
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176 | ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,"out_PREDICT_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_inst_decod); |
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177 | ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ,_param->_nb_inst_decod); |
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178 | ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_CONDITION ,"out_PREDICT_BRANCH_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod); |
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179 | // ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STACK_WRITE ,"out_PREDICT_BRANCH_STACK_WRITE ",Tcontrol_t ,_param->_nb_inst_decod); |
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180 | ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_DIRECTION ,"out_PREDICT_BRANCH_DIRECTION ",Tcontrol_t ,_param->_nb_inst_decod); |
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181 | ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod); |
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182 | ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_decod); |
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183 | // ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE ," in_PREDICT_CAN_CONTINUE ",Tcontrol_t ,_param->_nb_inst_decod); |
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184 | ALLOC1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE ," in_CONTEXT_DECOD_ENABLE ",Tcontrol_t ,_param->_nb_context); |
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185 | ALLOC1_SC_SIGNAL( in_CONTEXT_DEPTH ," in_CONTEXT_DEPTH ",Tdepth_t ,_param->_nb_context); |
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186 | ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_VAL ,"out_CONTEXT_EVENT_VAL ",Tcontrol_t ); |
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187 | ALLOC_SC_SIGNAL ( in_CONTEXT_EVENT_ACK ," in_CONTEXT_EVENT_ACK ",Tcontrol_t ); |
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188 | ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_CONTEXT_ID ,"out_CONTEXT_EVENT_CONTEXT_ID ",Tcontext_t ); |
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189 | ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_TYPE ,"out_CONTEXT_EVENT_TYPE ",Tevent_type_t ); |
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190 | ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_IS_DELAY_SLOT ,"out_CONTEXT_EVENT_IS_DELAY_SLOT ",Tcontrol_t ); |
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191 | ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_ADDRESS ,"out_CONTEXT_EVENT_ADDRESS ",Tgeneral_data_t ); |
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192 | ALLOC_SC_SIGNAL (out_CONTEXT_EVENT_ADDRESS_EPCR ,"out_CONTEXT_EVENT_ADDRESS_EPCR ",Tgeneral_data_t ); |
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193 | |
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194 | /******************************************************** |
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195 | * Instanciation |
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196 | ********************************************************/ |
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197 | |
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198 | msg(_("<%s> : Instanciation of _Decod.\n"),name.c_str()); |
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199 | |
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200 | (*(_Decod->in_CLOCK)) (*(in_CLOCK)); |
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201 | (*(_Decod->in_NRESET)) (*(in_NRESET)); |
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202 | |
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203 | INSTANCE2_SC_SIGNAL(_Decod, in_IFETCH_VAL ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); |
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204 | INSTANCE2_SC_SIGNAL(_Decod,out_IFETCH_ACK ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); |
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205 | INSTANCE2_SC_SIGNAL(_Decod, in_IFETCH_INSTRUCTION ,_param->_nb_context,_param->_nb_inst_fetch[alloc_signal_it1]); |
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206 | if (_param->_have_port_context_id) |
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207 | INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_CONTEXT_ID ,_param->_nb_context); |
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208 | INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_ADDRESS ,_param->_nb_context); |
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209 | // INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_ADDRESS_NEXT ,_param->_nb_context); |
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210 | if (_param->_have_port_inst_ifetch_ptr) |
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211 | INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context); |
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212 | INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_BRANCH_STATE ,_param->_nb_context); |
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213 | if (_param->_have_port_branch_update_prediction_id) |
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214 | INSTANCE1_SC_SIGNAL(_Decod, in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context); |
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215 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_VAL ,_param->_nb_inst_decod); |
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216 | INSTANCE1_SC_SIGNAL(_Decod, in_DECOD_ACK ,_param->_nb_inst_decod); |
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217 | if (_param->_have_port_context_id) |
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218 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_CONTEXT_ID ,_param->_nb_inst_decod); |
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219 | if (_param->_have_port_depth) |
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220 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_DEPTH ,_param->_nb_inst_decod); |
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221 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_TYPE ,_param->_nb_inst_decod); |
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222 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_OPERATION ,_param->_nb_inst_decod); |
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223 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_IS_DELAY_SLOT ,_param->_nb_inst_decod); |
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224 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_ADDRESS ,_param->_nb_inst_decod); |
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225 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_HAS_IMMEDIAT ,_param->_nb_inst_decod); |
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226 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_IMMEDIAT ,_param->_nb_inst_decod); |
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227 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_READ_RA ,_param->_nb_inst_decod); |
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228 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RA ,_param->_nb_inst_decod); |
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229 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_READ_RB ,_param->_nb_inst_decod); |
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230 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RB ,_param->_nb_inst_decod); |
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231 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_READ_RC ,_param->_nb_inst_decod); |
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232 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RC ,_param->_nb_inst_decod); |
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233 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_WRITE_RD ,_param->_nb_inst_decod); |
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234 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RD ,_param->_nb_inst_decod); |
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235 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_WRITE_RE ,_param->_nb_inst_decod); |
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236 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_NUM_REG_RE ,_param->_nb_inst_decod); |
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237 | INSTANCE1_SC_SIGNAL(_Decod,out_DECOD_EXCEPTION_USE ,_param->_nb_inst_decod); |
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238 | INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_VAL ,_param->_nb_inst_decod); |
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239 | INSTANCE1_SC_SIGNAL(_Decod, in_PREDICT_ACK ,_param->_nb_inst_decod); |
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240 | if (_param->_have_port_context_id) |
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241 | INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_CONTEXT_ID ,_param->_nb_inst_decod); |
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242 | INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_MATCH_INST_IFETCH_PTR ,_param->_nb_inst_decod); |
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243 | INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_STATE ,_param->_nb_inst_decod); |
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244 | if (_param->_have_port_branch_update_prediction_id) |
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245 | INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_inst_decod); |
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246 | INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_CONDITION ,_param->_nb_inst_decod); |
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247 | // INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_STACK_WRITE ,_param->_nb_inst_decod); |
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248 | INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_BRANCH_DIRECTION ,_param->_nb_inst_decod); |
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249 | INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod); |
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250 | INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod); |
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251 | // INSTANCE1_SC_SIGNAL(_Decod, in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod); |
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252 | INSTANCE1_SC_SIGNAL(_Decod, in_CONTEXT_DECOD_ENABLE ,_param->_nb_context); |
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253 | if (_param->_have_port_depth) |
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254 | INSTANCE1_SC_SIGNAL(_Decod, in_CONTEXT_DEPTH ,_param->_nb_context); |
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255 | INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_VAL ); |
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256 | INSTANCE_SC_SIGNAL (_Decod, in_CONTEXT_EVENT_ACK ); |
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257 | if (_param->_have_port_context_id) |
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258 | INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_CONTEXT_ID ); |
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259 | INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_TYPE ); |
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260 | INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_IS_DELAY_SLOT ); |
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261 | INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_ADDRESS ); |
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262 | INSTANCE_SC_SIGNAL (_Decod,out_CONTEXT_EVENT_ADDRESS_EPCR ); |
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263 | |
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264 | msg(_("<%s> : Start Simulation ............\n"),name.c_str()); |
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265 | |
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266 | Time * _time = new Time(); |
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267 | |
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268 | /******************************************************** |
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269 | * Simulation - Begin |
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270 | ********************************************************/ |
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271 | |
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272 | // Initialisation |
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273 | |
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274 | const uint32_t seed = 0; |
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275 | //const uint32_t seed = static_cast<uint32_t>(time(NULL)); |
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276 | |
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277 | const int32_t percent_transaction_ifetch = 75; |
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278 | const int32_t percent_transaction_decod = 75; |
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279 | const int32_t percent_transaction_predict = 75; |
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280 | const int32_t percent_transaction_event = 75; |
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281 | |
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282 | srand(seed); |
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283 | |
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284 | SC_START(0); |
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285 | LABEL("Initialisation"); |
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286 | |
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287 | LABEL("Reset"); |
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288 | in_NRESET->write(0); |
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289 | SC_START(5); |
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290 | in_NRESET->write(1); |
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291 | |
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292 | LABEL("Loop of Test"); |
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293 | |
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294 | for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) |
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295 | { |
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296 | LABEL("Iteration %d",iteration); |
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297 | |
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298 | list<entry_t> request [_param->_nb_context]; |
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299 | |
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300 | uint32_t w; |
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301 | uint32_t x = (0x100>>2)-1; |
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302 | uint32_t y = (0x100>>2); |
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303 | uint32_t z = (0x100>>2)+1; |
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304 | |
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305 | uint32_t delay_slot_previous [_param->_nb_context]; |
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306 | uint32_t delay_slot_current [_param->_nb_context]; |
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307 | uint32_t delay_slot_next [_param->_nb_context]; |
---|
308 | |
---|
309 | #define SEQ do {x=y; y=z; z+=1; LABEL("%.8x - previous : 0x%x (%d), current : 0x%x (%d), next : 0x%x (%d)",request [0].back()._instruction, x,x,y,y,z,z);} while(0); |
---|
310 | #define JMP(j) do {x=y; y=z; z =j; LABEL("%.8x - previous : 0x%x (%d), current : 0x%x (%d), next : 0x%x (%d)",request [0].back()._instruction, x,x,y,y,z,z);} while(0); |
---|
311 | |
---|
312 | // ===== l.add r15, r4 , r8 |
---|
313 | request [0].push_back (entry_t( |
---|
314 | //instruction,address_previous,address,address_next |
---|
315 | 0xe1e44000,x,y,z, |
---|
316 | //branch_state,branch_update_prediction_id,branch_condition,branch_stack_write,branch_direction, branch_address_dest |
---|
317 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0,0x0, |
---|
318 | //depth,type,operation,is_delay_slot |
---|
319 | 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, |
---|
320 | //has_immediat,immediat,read_ra,reg_ra,read_rb,reg_rb,read_rc,reg_rc,write_rd,reg_rd,write_re,reg_re |
---|
321 | 0,0x00000000,1, 4,1, 8,0,0 ,1,15,1,SPR_LOGIC_SR_CY_OV, |
---|
322 | //exception_use,context_event_type |
---|
323 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
324 | SEQ; |
---|
325 | |
---|
326 | // ===== l.addc r15, r4 , r31 |
---|
327 | request [0].push_back (entry_t( |
---|
328 | 0xe1e4f801,x,y,z, |
---|
329 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0,0x0, |
---|
330 | 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, |
---|
331 | 0,0x00000000,1, 4,1,31,1,SPR_LOGIC_SR_CY_OV,1,15,1,SPR_LOGIC_SR_CY_OV, |
---|
332 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
333 | SEQ; |
---|
334 | |
---|
335 | // ===== l.addi r7 , r12, -1 |
---|
336 | request [0].push_back (entry_t( |
---|
337 | 0x9cecffff,x,y,z, |
---|
338 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
339 | 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, |
---|
340 | 1,0xffffffff,1,12,0, 0,0,0 ,1,7 ,1,SPR_LOGIC_SR_CY_OV, |
---|
341 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
342 | SEQ; |
---|
343 | |
---|
344 | // ===== l.addi r8 , r17, 0 |
---|
345 | request [0].push_back (entry_t( |
---|
346 | 0x9d110000,x,y,z, |
---|
347 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
348 | 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, |
---|
349 | 1,0x00000000,1,17,0, 0,0,0 ,1,8 ,1,SPR_LOGIC_SR_CY_OV, |
---|
350 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
351 | SEQ; |
---|
352 | |
---|
353 | // ===== l.addi r21, r7 , 1981 |
---|
354 | request [0].push_back (entry_t( |
---|
355 | 0x9ea707bd,x,y,z, |
---|
356 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
357 | 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, |
---|
358 | 1,0x000007bd,1, 7,0, 0,0,0 ,1,21,1,SPR_LOGIC_SR_CY_OV, |
---|
359 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
360 | SEQ; |
---|
361 | |
---|
362 | // ===== l.addic r7 , r12, -1 |
---|
363 | request [0].push_back (entry_t( |
---|
364 | 0xa0ecffff,x,y,z, |
---|
365 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
366 | 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, |
---|
367 | 1,0xffffffff,1,12,0, 0,1,SPR_LOGIC_SR_CY_OV,1,7 ,1,SPR_LOGIC_SR_CY_OV, |
---|
368 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
369 | SEQ; |
---|
370 | |
---|
371 | // ===== l.addic r8 , r17, 0 |
---|
372 | request [0].push_back (entry_t( |
---|
373 | 0xa1110000,x,y,z, |
---|
374 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
375 | 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, |
---|
376 | 1,0x00000000,1,17,0, 0,1,SPR_LOGIC_SR_CY_OV,1,8 ,1,SPR_LOGIC_SR_CY_OV, |
---|
377 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
378 | SEQ; |
---|
379 | |
---|
380 | // ===== l.addic r21, r7 , 1981 |
---|
381 | request [0].push_back (entry_t( |
---|
382 | 0xa2a707bd,x,y,z, |
---|
383 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
384 | 0,TYPE_ALU,OPERATION_ALU_L_ADD,false, |
---|
385 | 1,0x000007bd,1, 7,0, 0,1,SPR_LOGIC_SR_CY_OV,1,21,1,SPR_LOGIC_SR_CY_OV, |
---|
386 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
387 | SEQ; |
---|
388 | |
---|
389 | // ===== l.and r24, r0 , r14 |
---|
390 | request [0].push_back (entry_t( |
---|
391 | 0xe3007003,x,y,z, |
---|
392 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
393 | 0,TYPE_ALU,OPERATION_ALU_L_AND,false, |
---|
394 | 0,0x0 ,1, 0,1,14,0,0 ,1,24,0,0 , |
---|
395 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
396 | SEQ; |
---|
397 | |
---|
398 | // ===== l.andi r24, r4 , 1981 |
---|
399 | request [0].push_back (entry_t( |
---|
400 | 0xa70407bd,x,y,z, |
---|
401 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
402 | 0,TYPE_ALU,OPERATION_ALU_L_AND,false, |
---|
403 | 1,0x000007bd,1, 4,0,0 ,0,0 ,1,24,0,0 , |
---|
404 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
405 | SEQ; |
---|
406 | |
---|
407 | // ===== l.bf 11 |
---|
408 | w = y+(11<<2); |
---|
409 | request [0].push_back (entry_t( |
---|
410 | 0x1000000b,x,y,z, |
---|
411 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_SET,0, w, |
---|
412 | 0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_F,false, |
---|
413 | 1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 , |
---|
414 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
415 | JMP(w); |
---|
416 | |
---|
417 | // ===== l.cmov r30, r10, r20 |
---|
418 | request [0].push_back (entry_t( |
---|
419 | 0xe3caa00e,x,y,z, |
---|
420 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
421 | 0,TYPE_MOVE,OPERATION_MOVE_L_CMOV,true, |
---|
422 | 0,0x0,1,10,1,20,1,SPR_LOGIC_SR_F ,1,30,0,0 , |
---|
423 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
424 | SEQ; |
---|
425 | |
---|
426 | // ===== l.div r30,r10,r20 |
---|
427 | request [0].push_back (entry_t( |
---|
428 | 0xe3caa309,x,y,z, |
---|
429 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
430 | 0,TYPE_MUL_DIV,OPERATION_MUL_DIV_L_DIV,false, |
---|
431 | 0,0x0,1,10,1,20,0,0 ,1,30,1,SPR_LOGIC_SR_CY_OV, |
---|
432 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
433 | SEQ; |
---|
434 | |
---|
435 | // ===== l.bf -9 |
---|
436 | w = y+(-9<<2); |
---|
437 | request [0].push_back (entry_t( |
---|
438 | 0x13fffff7,x,y,z, |
---|
439 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_SET,1, w, |
---|
440 | 0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_F,false, |
---|
441 | 1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 , |
---|
442 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
443 | JMP(w); |
---|
444 | |
---|
445 | // ===== l.divu r30,r10,r20 |
---|
446 | request [0].push_back (entry_t( |
---|
447 | 0xe3caa30a,x,y,z, |
---|
448 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
449 | 0,TYPE_MUL_DIV,OPERATION_MUL_DIV_L_DIVU,true, |
---|
450 | 0,0x0,1,10,1,20,0,0 ,1,30,1,SPR_LOGIC_SR_CY_OV, |
---|
451 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
452 | SEQ; |
---|
453 | |
---|
454 | // ===== l.extbs r30,r10 |
---|
455 | request [0].push_back (entry_t( |
---|
456 | 0xe3ca004c,x,y,z, |
---|
457 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
458 | 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_S,false, |
---|
459 | 1,8 ,1,10,0,0 ,0,0 ,1,30,0,0 , |
---|
460 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
461 | SEQ; |
---|
462 | |
---|
463 | // ===== l.bnf 11 |
---|
464 | w = y+(11<<2); |
---|
465 | request [0].push_back (entry_t( |
---|
466 | 0x0c00000b,x,y,z, |
---|
467 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_UNSET,0, w, |
---|
468 | 0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_NF,false, |
---|
469 | 1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 , |
---|
470 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
471 | JMP(w); |
---|
472 | |
---|
473 | // ===== l.extbz r30,r10 |
---|
474 | request [0].push_back (entry_t( |
---|
475 | 0xe3ca00cc,x,y,z, |
---|
476 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
477 | 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_Z,true , |
---|
478 | 1,8 ,1,10,0,0 ,0,0 ,1,30,0,0 , |
---|
479 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
480 | SEQ; |
---|
481 | |
---|
482 | // ===== l.exths r30,r10 |
---|
483 | request [0].push_back (entry_t( |
---|
484 | 0xe3ca000c,x,y,z, |
---|
485 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
486 | 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_S,false, |
---|
487 | 1,16 ,1,10,0,0 ,0,0 ,1,30,0,0 , |
---|
488 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
489 | SEQ; |
---|
490 | |
---|
491 | // ===== l.bnf -9 |
---|
492 | w = y+(-9<<2); |
---|
493 | request [0].push_back (entry_t( |
---|
494 | 0x0ffffff7,x,y,z, |
---|
495 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_FLAG_UNSET,1, w, |
---|
496 | 0,TYPE_BRANCH,OPERATION_BRANCH_L_TEST_NF,false, |
---|
497 | 1,w,0, 0,0,0 ,1,SPR_LOGIC_SR_F ,0,0 ,0,0 , |
---|
498 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
499 | JMP(w); |
---|
500 | |
---|
501 | // ===== l.exthz r30,r10 |
---|
502 | request [0].push_back (entry_t( |
---|
503 | 0xe3ca008c,x,y,z, |
---|
504 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
505 | 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_Z,true , |
---|
506 | 1,16 ,1,10,0,0 ,0,0 ,1,30,0,0 , |
---|
507 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
508 | SEQ; |
---|
509 | |
---|
510 | // ===== l.extws r30,r10 |
---|
511 | request [0].push_back (entry_t( |
---|
512 | 0xe3ca000d,x,y,z, |
---|
513 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
514 | 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_S,false, |
---|
515 | 1,32 ,1,10,0,0 ,0,0 ,1,30,0,0 , |
---|
516 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
517 | SEQ; |
---|
518 | |
---|
519 | // ===== l.extwz r30,r10 |
---|
520 | request [0].push_back (entry_t( |
---|
521 | 0xe3ca004d,x,y,z, |
---|
522 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
523 | 0,TYPE_EXTEND,OPERATION_EXTEND_L_EXTEND_Z,false, |
---|
524 | 1,32 ,1,10,0,0 ,0,0 ,1,30,0,0 , |
---|
525 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
526 | SEQ; |
---|
527 | |
---|
528 | // ===== l.csync |
---|
529 | request [0].push_back (entry_t( |
---|
530 | 0x23000000,x,y,z, |
---|
531 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
532 | 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_CSYNC,false, |
---|
533 | 0,0 ,0,0 ,0,0 ,0,0 ,0,0 ,0,0 , |
---|
534 | EXCEPTION_USE_NONE,EVENT_TYPE_CSYNC)); |
---|
535 | SEQ; |
---|
536 | |
---|
537 | // ===== l.ff1 r30,r10 |
---|
538 | request [0].push_back (entry_t( |
---|
539 | 0xe3ca000f,x,y,z, |
---|
540 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
541 | 0,TYPE_FIND,OPERATION_FIND_L_FF1,false, |
---|
542 | 0,0 ,1,10,0,0 ,0,0 ,1,30,0,0 , |
---|
543 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
544 | SEQ; |
---|
545 | |
---|
546 | // ===== l.fl1 r30,r10 |
---|
547 | request [0].push_back (entry_t( |
---|
548 | 0xe3ca010f,x,y,z, |
---|
549 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
550 | 0,TYPE_FIND,OPERATION_FIND_L_FL1,false, |
---|
551 | 0,0 ,1,10,0,0 ,0,0 ,1,30,0,0 , |
---|
552 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
553 | SEQ; |
---|
554 | |
---|
555 | // ===== l.j 1018 |
---|
556 | w = y+(1018<<2); |
---|
557 | request [0].push_back (entry_t( |
---|
558 | 0x000003fa,x,y,z, |
---|
559 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,1, w, |
---|
560 | 0,TYPE_BRANCH,OPERATION_BRANCH_NONE,false, |
---|
561 | 0,0,0, 0,0,0 ,0,0 ,0,0 ,0,0 , |
---|
562 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
563 | JMP(w); |
---|
564 | |
---|
565 | // ===== l.lbs r30,0x3fa(r10) |
---|
566 | request [0].push_back (entry_t( |
---|
567 | 0x93ca03fa,x,y,z, |
---|
568 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
569 | 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_8_S,true, |
---|
570 | 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, |
---|
571 | EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
572 | SEQ; |
---|
573 | |
---|
574 | // ===== l.lbz r30,0x3fa(r10) |
---|
575 | request [0].push_back (entry_t( |
---|
576 | 0x8fca03fa,x,y,z, |
---|
577 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
578 | 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_8_Z,false, |
---|
579 | 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, |
---|
580 | EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
581 | SEQ; |
---|
582 | |
---|
583 | // ===== l.j -1018 |
---|
584 | w = y+(-1018<<2); |
---|
585 | request [0].push_back (entry_t( |
---|
586 | 0x03fffc06,x,y,z, |
---|
587 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,1, w, |
---|
588 | 0,TYPE_BRANCH,OPERATION_BRANCH_NONE,false, |
---|
589 | 0,0,0, 0,0,0 ,0,0 ,0,0 ,0,0 , |
---|
590 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
591 | JMP(w); |
---|
592 | |
---|
593 | // ===== l.lhs r30,0x3fa(r10) |
---|
594 | request [0].push_back (entry_t( |
---|
595 | 0x9bca03fa,x,y,z, |
---|
596 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
597 | 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_16_S,true, |
---|
598 | 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, |
---|
599 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
600 | SEQ; |
---|
601 | |
---|
602 | // ===== l.lhz r30,0x3fa(r10) |
---|
603 | request [0].push_back (entry_t( |
---|
604 | 0x97ca03fa,x,y,z, |
---|
605 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
606 | 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_16_Z,false, |
---|
607 | 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, |
---|
608 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
609 | SEQ; |
---|
610 | |
---|
611 | // ===== l.jal 1018 |
---|
612 | w = y+(1018<<2); |
---|
613 | request [0].push_back (entry_t( |
---|
614 | 0x040003fa,x,y,z, |
---|
615 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITH_WRITE_STACK,1, w, |
---|
616 | 0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false, |
---|
617 | 1,z+1,0, 0,0,0 ,0,0 ,1,9 ,0,0 , |
---|
618 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
619 | JMP(w); |
---|
620 | |
---|
621 | // ===== l.lws r30,0x3fa(r10) |
---|
622 | request [0].push_back (entry_t( |
---|
623 | 0x8bca03fa,x,y,z, |
---|
624 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
625 | 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_32_S,true, |
---|
626 | 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, |
---|
627 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
628 | SEQ; |
---|
629 | |
---|
630 | // ===== l.lwz r30,0x3fa(r10) |
---|
631 | request [0].push_back (entry_t( |
---|
632 | 0x87ca03fa,x,y,z, |
---|
633 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
634 | 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_32_Z,false, |
---|
635 | 1,0x3fa,1,10,0,0 ,0,0,1,30,0,0, |
---|
636 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
637 | SEQ; |
---|
638 | |
---|
639 | // ===== l.jal -1018 |
---|
640 | w = y+(-1018<<2); |
---|
641 | request [0].push_back (entry_t( |
---|
642 | 0x07fffc06,x,y,z, |
---|
643 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITH_WRITE_STACK,1, w, |
---|
644 | 0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false, |
---|
645 | 1,z+1,0, 0,0,0 ,0,0 ,1,9 ,0,0 , |
---|
646 | EXCEPTION_USE_NONE ,EVENT_TYPE_NONE)); |
---|
647 | JMP(w); |
---|
648 | |
---|
649 | // ===== l.ld r30,1018(r10) |
---|
650 | request [0].push_back (entry_t( |
---|
651 | 0x83ca03fa,x,y,z, |
---|
652 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
653 | 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_64_S,true, |
---|
654 | 1,1018,1,10,0,0 ,0,0,1,30,0,0, |
---|
655 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
656 | SEQ; |
---|
657 | |
---|
658 | // ===== l.ld r30,-1018(r10) |
---|
659 | request [0].push_back (entry_t( |
---|
660 | 0x83cafc06,x,y,z, |
---|
661 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
662 | 0,TYPE_MEMORY,OPERATION_MEMORY_LOAD_64_S,false, |
---|
663 | 1,static_cast<Tgeneral_data_t>(-1018),1,10,0,0 ,0,0,1,30,0,0, |
---|
664 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
665 | SEQ; |
---|
666 | |
---|
667 | // ===== l.jalr r20 |
---|
668 | request [0].push_back (entry_t( |
---|
669 | 0x4800a000,x,y,z, |
---|
670 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK,1, z, // branch_address_dest can be determined if BRANCH_STATE != NONE (also : previous prediction) |
---|
671 | 0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false, |
---|
672 | 0,0 ,0,0 ,1,20,0,0,1,9 ,0,0, |
---|
673 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
674 | SEQ; |
---|
675 | |
---|
676 | // ===== l.mac r10,r20 |
---|
677 | request [0].push_back (entry_t( |
---|
678 | 0xc40aa001,x,y,z, |
---|
679 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
680 | 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MAC,true, |
---|
681 | 0,0,1,10,1,20,0,0,0,0,0,0, |
---|
682 | EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); |
---|
683 | SEQ; |
---|
684 | |
---|
685 | // ===== l.maci r10,1018 |
---|
686 | request [0].push_back (entry_t( |
---|
687 | 0x4c0a03fa,x,y,z, |
---|
688 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
689 | 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MAC,false, |
---|
690 | 1,1018,1,10,0,0,0,0,0,0,0,0, |
---|
691 | EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); |
---|
692 | SEQ; |
---|
693 | |
---|
694 | // ===== l.maci r10,-1018 |
---|
695 | request [0].push_back (entry_t( |
---|
696 | 0x4fea0406,x,y,z, |
---|
697 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
698 | 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MAC,false, |
---|
699 | 1,static_cast<Tgeneral_data_t>(-1018),1,10,0,0,0,0,0,0,0,0, |
---|
700 | EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); |
---|
701 | SEQ; |
---|
702 | |
---|
703 | // ===== l.jr r10 |
---|
704 | request [0].push_back (entry_t( |
---|
705 | 0x44005000,x,y,z, |
---|
706 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK,1, z, |
---|
707 | 0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false, |
---|
708 | 0,0 ,0, 0,1,10,0,0,0,0 ,0,0, |
---|
709 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
710 | SEQ; |
---|
711 | |
---|
712 | // ===== l.macrc r30 |
---|
713 | request [0].push_back (entry_t( |
---|
714 | 0x1bc10000,x,y,z, |
---|
715 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
716 | 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MACRC,true, |
---|
717 | 0,0,0, 0,0, 0,0,0,1,30,0,0, |
---|
718 | EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); |
---|
719 | SEQ; |
---|
720 | |
---|
721 | // ===== l.mfspr r30,r10,1018 |
---|
722 | request [0].push_back (entry_t( |
---|
723 | 0xb7ca03fa,x,y,z, |
---|
724 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
725 | 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MFSPR,false, |
---|
726 | 1,1018,1,10,0, 0,0,0,1,30,0,0, |
---|
727 | EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); |
---|
728 | SEQ; |
---|
729 | |
---|
730 | // ===== l.mfspr r30,r10,-1018 |
---|
731 | request [0].push_back (entry_t( |
---|
732 | 0xb7cafc06,x,y,z, |
---|
733 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK,0, 0x0, |
---|
734 | 0,TYPE_SPECIAL,OPERATION_SPECIAL_L_MFSPR,false, |
---|
735 | 1,0xfc06,1,10,0, 0,0,0,1,30,0,0, |
---|
736 | EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); |
---|
737 | SEQ; |
---|
738 | |
---|
739 | // ===== l.jr r9 |
---|
740 | request [0].push_back (entry_t( |
---|
741 | 0x44004800,x,y,z, |
---|
742 | BRANCH_STATE_NONE,0,BRANCH_CONDITION_READ_STACK,1, z, |
---|
743 | 0,TYPE_BRANCH,OPERATION_BRANCH_L_JALR,false, |
---|
744 | 0,0 ,0, 0,1,9,0,0,0,0 ,0,0, |
---|
745 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
746 | SEQ; |
---|
747 | |
---|
748 | // ===== l.movhi r30,0x3fa |
---|
749 | request [0].push_back (entry_t( |
---|
750 | 0x1bc003fa,x,y,z, |
---|
751 | 0,0,0,0,0,0, |
---|
752 | TYPE_MOVE,OPERATION_MOVE_L_MOVHI,true, |
---|
753 | 1,0x3fa,0,0, 0,0, 0,0, 1,30, 0,0, |
---|
754 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
755 | SEQ; |
---|
756 | |
---|
757 | // ===== l.movhi r30,0xfc06 |
---|
758 | request [0].push_back (entry_t( |
---|
759 | 0x1bc0fc06,x,y,z, |
---|
760 | 0,0,0,0,0,0, |
---|
761 | TYPE_MOVE,OPERATION_MOVE_L_MOVHI,false, |
---|
762 | 1,0xfc06,0,0, 0,0, 0,0, 1,30, 0,0, |
---|
763 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
764 | SEQ; |
---|
765 | |
---|
766 | // ===== l.msb r10,r20 |
---|
767 | request [0].push_back (entry_t( |
---|
768 | 0xc40aa002,x,y,z, |
---|
769 | 0,0,0,0,0,0, |
---|
770 | TYPE_SPECIAL,OPERATION_SPECIAL_L_MSB,false, |
---|
771 | 0,0, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
772 | EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); |
---|
773 | SEQ; |
---|
774 | |
---|
775 | // ===== l.msync |
---|
776 | request [0].push_back (entry_t( |
---|
777 | 0x22000000,x,y,z, |
---|
778 | 0,0,0,0,0,0, |
---|
779 | TYPE_SPECIAL,OPERATION_SPECIAL_L_MSYNC,false, |
---|
780 | 0,0, 0,0, 0,0, 0,0, 0,0, 0,0, |
---|
781 | EXCEPTION_USE_NONE,EVENT_TYPE_MSYNC)); |
---|
782 | SEQ; |
---|
783 | |
---|
784 | // ===== l.mtspr r10,r20,0x3fa |
---|
785 | request [0].push_back (entry_t( |
---|
786 | 0xc00aa3fa,x,y,z, |
---|
787 | 0,0,0,0,0,0, |
---|
788 | TYPE_SPECIAL,OPERATION_SPECIAL_L_MTSPR,false, |
---|
789 | 1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
790 | EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); |
---|
791 | SEQ; |
---|
792 | |
---|
793 | // ===== l.mtspr r10,r20,0xfc06 |
---|
794 | request [0].push_back (entry_t( |
---|
795 | 0xc3eaa406,x,y,z, |
---|
796 | 0,0,0,0,0,0, |
---|
797 | TYPE_SPECIAL,OPERATION_SPECIAL_L_MTSPR,false, |
---|
798 | 1,0xfc06, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
799 | EXCEPTION_USE_NONE,EVENT_TYPE_SPR_ACCESS)); |
---|
800 | SEQ; |
---|
801 | |
---|
802 | // ===== l.mul r30,r10,r20 |
---|
803 | request [0].push_back (entry_t( |
---|
804 | 0xe3caa306,x,y,z, |
---|
805 | 0,0,0,0,0,0, |
---|
806 | TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MUL,false, |
---|
807 | 0,0, 1,10, 1,20, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV, |
---|
808 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
809 | SEQ; |
---|
810 | |
---|
811 | // ===== l.muli r30,r10,0x3fa |
---|
812 | request [0].push_back (entry_t( |
---|
813 | 0xb3ca03fa,x,y,z, |
---|
814 | 0,0,0,0,0,0, |
---|
815 | TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MUL,false, |
---|
816 | 1,0x3fa, 1,10, 0,0, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV, |
---|
817 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
818 | SEQ; |
---|
819 | |
---|
820 | // ===== l.muli r30,r10,0xfffffc06 |
---|
821 | request [0].push_back (entry_t( |
---|
822 | 0xb3cafc06,x,y,z, |
---|
823 | 0,0,0,0,0,0, |
---|
824 | TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MUL,false, |
---|
825 | 1,0xfffffc06, 1,10, 0,0, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV, |
---|
826 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
827 | SEQ; |
---|
828 | |
---|
829 | // ===== l.mulu r30,r10,r20 |
---|
830 | request [0].push_back (entry_t( |
---|
831 | 0xe3caa30b,x,y,z, |
---|
832 | 0,0,0,0,0,0, |
---|
833 | TYPE_MUL_DIV,OPERATION_MUL_DIV_L_MULU,false, |
---|
834 | 0,0, 1,10, 1,20, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV, |
---|
835 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
836 | SEQ; |
---|
837 | |
---|
838 | // ===== l.nop 0x3fa |
---|
839 | request [0].push_back (entry_t( |
---|
840 | 0x150003fa,x,y,z, |
---|
841 | 0,0,0,0,0,0, |
---|
842 | TYPE_SPECIAL,OPERATION_SPECIAL_L_NOP,false, |
---|
843 | 0,0x3fa, 0,0, 0,0, 0,0, 0,0, 0,0, |
---|
844 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
845 | SEQ; |
---|
846 | |
---|
847 | // ===== l.nop 0xfc06 |
---|
848 | request [0].push_back (entry_t( |
---|
849 | 0x1500fc06,x,y,z, |
---|
850 | 0,0,0,0,0,0, |
---|
851 | TYPE_SPECIAL,OPERATION_SPECIAL_L_NOP,false, |
---|
852 | 0,0xfc06, 0,0, 0,0, 0,0, 0,0, 0,0, |
---|
853 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
854 | SEQ; |
---|
855 | |
---|
856 | // ===== l.or r30,r10,r20 |
---|
857 | request [0].push_back (entry_t( |
---|
858 | 0xe3caa004,x,y,z, |
---|
859 | 0,0,0,0,0,0, |
---|
860 | TYPE_ALU,OPERATION_ALU_L_OR,false, |
---|
861 | 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, |
---|
862 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
863 | SEQ; |
---|
864 | |
---|
865 | // ===== l.ori r30,r10,0x3fa |
---|
866 | request [0].push_back (entry_t( |
---|
867 | 0xabca03fa,x,y,z, |
---|
868 | 0,0,0,0,0,0, |
---|
869 | TYPE_ALU,OPERATION_ALU_L_OR,false, |
---|
870 | 1,0x3fa, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
871 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
872 | SEQ; |
---|
873 | |
---|
874 | // ===== l.ori r30,r10,0xfc06 |
---|
875 | request [0].push_back (entry_t( |
---|
876 | 0xabcafc06,x,y,z, |
---|
877 | 0,0,0,0,0,0, |
---|
878 | TYPE_ALU,OPERATION_ALU_L_OR,false, |
---|
879 | 1,0xfc06, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
880 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
881 | SEQ; |
---|
882 | |
---|
883 | // ===== l.psync |
---|
884 | request [0].push_back (entry_t( |
---|
885 | 0x22800000,x,y,z, |
---|
886 | 0,0,0,0,0,0, |
---|
887 | TYPE_SPECIAL,OPERATION_SPECIAL_L_PSYNC,false, |
---|
888 | 0,0, 0,0, 0,0, 0,0, 0,0, 0,0, |
---|
889 | EXCEPTION_USE_NONE,EVENT_TYPE_PSYNC)); |
---|
890 | SEQ; |
---|
891 | |
---|
892 | // ===== l.ror r30,r10,r20 |
---|
893 | request [0].push_back (entry_t( |
---|
894 | 0xe3caa0c8,x,y,z, |
---|
895 | 0,0,0,0,0,0, |
---|
896 | TYPE_SHIFT,OPERATION_SHIFT_L_ROR,false, |
---|
897 | 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, |
---|
898 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
899 | SEQ; |
---|
900 | |
---|
901 | // ===== l.rori r30,r10,0x3f |
---|
902 | request [0].push_back (entry_t( |
---|
903 | 0xbbca00ff,x,y,z, |
---|
904 | 0,0,0,0,0,0, |
---|
905 | TYPE_SHIFT,OPERATION_SHIFT_L_ROR,false, |
---|
906 | 1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
907 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
908 | SEQ; |
---|
909 | |
---|
910 | // ===== l.rori r30,r10,0x1 |
---|
911 | request [0].push_back (entry_t( |
---|
912 | 0xbbca00c1,x,y,z, |
---|
913 | 0,0,0,0,0,0, |
---|
914 | TYPE_SHIFT,OPERATION_SHIFT_L_ROR,false, |
---|
915 | 1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
916 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
917 | SEQ; |
---|
918 | |
---|
919 | // ===== l.sb 0x3fa(r10),r20 |
---|
920 | request [0].push_back (entry_t( |
---|
921 | 0xd80aa3fa,x,y,z, |
---|
922 | 0,0,0,0,0,0, |
---|
923 | TYPE_MEMORY,OPERATION_MEMORY_STORE_8,false, |
---|
924 | 1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
925 | EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
926 | SEQ; |
---|
927 | |
---|
928 | // ===== l.sb 0xfffffc06(r10),r20 |
---|
929 | request [0].push_back (entry_t( |
---|
930 | 0xdbeaa406,x,y,z, |
---|
931 | 0,0,0,0,0,0, |
---|
932 | TYPE_MEMORY,OPERATION_MEMORY_STORE_8,false, |
---|
933 | 1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
934 | EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
935 | SEQ; |
---|
936 | |
---|
937 | // ===== l.sd 0x3fa(r10),r20 |
---|
938 | request [0].push_back (entry_t( |
---|
939 | 0xd00aa3fa,x,y,z, |
---|
940 | 0,0,0,0,0,0, |
---|
941 | TYPE_MEMORY,OPERATION_MEMORY_STORE_64,false, |
---|
942 | 1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
943 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
944 | SEQ; |
---|
945 | |
---|
946 | // ===== l.sd 0xfffffc06(r10),r20 |
---|
947 | request [0].push_back (entry_t( |
---|
948 | 0xd3eaa406,x,y,z, |
---|
949 | 0,0,0,0,0,0, |
---|
950 | TYPE_MEMORY,OPERATION_MEMORY_STORE_64,false, |
---|
951 | 1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
952 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
953 | SEQ; |
---|
954 | |
---|
955 | // ===== l.sh 0x3fa(r10),r20 |
---|
956 | request [0].push_back (entry_t( |
---|
957 | 0xdc0aa3fa,x,y,z, |
---|
958 | 0,0,0,0,0,0, |
---|
959 | TYPE_MEMORY,OPERATION_MEMORY_STORE_16,false, |
---|
960 | 1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
961 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
962 | SEQ; |
---|
963 | |
---|
964 | // ===== l.sh 0xfffffc06(r10),r20 |
---|
965 | request [0].push_back (entry_t( |
---|
966 | 0xdfeaa406,x,y,z, |
---|
967 | 0,0,0,0,0,0, |
---|
968 | TYPE_MEMORY,OPERATION_MEMORY_STORE_16,false, |
---|
969 | 1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
970 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
971 | SEQ; |
---|
972 | |
---|
973 | // ===== l.sw 0x3fa(r10),r20 |
---|
974 | request [0].push_back (entry_t( |
---|
975 | 0xd40aa3fa,x,y,z, |
---|
976 | 0,0,0,0,0,0, |
---|
977 | TYPE_MEMORY,OPERATION_MEMORY_STORE_32,false, |
---|
978 | 1,0x3fa, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
979 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
980 | SEQ; |
---|
981 | |
---|
982 | // ===== l.sw 0xfffffc06(r10),r20 |
---|
983 | request [0].push_back (entry_t( |
---|
984 | 0xd7eaa406,x,y,z, |
---|
985 | 0,0,0,0,0,0, |
---|
986 | TYPE_MEMORY,OPERATION_MEMORY_STORE_32,false, |
---|
987 | 1,0xfffffc06, 1,10, 1,20, 0,0, 0,0, 0,0, |
---|
988 | EXCEPTION_USE_MEMORY_WITH_ALIGNMENT,EVENT_TYPE_NONE)); |
---|
989 | SEQ; |
---|
990 | |
---|
991 | // ===== l.sll r30,r10,r20 |
---|
992 | request [0].push_back (entry_t( |
---|
993 | 0xe3caa008,x,y,z, |
---|
994 | 0,0,0,0,0,0, |
---|
995 | TYPE_SHIFT,OPERATION_SHIFT_L_SLL,false, |
---|
996 | 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, |
---|
997 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
998 | SEQ; |
---|
999 | |
---|
1000 | // ===== l.slli r30,r10,0x1 |
---|
1001 | request [0].push_back (entry_t( |
---|
1002 | 0xbbca0001,x,y,z, |
---|
1003 | 0,0,0,0,0,0, |
---|
1004 | TYPE_SHIFT,OPERATION_SHIFT_L_SLL,false, |
---|
1005 | 1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
1006 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1007 | SEQ; |
---|
1008 | |
---|
1009 | // ===== l.slli r30,r10,0x3f |
---|
1010 | request [0].push_back (entry_t( |
---|
1011 | 0xbbca003f,x,y,z, |
---|
1012 | 0,0,0,0,0,0, |
---|
1013 | TYPE_SHIFT,OPERATION_SHIFT_L_SLL,false, |
---|
1014 | 1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
1015 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1016 | SEQ; |
---|
1017 | |
---|
1018 | // ===== l.sra r30,r10,r20 |
---|
1019 | request [0].push_back (entry_t( |
---|
1020 | 0xe3caa088,x,y,z, |
---|
1021 | 0,0,0,0,0,0, |
---|
1022 | TYPE_SHIFT,OPERATION_SHIFT_L_SRA,false, |
---|
1023 | 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, |
---|
1024 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1025 | SEQ; |
---|
1026 | |
---|
1027 | // ===== l.srai r30,r10,0x1 |
---|
1028 | request [0].push_back (entry_t( |
---|
1029 | 0xbbca0081,x,y,z, |
---|
1030 | 0,0,0,0,0,0, |
---|
1031 | TYPE_SHIFT,OPERATION_SHIFT_L_SRA,false, |
---|
1032 | 1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
1033 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1034 | SEQ; |
---|
1035 | |
---|
1036 | // ===== l.srai r30,r10,0x3f |
---|
1037 | request [0].push_back (entry_t( |
---|
1038 | 0xbbca00bf,x,y,z, |
---|
1039 | 0,0,0,0,0,0, |
---|
1040 | TYPE_SHIFT,OPERATION_SHIFT_L_SRA,false, |
---|
1041 | 1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
1042 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1043 | SEQ; |
---|
1044 | |
---|
1045 | // ===== l.srl r30,r10,r20 |
---|
1046 | request [0].push_back (entry_t( |
---|
1047 | 0xe3caa048,x,y,z, |
---|
1048 | 0,0,0,0,0,0, |
---|
1049 | TYPE_SHIFT,OPERATION_SHIFT_L_SRL,false, |
---|
1050 | 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, |
---|
1051 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1052 | SEQ; |
---|
1053 | |
---|
1054 | // ===== l.srli r30,r10,0x1 |
---|
1055 | request [0].push_back (entry_t( |
---|
1056 | 0xbbca0041,x,y,z, |
---|
1057 | 0,0,0,0,0,0, |
---|
1058 | TYPE_SHIFT,OPERATION_SHIFT_L_SRL,false, |
---|
1059 | 1,0x1, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
1060 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1061 | SEQ; |
---|
1062 | |
---|
1063 | // ===== l.srli r30,r10,0x3f |
---|
1064 | request [0].push_back (entry_t( |
---|
1065 | 0xbbca007f,x,y,z, |
---|
1066 | 0,0,0,0,0,0, |
---|
1067 | TYPE_SHIFT,OPERATION_SHIFT_L_SRL,false, |
---|
1068 | 1,0x3f, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
1069 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1070 | SEQ; |
---|
1071 | |
---|
1072 | // ===== l.xor r30,r10,r20 |
---|
1073 | request [0].push_back (entry_t( |
---|
1074 | 0xe3caa005,x,y,z, |
---|
1075 | 0,0,0,0,0,0, |
---|
1076 | TYPE_ALU,OPERATION_ALU_L_XOR,false, |
---|
1077 | 0,0, 1,10, 1,20, 0,0, 1,30, 0,0, |
---|
1078 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1079 | SEQ; |
---|
1080 | |
---|
1081 | // ===== l.xori r30,r10,0x3fa |
---|
1082 | request [0].push_back (entry_t( |
---|
1083 | 0xafca03fa,x,y,z, |
---|
1084 | 0,0,0,0,0,0, |
---|
1085 | TYPE_ALU,OPERATION_ALU_L_XOR,false, |
---|
1086 | 1,0x3fa, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
1087 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1088 | SEQ; |
---|
1089 | |
---|
1090 | // ===== l.xori r30,r10,0xfffffc06 |
---|
1091 | request [0].push_back (entry_t( |
---|
1092 | 0xafcafc06,x,y,z, |
---|
1093 | 0,0,0,0,0,0, |
---|
1094 | TYPE_ALU,OPERATION_ALU_L_XOR,false, |
---|
1095 | 1,0xfffffc06, 1,10, 0,0, 0,0, 1,30, 0,0, |
---|
1096 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1097 | SEQ; |
---|
1098 | |
---|
1099 | // ===== l.sub r30,r10,r20 |
---|
1100 | request [0].push_back (entry_t( |
---|
1101 | 0xe3caa002,x,y,z, |
---|
1102 | 0,0,0,0,0,0, |
---|
1103 | TYPE_ALU,OPERATION_ALU_L_SUB,false, |
---|
1104 | 0,0, 1,10, 1,20, 0,0, 1,30, 1,SPR_LOGIC_SR_CY_OV, |
---|
1105 | EXCEPTION_USE_RANGE,EVENT_TYPE_NONE)); |
---|
1106 | SEQ; |
---|
1107 | |
---|
1108 | // ===== l.sys 0x3fa |
---|
1109 | request [0].push_back (entry_t( |
---|
1110 | 0x200003fa,x,y,z, |
---|
1111 | 0,0,0,0,0,z, |
---|
1112 | TYPE_SPECIAL,OPERATION_SPECIAL_L_SYS,false, |
---|
1113 | 0,0, 0,0, 0,0, 0,0, 0,0, 0,0, |
---|
1114 | EXCEPTION_USE_SYSCALL,EVENT_TYPE_EXCEPTION)); |
---|
1115 | SEQ; |
---|
1116 | |
---|
1117 | // ===== l.sys 0xfc06 |
---|
1118 | request [0].push_back (entry_t( |
---|
1119 | 0x2000fc06,x,y,z, |
---|
1120 | 0,0,0,0,0,z, |
---|
1121 | TYPE_SPECIAL,OPERATION_SPECIAL_L_SYS,false, |
---|
1122 | 0,0, 0,0, 0,0, 0,0, 0,0, 0,0, |
---|
1123 | EXCEPTION_USE_SYSCALL,EVENT_TYPE_EXCEPTION)); |
---|
1124 | SEQ; |
---|
1125 | |
---|
1126 | // ===== l.trap 0x3fa |
---|
1127 | request [0].push_back (entry_t( |
---|
1128 | 0x210003fa,x,y,z, |
---|
1129 | 0,0,0,0,0,0, |
---|
1130 | TYPE_SPECIAL,OPERATION_SPECIAL_L_TRAP,false, |
---|
1131 | 1,0x3fa, 0,0, 0,0, 0,0, 0,0, 0,0, |
---|
1132 | EXCEPTION_USE_TRAP,EVENT_TYPE_NONE)); |
---|
1133 | SEQ; |
---|
1134 | |
---|
1135 | // ===== l.trap 0xfc06 |
---|
1136 | request [0].push_back (entry_t( |
---|
1137 | 0x2100fc06,x,y,z, |
---|
1138 | 0,0,0,0,0,0, |
---|
1139 | TYPE_SPECIAL,OPERATION_SPECIAL_L_TRAP,false, |
---|
1140 | 1,0xfc06, 0,0, 0,0, 0,0, 0,0, 0,0, |
---|
1141 | EXCEPTION_USE_TRAP,EVENT_TYPE_NONE)); |
---|
1142 | SEQ; |
---|
1143 | |
---|
1144 | // ===== l.rfe |
---|
1145 | request [0].push_back (entry_t( |
---|
1146 | 0x24000000,x,y,z, |
---|
1147 | 0,0,0,0,0,0, |
---|
1148 | TYPE_SPECIAL,OPERATION_SPECIAL_L_RFE,false, |
---|
1149 | 0,0, 0,0, 0,0, 0,0, 0,0, 0,0, |
---|
1150 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1151 | SEQ; |
---|
1152 | |
---|
1153 | // ===== l.sfeq r10,r20 |
---|
1154 | request [0].push_back (entry_t( |
---|
1155 | 0xe40aa000,x,y,z, |
---|
1156 | 0,0,0,0,0,0, |
---|
1157 | TYPE_TEST,OPERATION_TEST_L_SFEQ,false, |
---|
1158 | 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1159 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1160 | SEQ; |
---|
1161 | |
---|
1162 | // ===== l.sfeqi r10,0x3fa |
---|
1163 | request [0].push_back (entry_t( |
---|
1164 | 0xbc0a03fa,x,y,z, |
---|
1165 | 0,0,0,0,0,0, |
---|
1166 | TYPE_TEST,OPERATION_TEST_L_SFEQ,false, |
---|
1167 | 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1168 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1169 | SEQ; |
---|
1170 | |
---|
1171 | // ===== l.sfeqi r10,0xfffffc06 |
---|
1172 | request [0].push_back (entry_t( |
---|
1173 | 0xbc0afc06,x,y,z, |
---|
1174 | 0,0,0,0,0,0, |
---|
1175 | TYPE_TEST,OPERATION_TEST_L_SFEQ,false, |
---|
1176 | 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1177 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1178 | SEQ; |
---|
1179 | |
---|
1180 | // ===== l.sfne r10,r20 |
---|
1181 | request [0].push_back (entry_t( |
---|
1182 | 0xe42aa000,x,y,z, |
---|
1183 | 0,0,0,0,0,0, |
---|
1184 | TYPE_TEST,OPERATION_TEST_L_SFNE,false, |
---|
1185 | 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1186 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1187 | SEQ; |
---|
1188 | |
---|
1189 | // ===== l.sfnei r10,0x3fa |
---|
1190 | request [0].push_back (entry_t( |
---|
1191 | 0xbc2a03fa,x,y,z, |
---|
1192 | 0,0,0,0,0,0, |
---|
1193 | TYPE_TEST,OPERATION_TEST_L_SFNE,false, |
---|
1194 | 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1195 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1196 | SEQ; |
---|
1197 | |
---|
1198 | // ===== l.sfnei r10,0xfffffc06 |
---|
1199 | request [0].push_back (entry_t( |
---|
1200 | 0xbc2afc06,x,y,z, |
---|
1201 | 0,0,0,0,0,0, |
---|
1202 | TYPE_TEST,OPERATION_TEST_L_SFNE,false, |
---|
1203 | 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1204 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1205 | SEQ; |
---|
1206 | |
---|
1207 | // ===== l.sfges r10,r20 |
---|
1208 | request [0].push_back (entry_t( |
---|
1209 | 0xe56aa000,x,y,z, |
---|
1210 | 0,0,0,0,0,0, |
---|
1211 | TYPE_TEST,OPERATION_TEST_L_SFGES,false, |
---|
1212 | 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1213 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1214 | SEQ; |
---|
1215 | |
---|
1216 | // ===== l.sfgesi r10,0x3fa |
---|
1217 | request [0].push_back (entry_t( |
---|
1218 | 0xbd6a03fa,x,y,z, |
---|
1219 | 0,0,0,0,0,0, |
---|
1220 | TYPE_TEST,OPERATION_TEST_L_SFGES,false, |
---|
1221 | 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1222 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1223 | SEQ; |
---|
1224 | |
---|
1225 | // ===== l.sfgesi r10,0xfffffc06 |
---|
1226 | request [0].push_back (entry_t( |
---|
1227 | 0xbd6afc06,x,y,z, |
---|
1228 | 0,0,0,0,0,0, |
---|
1229 | TYPE_TEST,OPERATION_TEST_L_SFGES,false, |
---|
1230 | 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1231 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1232 | SEQ; |
---|
1233 | |
---|
1234 | // ===== l.sfgeu r10,r20 |
---|
1235 | request [0].push_back (entry_t( |
---|
1236 | 0xe46aa000,x,y,z, |
---|
1237 | 0,0,0,0,0,0, |
---|
1238 | TYPE_TEST,OPERATION_TEST_L_SFGEU,false, |
---|
1239 | 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1240 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1241 | SEQ; |
---|
1242 | |
---|
1243 | // ===== l.sfgeui r10,0x3fa |
---|
1244 | request [0].push_back (entry_t( |
---|
1245 | 0xbc6a03fa,x,y,z, |
---|
1246 | 0,0,0,0,0,0, |
---|
1247 | TYPE_TEST,OPERATION_TEST_L_SFGEU,false, |
---|
1248 | 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1249 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1250 | SEQ; |
---|
1251 | |
---|
1252 | // ===== l.sfgeui r10,0xfffffc06 |
---|
1253 | request [0].push_back (entry_t( |
---|
1254 | 0xbc6afc06,x,y,z, |
---|
1255 | 0,0,0,0,0,0, |
---|
1256 | TYPE_TEST,OPERATION_TEST_L_SFGEU,false, |
---|
1257 | 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1258 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1259 | SEQ; |
---|
1260 | |
---|
1261 | // ===== l.sfgts r10,r20 |
---|
1262 | request [0].push_back (entry_t( |
---|
1263 | 0xe54aa000,x,y,z, |
---|
1264 | 0,0,0,0,0,0, |
---|
1265 | TYPE_TEST,OPERATION_TEST_L_SFGTS,false, |
---|
1266 | 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1267 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1268 | SEQ; |
---|
1269 | |
---|
1270 | // ===== l.sfgtsi r10,0x3fa |
---|
1271 | request [0].push_back (entry_t( |
---|
1272 | 0xbd4a03fa,x,y,z, |
---|
1273 | 0,0,0,0,0,0, |
---|
1274 | TYPE_TEST,OPERATION_TEST_L_SFGTS,false, |
---|
1275 | 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1276 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1277 | SEQ; |
---|
1278 | |
---|
1279 | // ===== l.sfgtsi r10,0xfffffc06 |
---|
1280 | request [0].push_back (entry_t( |
---|
1281 | 0xbd4afc06,x,y,z, |
---|
1282 | 0,0,0,0,0,0, |
---|
1283 | TYPE_TEST,OPERATION_TEST_L_SFGTS,false, |
---|
1284 | 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1285 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1286 | SEQ; |
---|
1287 | |
---|
1288 | // ===== l.sfgtu r10,r20 |
---|
1289 | request [0].push_back (entry_t( |
---|
1290 | 0xe44aa000,x,y,z, |
---|
1291 | 0,0,0,0,0,0, |
---|
1292 | TYPE_TEST,OPERATION_TEST_L_SFGTU,false, |
---|
1293 | 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1294 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1295 | SEQ; |
---|
1296 | |
---|
1297 | // ===== l.sfgtui r10,0x3fa |
---|
1298 | request [0].push_back (entry_t( |
---|
1299 | 0xbc4a03fa,x,y,z, |
---|
1300 | 0,0,0,0,0,0, |
---|
1301 | TYPE_TEST,OPERATION_TEST_L_SFGTU,false, |
---|
1302 | 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1303 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1304 | SEQ; |
---|
1305 | |
---|
1306 | // ===== l.sfgtui r10,0xfffffc06 |
---|
1307 | request [0].push_back (entry_t( |
---|
1308 | 0xbc4afc06,x,y,z, |
---|
1309 | 0,0,0,0,0,0, |
---|
1310 | TYPE_TEST,OPERATION_TEST_L_SFGTU,false, |
---|
1311 | 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1312 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1313 | SEQ; |
---|
1314 | |
---|
1315 | // ===== l.sfles r10,r20 |
---|
1316 | request [0].push_back (entry_t( |
---|
1317 | 0xe5aaa000,x,y,z, |
---|
1318 | 0,0,0,0,0,0, |
---|
1319 | TYPE_TEST,OPERATION_TEST_L_SFLES,false, |
---|
1320 | 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1321 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1322 | SEQ; |
---|
1323 | |
---|
1324 | // ===== l.sflesi r10,0x3fa |
---|
1325 | request [0].push_back (entry_t( |
---|
1326 | 0xbdaa03fa,x,y,z, |
---|
1327 | 0,0,0,0,0,0, |
---|
1328 | TYPE_TEST,OPERATION_TEST_L_SFLES,false, |
---|
1329 | 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1330 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1331 | SEQ; |
---|
1332 | |
---|
1333 | // ===== l.sflesi r10,0xfffffc06 |
---|
1334 | request [0].push_back (entry_t( |
---|
1335 | 0xbdaafc06,x,y,z, |
---|
1336 | 0,0,0,0,0,0, |
---|
1337 | TYPE_TEST,OPERATION_TEST_L_SFLES,false, |
---|
1338 | 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1339 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1340 | SEQ; |
---|
1341 | |
---|
1342 | // ===== l.sfleu r10,r20 |
---|
1343 | request [0].push_back (entry_t( |
---|
1344 | 0xe4aaa000,x,y,z, |
---|
1345 | 0,0,0,0,0,0, |
---|
1346 | TYPE_TEST,OPERATION_TEST_L_SFLEU,false, |
---|
1347 | 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1348 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1349 | SEQ; |
---|
1350 | |
---|
1351 | // ===== l.sfleui r10,0x3fa |
---|
1352 | request [0].push_back (entry_t( |
---|
1353 | 0xbcaa03fa,x,y,z, |
---|
1354 | 0,0,0,0,0,0, |
---|
1355 | TYPE_TEST,OPERATION_TEST_L_SFLEU,false, |
---|
1356 | 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1357 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1358 | SEQ; |
---|
1359 | |
---|
1360 | // ===== l.sfleui r10,0xfffffc06 |
---|
1361 | request [0].push_back (entry_t( |
---|
1362 | 0xbcaafc06,x,y,z, |
---|
1363 | 0,0,0,0,0,0, |
---|
1364 | TYPE_TEST,OPERATION_TEST_L_SFLEU,false, |
---|
1365 | 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1366 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1367 | SEQ; |
---|
1368 | |
---|
1369 | // ===== l.sflts r10,r20 |
---|
1370 | request [0].push_back (entry_t( |
---|
1371 | 0xe58aa000,x,y,z, |
---|
1372 | 0,0,0,0,0,0, |
---|
1373 | TYPE_TEST,OPERATION_TEST_L_SFLTS,false, |
---|
1374 | 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1375 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1376 | SEQ; |
---|
1377 | |
---|
1378 | // ===== l.sfltsi r10,0x3fa |
---|
1379 | request [0].push_back (entry_t( |
---|
1380 | 0xbd8a03fa,x,y,z, |
---|
1381 | 0,0,0,0,0,0, |
---|
1382 | TYPE_TEST,OPERATION_TEST_L_SFLTS,false, |
---|
1383 | 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1384 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1385 | SEQ; |
---|
1386 | |
---|
1387 | // ===== l.sfltsi r10,0xfffffc06 |
---|
1388 | request [0].push_back (entry_t( |
---|
1389 | 0xbd8afc06,x,y,z, |
---|
1390 | 0,0,0,0,0,0, |
---|
1391 | TYPE_TEST,OPERATION_TEST_L_SFLTS,false, |
---|
1392 | 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1393 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1394 | SEQ; |
---|
1395 | |
---|
1396 | // ===== l.sfltu r10,r20 |
---|
1397 | request [0].push_back (entry_t( |
---|
1398 | 0xe48aa000,x,y,z, |
---|
1399 | 0,0,0,0,0,0, |
---|
1400 | TYPE_TEST,OPERATION_TEST_L_SFLTU,false, |
---|
1401 | 0,0, 1,10, 1,20, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1402 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1403 | SEQ; |
---|
1404 | |
---|
1405 | // ===== l.sfltui r10,0x3fa |
---|
1406 | request [0].push_back (entry_t( |
---|
1407 | 0xbc8a03fa,x,y,z, |
---|
1408 | 0,0,0,0,0,0, |
---|
1409 | TYPE_TEST,OPERATION_TEST_L_SFLTU,false, |
---|
1410 | 1,0x3fa, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1411 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1412 | SEQ; |
---|
1413 | |
---|
1414 | // ===== l.sfltui r10,0xfffffc06 |
---|
1415 | request [0].push_back (entry_t( |
---|
1416 | 0xbc8afc06,x,y,z, |
---|
1417 | 0,0,0,0,0,0, |
---|
1418 | TYPE_TEST,OPERATION_TEST_L_SFLTU,false, |
---|
1419 | 1,0xfffffc06, 1,10, 0,0, 0,0, 0,0, 1,SPR_LOGIC_SR_F, |
---|
1420 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1421 | SEQ; |
---|
1422 | |
---|
1423 | // ===== l.cust4 (encrypt) |
---|
1424 | request [0].push_back (entry_t( |
---|
1425 | 0x7de80000,x,y,z, |
---|
1426 | 0,0,0,0,0,0, |
---|
1427 | TYPE_CUSTOM,OPERATION_CUSTOM_L_4,false, |
---|
1428 | 0,0x0, 1, 8, 0,0, 0,0, 1,15, 0,0, |
---|
1429 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1430 | SEQ; |
---|
1431 | |
---|
1432 | // ===== l.cust8 (decrypt) |
---|
1433 | request [0].push_back (entry_t( |
---|
1434 | 0xfde80000,x,y,z, |
---|
1435 | 0,0,0,0,0,0, |
---|
1436 | TYPE_CUSTOM,OPERATION_CUSTOM_L_8,false, |
---|
1437 | 0,0x0, 1, 8, 0,0, 0,0, 1,15, 0,0, |
---|
1438 | EXCEPTION_USE_NONE,EVENT_TYPE_NONE)); |
---|
1439 | SEQ; |
---|
1440 | |
---|
1441 | for (uint32_t i=1; i<_param->_nb_context; i++) |
---|
1442 | { |
---|
1443 | request[i] = request [0]; |
---|
1444 | } |
---|
1445 | |
---|
1446 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
1447 | { |
---|
1448 | delay_slot_current [i] = false; |
---|
1449 | delay_slot_next [i] = false; |
---|
1450 | } |
---|
1451 | |
---|
1452 | uint32_t nb_request = request[0].size() * _param->_nb_context; |
---|
1453 | |
---|
1454 | while (nb_request > 0) |
---|
1455 | { |
---|
1456 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
1457 | { |
---|
1458 | delay_slot_previous [i] = false; |
---|
1459 | |
---|
1460 | in_CONTEXT_DECOD_ENABLE [i]->write((rand()%100)<percent_transaction_decod); |
---|
1461 | |
---|
1462 | for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++) |
---|
1463 | in_IFETCH_VAL [i][j]->write(0); |
---|
1464 | |
---|
1465 | if ((rand()%100)<percent_transaction_ifetch) |
---|
1466 | { |
---|
1467 | list<entry_t>::iterator it = request [i].begin(); |
---|
1468 | |
---|
1469 | if (it!=request [i].end()) |
---|
1470 | { |
---|
1471 | uint32_t lsb = it->_address%_param->_nb_inst_fetch[i]; |
---|
1472 | |
---|
1473 | in_IFETCH_ADDRESS [i]->write(it->_address-lsb); |
---|
1474 | in_IFETCH_BRANCH_STATE [i]->write(BRANCH_STATE_NONE); |
---|
1475 | if (_param->_have_port_inst_ifetch_ptr) |
---|
1476 | in_IFETCH_INST_IFETCH_PTR [i]->write(0); |
---|
1477 | |
---|
1478 | // Alignement |
---|
1479 | for (uint32_t j=lsb; j<_param->_nb_inst_fetch[i]; j++) |
---|
1480 | { |
---|
1481 | in_IFETCH_VAL [i][j]->write(1); |
---|
1482 | in_IFETCH_INSTRUCTION [i][j]->write(it->_instruction); |
---|
1483 | // in_IFETCH_ADDRESS_NEXT [i]->write(it->_address_next); |
---|
1484 | if (it->_type == TYPE_BRANCH) |
---|
1485 | in_IFETCH_BRANCH_STATE [i]->write(it->_branch_state); |
---|
1486 | in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i]->write(it->_branch_update_prediction_id); |
---|
1487 | |
---|
1488 | if ((it->_is_delay_slot) or |
---|
1489 | ((++it)==request [i].end())) |
---|
1490 | break; |
---|
1491 | } |
---|
1492 | } |
---|
1493 | } |
---|
1494 | } |
---|
1495 | |
---|
1496 | { |
---|
1497 | bool previous_ack = true; |
---|
1498 | |
---|
1499 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
---|
1500 | { |
---|
1501 | bool ack = previous_ack and ((rand()%100)<percent_transaction_decod); |
---|
1502 | in_DECOD_ACK [i]->write(ack); |
---|
1503 | |
---|
1504 | previous_ack = ack; |
---|
1505 | |
---|
1506 | in_PREDICT_ACK [i]->write((rand()%100)<percent_transaction_predict); |
---|
1507 | // in_PREDICT_CAN_CONTINUE [i]->write(0); |
---|
1508 | } |
---|
1509 | } |
---|
1510 | |
---|
1511 | in_CONTEXT_EVENT_ACK->write((rand()%100)<percent_transaction_event); |
---|
1512 | |
---|
1513 | SC_START(0); |
---|
1514 | |
---|
1515 | |
---|
1516 | uint32_t nb_inst_ifetch = 0; |
---|
1517 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
1518 | for (uint32_t j=0; j<_param->_nb_inst_fetch[i]; j++) |
---|
1519 | if (in_IFETCH_VAL[i][j]->read() and out_IFETCH_ACK[i][j]->read()) |
---|
1520 | { |
---|
1521 | LABEL("IFETCH [%d][%d] : transaction",i,j); |
---|
1522 | nb_inst_ifetch ++; |
---|
1523 | } |
---|
1524 | |
---|
1525 | uint32_t nb_inst_decod = 0; |
---|
1526 | uint32_t find_event = false; |
---|
1527 | |
---|
1528 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
---|
1529 | if (out_DECOD_VAL[i]->read() and in_DECOD_ACK[i]->read()) |
---|
1530 | { |
---|
1531 | Tcontext_t context = (_param->_have_port_context_id)?out_DECOD_CONTEXT_ID[i]->read():0; |
---|
1532 | |
---|
1533 | LABEL("DECOD [%d] : transaction",i ); |
---|
1534 | LABEL(" * context : %d",context); |
---|
1535 | LABEL(" * instruction : 0x%x",request [context].front()._instruction); |
---|
1536 | |
---|
1537 | if (_param->_have_port_depth) |
---|
1538 | TEST(Tdepth_t , out_DECOD_DEPTH [i]->read(), request [context].front()._depth ); |
---|
1539 | TEST(Ttype_t , out_DECOD_TYPE [i]->read(), request [context].front()._type ); |
---|
1540 | TEST(Toperation_t , out_DECOD_OPERATION [i]->read(), request [context].front()._operation ); |
---|
1541 | TEST(Tcontrol_t , out_DECOD_IS_DELAY_SLOT [i]->read(), request [context].front()._is_delay_slot); |
---|
1542 | TEST(Tcontrol_t , delay_slot_current [context] , request [context].front()._is_delay_slot); |
---|
1543 | TEST(Tgeneral_data_t , out_DECOD_ADDRESS [i]->read(), request [context].front()._address ); |
---|
1544 | TEST(Tcontrol_t , out_DECOD_HAS_IMMEDIAT [i]->read(), request [context].front()._has_immediat ); |
---|
1545 | if (request [context].front()._has_immediat) |
---|
1546 | TEST(Tgeneral_data_t , out_DECOD_IMMEDIAT [i]->read(), request [context].front()._immediat ); |
---|
1547 | TEST(Tcontrol_t , out_DECOD_READ_RA [i]->read(), request [context].front()._read_ra ); |
---|
1548 | if (request [context].front()._read_ra) |
---|
1549 | TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RA [i]->read(), request [context].front()._num_reg_ra ); |
---|
1550 | TEST(Tcontrol_t , out_DECOD_READ_RB [i]->read(), request [context].front()._read_rb ); |
---|
1551 | if (request [context].front()._read_rb) |
---|
1552 | TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RB [i]->read(), request [context].front()._num_reg_rb ); |
---|
1553 | TEST(Tcontrol_t , out_DECOD_READ_RC [i]->read(), request [context].front()._read_rc ); |
---|
1554 | if (request [context].front()._read_rc) |
---|
1555 | TEST(Tspecial_address_t, out_DECOD_NUM_REG_RC [i]->read(), request [context].front()._num_reg_rc ); |
---|
1556 | TEST(Tcontrol_t , out_DECOD_WRITE_RD [i]->read(), request [context].front()._write_rd ); |
---|
1557 | if (request [context].front()._write_rd) |
---|
1558 | TEST(Tgeneral_address_t, out_DECOD_NUM_REG_RD [i]->read(), request [context].front()._num_reg_rd ); |
---|
1559 | TEST(Tcontrol_t , out_DECOD_WRITE_RE [i]->read(), request [context].front()._write_re ); |
---|
1560 | if (request [context].front()._write_re) |
---|
1561 | TEST(Tspecial_address_t, out_DECOD_NUM_REG_RE [i]->read(), request [context].front()._num_reg_re ); |
---|
1562 | TEST(Texception_t , out_DECOD_EXCEPTION_USE [i]->read(), request [context].front()._exception_use); |
---|
1563 | |
---|
1564 | if (request [context].front()._type == TYPE_BRANCH) |
---|
1565 | { |
---|
1566 | delay_slot_next [context] = true; |
---|
1567 | |
---|
1568 | TEST(Tcontrol_t, out_PREDICT_VAL[i]->read(), true); |
---|
1569 | TEST(Tcontrol_t, in_PREDICT_ACK[i]->read(), true); |
---|
1570 | |
---|
1571 | LABEL("PREDICT [%d] : transaction",i ); |
---|
1572 | |
---|
1573 | if (_param->_have_port_context_id) |
---|
1574 | TEST(Tcontext_t , out_PREDICT_CONTEXT_ID [i]->read(), context); |
---|
1575 | TEST(Tcontrol_t , out_PREDICT_MATCH_INST_IFETCH_PTR [i]->read(),((request [context].front()._address)%_param->_nb_inst_fetch[context]) == 0); |
---|
1576 | TEST(Tbranch_state_t , out_PREDICT_BRANCH_STATE [i]->read(), request [context].front()._branch_state ); |
---|
1577 | if (_param->_have_port_branch_update_prediction_id) |
---|
1578 | TEST(Tprediction_ptr_t , out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i]->read(), request [context].front()._branch_update_prediction_id); |
---|
1579 | TEST(Tbranch_condition_t, out_PREDICT_BRANCH_CONDITION [i]->read(), request [context].front()._branch_condition ); |
---|
1580 | // TEST(Tcontrol_t , out_PREDICT_BRANCH_STACK_WRITE [i]->read(), request [context].front()._branch_stack_write ); |
---|
1581 | TEST(Tcontrol_t , out_PREDICT_BRANCH_DIRECTION [i]->read(), request [context].front()._branch_direction ); |
---|
1582 | TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_SRC [i]->read(), request [context].front()._address ); |
---|
1583 | TEST(Tgeneral_data_t , out_PREDICT_ADDRESS_DEST [i]->read(), request [context].front()._branch_address_dest ); |
---|
1584 | } |
---|
1585 | else |
---|
1586 | { |
---|
1587 | TEST(Tcontrol_t, out_PREDICT_VAL[i]->read(), false); |
---|
1588 | } |
---|
1589 | |
---|
1590 | TEST(bool, find_event, false); // can continue decod after event |
---|
1591 | if (request [context].front()._context_event_type != EVENT_TYPE_NONE) |
---|
1592 | { |
---|
1593 | find_event = true; |
---|
1594 | |
---|
1595 | LABEL("CONTEXT_EVENT : transaction"); |
---|
1596 | |
---|
1597 | if (_param->_have_port_context_id) |
---|
1598 | TEST(Tcontext_t ,out_CONTEXT_EVENT_CONTEXT_ID ->read(), context); |
---|
1599 | TEST(Tevent_type_t ,out_CONTEXT_EVENT_TYPE ->read(), request [context].front()._context_event_type); |
---|
1600 | TEST(Tcontrol_t ,out_CONTEXT_EVENT_IS_DELAY_SLOT->read(), request [context].front()._is_delay_slot); |
---|
1601 | TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS ->read(), request [context].front()._address ); |
---|
1602 | TEST(Tgeneral_data_t,out_CONTEXT_EVENT_ADDRESS_EPCR ->read(), request [context].front()._address_next ); |
---|
1603 | |
---|
1604 | } |
---|
1605 | |
---|
1606 | TEST(bool, delay_slot_previous [context], false); // can't continue |
---|
1607 | delay_slot_previous [context] = delay_slot_current [context]; |
---|
1608 | delay_slot_current [context] = delay_slot_next [context]; |
---|
1609 | delay_slot_next [context] = false; |
---|
1610 | |
---|
1611 | request [context].pop_front(); |
---|
1612 | nb_inst_decod ++; |
---|
1613 | nb_request --; |
---|
1614 | } |
---|
1615 | |
---|
1616 | TEST(bool, (out_CONTEXT_EVENT_VAL->read() and in_CONTEXT_EVENT_ACK->read()), find_event); |
---|
1617 | TEST(uint32_t, nb_inst_decod, nb_inst_ifetch); |
---|
1618 | |
---|
1619 | SC_START(1); |
---|
1620 | } |
---|
1621 | } |
---|
1622 | |
---|
1623 | /******************************************************** |
---|
1624 | * Simulation - End |
---|
1625 | ********************************************************/ |
---|
1626 | |
---|
1627 | TEST_OK ("End of Simulation"); |
---|
1628 | delete _time; |
---|
1629 | |
---|
1630 | msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); |
---|
1631 | |
---|
1632 | delete in_CLOCK; |
---|
1633 | delete in_NRESET; |
---|
1634 | |
---|
1635 | delete [] in_IFETCH_VAL ; |
---|
1636 | delete [] out_IFETCH_ACK ; |
---|
1637 | delete [] in_IFETCH_INSTRUCTION ; |
---|
1638 | delete [] in_IFETCH_CONTEXT_ID ; |
---|
1639 | delete [] in_IFETCH_ADDRESS ; |
---|
1640 | // delete [] in_IFETCH_ADDRESS_NEXT ; |
---|
1641 | delete [] in_IFETCH_INST_IFETCH_PTR ; |
---|
1642 | delete [] in_IFETCH_BRANCH_STATE ; |
---|
1643 | delete [] in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ; |
---|
1644 | |
---|
1645 | delete [] out_DECOD_VAL ; |
---|
1646 | delete [] in_DECOD_ACK ; |
---|
1647 | delete [] out_DECOD_CONTEXT_ID ; |
---|
1648 | delete [] out_DECOD_DEPTH ; |
---|
1649 | delete [] out_DECOD_TYPE ; |
---|
1650 | delete [] out_DECOD_OPERATION ; |
---|
1651 | delete [] out_DECOD_IS_DELAY_SLOT ; |
---|
1652 | delete [] out_DECOD_ADDRESS ; |
---|
1653 | delete [] out_DECOD_HAS_IMMEDIAT ; |
---|
1654 | delete [] out_DECOD_IMMEDIAT ; |
---|
1655 | delete [] out_DECOD_READ_RA ; |
---|
1656 | delete [] out_DECOD_NUM_REG_RA ; |
---|
1657 | delete [] out_DECOD_READ_RB ; |
---|
1658 | delete [] out_DECOD_NUM_REG_RB ; |
---|
1659 | delete [] out_DECOD_READ_RC ; |
---|
1660 | delete [] out_DECOD_NUM_REG_RC ; |
---|
1661 | delete [] out_DECOD_WRITE_RD ; |
---|
1662 | delete [] out_DECOD_NUM_REG_RD ; |
---|
1663 | delete [] out_DECOD_WRITE_RE ; |
---|
1664 | delete [] out_DECOD_NUM_REG_RE ; |
---|
1665 | delete [] out_DECOD_EXCEPTION_USE ; |
---|
1666 | |
---|
1667 | delete [] out_PREDICT_VAL ; |
---|
1668 | delete [] in_PREDICT_ACK ; |
---|
1669 | delete [] out_PREDICT_CONTEXT_ID ; |
---|
1670 | delete [] out_PREDICT_MATCH_INST_IFETCH_PTR ; |
---|
1671 | delete [] out_PREDICT_BRANCH_STATE ; |
---|
1672 | delete [] out_PREDICT_BRANCH_UPDATE_PREDICTION_ID; |
---|
1673 | delete [] out_PREDICT_BRANCH_CONDITION ; |
---|
1674 | // delete [] out_PREDICT_BRANCH_STACK_WRITE ; |
---|
1675 | delete [] out_PREDICT_BRANCH_DIRECTION ; |
---|
1676 | delete [] out_PREDICT_ADDRESS_SRC ; |
---|
1677 | delete [] out_PREDICT_ADDRESS_DEST ; |
---|
1678 | // delete [] in_PREDICT_CAN_CONTINUE ; |
---|
1679 | |
---|
1680 | delete [] in_CONTEXT_DECOD_ENABLE ; |
---|
1681 | delete [] in_CONTEXT_DEPTH ; |
---|
1682 | |
---|
1683 | delete out_CONTEXT_EVENT_VAL ; |
---|
1684 | delete in_CONTEXT_EVENT_ACK ; |
---|
1685 | delete out_CONTEXT_EVENT_CONTEXT_ID ; |
---|
1686 | delete out_CONTEXT_EVENT_TYPE ; |
---|
1687 | delete out_CONTEXT_EVENT_IS_DELAY_SLOT ; |
---|
1688 | delete out_CONTEXT_EVENT_ADDRESS ; |
---|
1689 | delete out_CONTEXT_EVENT_ADDRESS_EPCR ; |
---|
1690 | #endif |
---|
1691 | |
---|
1692 | delete _Decod; |
---|
1693 | #ifdef STATISTICS |
---|
1694 | delete _parameters_statistics; |
---|
1695 | #endif |
---|
1696 | } |
---|