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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/src/test.cpp @ 82

Last change on this file since 82 was 82, checked in by rosiere, 16 years ago
support locale (now must "just" translate) update all component with new test format update all component with usage New component : decod queue and prediction_unit
Property svn:keywords set to `Id`
File size: 11.7 KB

Line
1	/*
2	* $Id: test.cpp 82 2008-05-01 16:48:45Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX (128*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/SelfTest/include/test.h"
13	#include "Common/include/Test.h"
14	#include "Behavioural/include/Allocation.h"
15
16	void test (string name,
17	morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters * _param)
18	{
19	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
20
21	#ifdef STATISTICS
22	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
23	#endif
24
25	Ifetch_unit * _Ifetch_unit = new Ifetch_unit
26	(name.c_str(),
27	#ifdef STATISTICS
28	_parameters_statistics,
29	#endif
30	_param,
31	USE_ALL);
32
33	#ifdef SYSTEMC
34	/*********************************************************************
35	* Déclarations des signaux
36	*********************************************************************/
37	string rename;
38
39	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
40	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
41
42	ALLOC_SC_SIGNAL (out_ICACHE_REQ_VAL ,"out_ICACHE_REQ_VAL ",Tcontrol_t );
43	ALLOC_SC_SIGNAL ( in_ICACHE_REQ_ACK ," in_ICACHE_REQ_ACK ",Tcontrol_t );
44	//ALLOC_SC_SIGNAL (out_ICACHE_REQ_THREAD_ID ,"out_ICACHE_REQ_THREAD_ID ",Tcontext_t );
45	ALLOC_SC_SIGNAL (out_ICACHE_REQ_PACKET_ID ,"out_ICACHE_REQ_PACKET_ID ",Tpacket_t );
46	ALLOC_SC_SIGNAL (out_ICACHE_REQ_ADDRESS ,"out_ICACHE_REQ_ADDRESS ",Ticache_instruction_t);
47	ALLOC_SC_SIGNAL (out_ICACHE_REQ_TYPE ,"out_ICACHE_REQ_TYPE ",Ticache_type_t );
48	ALLOC_SC_SIGNAL ( in_ICACHE_RSP_VAL ," in_ICACHE_RSP_VAL ",Tcontrol_t );
49	ALLOC_SC_SIGNAL (out_ICACHE_RSP_ACK ,"out_ICACHE_RSP_ACK ",Tcontrol_t );
50	//ALLOC_SC_SIGNAL ( in_ICACHE_RSP_THREAD_ID ," in_ICACHE_RSP_THREAD_ID ",Tcontext_t );
51	ALLOC_SC_SIGNAL ( in_ICACHE_RSP_PACKET_ID ," in_ICACHE_RSP_PACKET_ID ",Tpacket_t );
52	ALLOC1_SC_SIGNAL( in_ICACHE_RSP_INSTRUCTION ," in_ICACHE_RSP_INSTRUCTION ",Ticache_instruction_t,_param->_nb_instruction);
53	ALLOC_SC_SIGNAL ( in_ICACHE_RSP_ERROR ," in_ICACHE_RSP_ERROR ",Ticache_error_t );
54	ALLOC_SC_SIGNAL (out_PREDICT_VAL ,"out_PREDICT_VAL ",Tcontrol_t );
55	ALLOC_SC_SIGNAL ( in_PREDICT_ACK ," in_PREDICT_ACK ",Tcontrol_t );
56	ALLOC_SC_SIGNAL (out_PREDICT_PC_PREVIOUS ,"out_PREDICT_PC_PREVIOUS ",Tgeneral_address_t );
57	ALLOC_SC_SIGNAL (out_PREDICT_PC_CURRENT ,"out_PREDICT_PC_CURRENT ",Tgeneral_address_t );
58	ALLOC_SC_SIGNAL (out_PREDICT_PC_CURRENT_IS_DS_TAKE ,"out_PREDICT_PC_CURRENT_IS_DS_TAKE ",Tcontrol_t );
59	ALLOC_SC_SIGNAL ( in_PREDICT_PC_NEXT ," in_PREDICT_PC_NEXT ",Tgeneral_address_t );
60	ALLOC_SC_SIGNAL ( in_PREDICT_PC_NEXT_IS_DS_TAKE ," in_PREDICT_PC_NEXT_IS_DS_TAKE ",Tcontrol_t );
61	ALLOC1_SC_SIGNAL( in_PREDICT_INSTRUCTION_ENABLE ," in_PREDICT_INSTRUCTION_ENABLE ",Tcontrol_t ,_param->_nb_instruction);
62	ALLOC_SC_SIGNAL ( in_PREDICT_INST_IFETCH_PTR ," in_PREDICT_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t );
63	ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_STATE ," in_PREDICT_BRANCH_STATE ",Tbranch_state_t );
64	ALLOC_SC_SIGNAL ( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID," in_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t );
65	ALLOC1_SC_SIGNAL(out_DECOD_VAL ,"out_DECOD_VAL ",Tcontrol_t ,_param->_nb_instruction);
66	ALLOC1_SC_SIGNAL( in_DECOD_ACK ," in_DECOD_ACK ",Tcontrol_t ,_param->_nb_instruction);
67	ALLOC1_SC_SIGNAL(out_DECOD_INSTRUCTION ,"out_DECOD_INSTRUCTION ",Tinstruction_t ,_param->_nb_instruction);
68	//ALLOC_SC_SIGNAL (out_DECOD_CONTEXT_ID ,"out_DECOD_CONTEXT_ID ",Tcontext_t );
69	ALLOC_SC_SIGNAL (out_DECOD_ADDRESS ,"out_DECOD_ADDRESS ",Tgeneral_address_t );
70	ALLOC_SC_SIGNAL (out_DECOD_INST_IFETCH_PTR ,"out_DECOD_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t );
71	ALLOC_SC_SIGNAL (out_DECOD_BRANCH_STATE ,"out_DECOD_BRANCH_STATE ",Tbranch_state_t );
72	ALLOC_SC_SIGNAL (out_DECOD_BRANCH_UPDATE_PREDICTION_ID ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t );
73	ALLOC_SC_SIGNAL (out_DECOD_EXCEPTION ,"out_DECOD_EXCEPTION ",Texception_t );
74	ALLOC_SC_SIGNAL ( in_EVENT_VAL ," in_EVENT_VAL ",Tcontrol_t );
75	ALLOC_SC_SIGNAL (out_EVENT_ACK ,"out_EVENT_ACK ",Tcontrol_t );
76	ALLOC_SC_SIGNAL ( in_EVENT_ADDRESS ," in_EVENT_ADDRESS ",Tgeneral_address_t );
77
78	/********************************************************
79	* Instanciation
80	********************************************************/
81
82	msg(_("<%s> : Instanciation of _Ifetch_unit.\n"),name.c_str());
83
84	((_Ifetch_unit->in_CLOCK)) ((in_CLOCK));
85	((_Ifetch_unit->in_NRESET)) ((in_NRESET));
86
87	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_VAL );
88	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_REQ_ACK );
89	//INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_THREAD_ID );
90	if (_param->_have_port_queue_ptr)
91	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_PACKET_ID );
92	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_ADDRESS );
93	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_REQ_TYPE );
94	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_VAL );
95	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_ICACHE_RSP_ACK );
96	//INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_THREAD_ID );
97	if (_param->_have_port_queue_ptr)
98	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_PACKET_ID );
99	INSTANCE1_SC_SIGNAL(_Ifetch_unit, in_ICACHE_RSP_INSTRUCTION ,_param->_nb_instruction);
100	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_ICACHE_RSP_ERROR );
101	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_VAL );
102	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_ACK );
103	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_PC_PREVIOUS );
104	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_PC_CURRENT );
105	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_PREDICT_PC_CURRENT_IS_DS_TAKE );
106	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_PC_NEXT );
107	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_PC_NEXT_IS_DS_TAKE );
108	INSTANCE1_SC_SIGNAL(_Ifetch_unit, in_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_instruction);
109	if (_param->_have_port_instruction_ptr)
110	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_INST_IFETCH_PTR );
111	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_BRANCH_STATE );
112	if (_param->_have_port_branch_update_prediction_id)
113	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_PREDICT_BRANCH_UPDATE_PREDICTION_ID);
114	INSTANCE1_SC_SIGNAL(_Ifetch_unit,out_DECOD_VAL ,_param->_nb_instruction);
115	INSTANCE1_SC_SIGNAL(_Ifetch_unit, in_DECOD_ACK ,_param->_nb_instruction);
116	INSTANCE1_SC_SIGNAL(_Ifetch_unit,out_DECOD_INSTRUCTION ,_param->_nb_instruction);
117	//INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_CONTEXT_ID );
118	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_ADDRESS );
119	if (_param->_have_port_instruction_ptr)
120	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_INST_IFETCH_PTR );
121	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_BRANCH_STATE );
122	if (_param->_have_port_branch_update_prediction_id)
123	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_BRANCH_UPDATE_PREDICTION_ID );
124	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_DECOD_EXCEPTION );
125	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_EVENT_VAL );
126	INSTANCE_SC_SIGNAL (_Ifetch_unit,out_EVENT_ACK );
127	INSTANCE_SC_SIGNAL (_Ifetch_unit, in_EVENT_ADDRESS );
128
129	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
130
131	Time * _time = new Time();
132
133	/********************************************************
134	* Simulation - Begin
135	********************************************************/
136
137	// Initialisation
138
139	const uint32_t seed = 0;
140	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
141
142	srand(seed);
143
144	SC_START(0);
145	LABEL("Initialisation");
146
147	LABEL("Reset");
148	in_NRESET->write(0);
149	SC_START(5);
150	in_NRESET->write(1);
151
152	LABEL("Loop of Test");
153
154	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
155	{
156	LABEL("Iteration %d",iteration);
157
158	SC_START(100);
159	}
160
161	/********************************************************
162	* Simulation - End
163	********************************************************/
164
165	TEST_OK ("End of Simulation");
166	delete _time;
167
168	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
169
170	delete in_CLOCK;
171	delete in_NRESET;
172
173	delete out_ICACHE_REQ_VAL ;
174	delete in_ICACHE_REQ_ACK ;
175	//delete out_ICACHE_REQ_THREAD_ID ;
176	delete out_ICACHE_REQ_PACKET_ID ;
177	delete out_ICACHE_REQ_ADDRESS ;
178	delete out_ICACHE_REQ_TYPE ;
179
180	delete in_ICACHE_RSP_VAL ;
181	delete out_ICACHE_RSP_ACK ;
182	//delete in_ICACHE_RSP_THREAD_ID ;
183	delete in_ICACHE_RSP_PACKET_ID ;
184	delete [] in_ICACHE_RSP_INSTRUCTION ;
185	delete in_ICACHE_RSP_ERROR ;
186
187	delete out_PREDICT_VAL ;
188	delete in_PREDICT_ACK ;
189	delete out_PREDICT_PC_PREVIOUS ;
190	delete out_PREDICT_PC_CURRENT ;
191	delete out_PREDICT_PC_CURRENT_IS_DS_TAKE ;
192	delete in_PREDICT_PC_NEXT ;
193	delete in_PREDICT_PC_NEXT_IS_DS_TAKE ;
194	delete [] in_PREDICT_INSTRUCTION_ENABLE ;
195	delete in_PREDICT_INST_IFETCH_PTR ;
196	delete in_PREDICT_BRANCH_STATE ;
197	delete in_PREDICT_BRANCH_UPDATE_PREDICTION_ID ;
198
199	delete [] out_DECOD_VAL ;
200	delete [] in_DECOD_ACK ;
201	delete [] out_DECOD_INSTRUCTION ;
202	//delete out_DECOD_CONTEXT_ID ;
203	delete out_DECOD_ADDRESS ;
204	delete out_DECOD_INST_IFETCH_PTR ;
205	delete out_DECOD_BRANCH_STATE ;
206	delete out_DECOD_BRANCH_UPDATE_PREDICTION_ID ;
207	delete out_DECOD_EXCEPTION ;
208
209	delete in_EVENT_VAL ;
210	delete out_EVENT_ACK ;
211	delete in_EVENT_ADDRESS ;
212	#endif
213
214	delete _Ifetch_unit;
215	#ifdef STATISTICS
216	delete _parameters_statistics;
217	#endif
218	}

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