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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp @ 112

Last change on this file since 112 was 112, checked in by rosiere, 15 years ago
1) Stat_list : fix retire old and new register bug 2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step) 3) Model : add class Model (cf Morpheo.sim) 4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array. 5) Script : add distexe.sh 6) Add Comparator, Multiplier, Divider. But this component are not implemented 7) Software : add Dhrystone
Property svn:keywords set to `Id`
File size: 32.2 KB

Line
1	/*
2	* $Id: test.cpp 112 2009-03-18 22:36:26Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX (128*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/include/test.h"
13	#include "Common/include/Test.h"
14	#include "Behavioural/include/Allocation.h"
15	#include <list>
16
17
18	class entry_t
19	{
20	public : bool _is_free ;
21	public : bool _is_link ;
22	public : bool _is_valid;
23	public : uint32_t _counter ;
24	};
25
26
27	void test (string name,
28	morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters * _param)
29	{
30	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
31
32	#ifdef STATISTICS
33	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
34	#endif
35
36	Tusage_t _usage = USE_ALL;
37
38	// _usage = usage_unset(_usage,USE_SYSTEMC );
39	// _usage = usage_unset(_usage,USE_VHDL );
40	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH );
41	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
42	// _usage = usage_unset(_usage,USE_POSITION );
43	// _usage = usage_unset(_usage,USE_STATISTICS );
44	// _usage = usage_unset(_usage,USE_INFORMATION );
45
46	Stat_List_unit * _Stat_List_unit = new Stat_List_unit
47	(name.c_str(),
48	#ifdef STATISTICS
49	_parameters_statistics,
50	#endif
51	_param,
52	_usage);
53
54	#ifdef SYSTEMC
55	/*********************************************************************
56	* Déclarations des signaux
57	*********************************************************************/
58	string rename;
59
60	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
61	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
62
63	ALLOC1_SC_SIGNAL( in_INSERT_VAL ," in_INSERT_VAL ",Tcontrol_t ,_param->_nb_inst_insert);
64	ALLOC1_SC_SIGNAL(out_INSERT_ACK ,"out_INSERT_ACK ",Tcontrol_t ,_param->_nb_inst_insert);
65	ALLOC1_SC_SIGNAL( in_INSERT_READ_RA ," in_INSERT_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert);
66	ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY ," in_INSERT_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert);
67	ALLOC1_SC_SIGNAL( in_INSERT_READ_RB ," in_INSERT_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert);
68	ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY ," in_INSERT_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert);
69	ALLOC1_SC_SIGNAL( in_INSERT_READ_RC ," in_INSERT_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert);
70	ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY ," in_INSERT_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert);
71	ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RD ," in_INSERT_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert);
72	ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW," in_INSERT_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert);
73	ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RE ," in_INSERT_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert);
74	ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW," in_INSERT_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert);
75	ALLOC1_SC_SIGNAL( in_RETIRE_VAL ," in_RETIRE_VAL ",Tcontrol_t ,_param->_nb_inst_retire);
76	ALLOC1_SC_SIGNAL(out_RETIRE_ACK ,"out_RETIRE_ACK ",Tcontrol_t ,_param->_nb_inst_retire);
77	ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE ," in_RETIRE_RESTORE ",Tcontrol_t ,_param->_nb_inst_retire);
78	ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA ," in_RETIRE_READ_RA ",Tcontrol_t ,_param->_nb_inst_retire);
79	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY ," in_RETIRE_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_retire);
80	ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB ," in_RETIRE_READ_RB ",Tcontrol_t ,_param->_nb_inst_retire);
81	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY ," in_RETIRE_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_retire);
82	ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC ," in_RETIRE_READ_RC ",Tcontrol_t ,_param->_nb_inst_retire);
83	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY ," in_RETIRE_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_retire);
84	ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD ," in_RETIRE_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_retire);
85	ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RD_PHY_OLD," in_RETIRE_RESTORE_RD_PHY_OLD",Tcontrol_t ,_param->_nb_inst_retire);
86	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD," in_RETIRE_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_retire);
87	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW," in_RETIRE_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_retire);
88	ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RE ," in_RETIRE_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_retire);
89	ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RE_PHY_OLD," in_RETIRE_RESTORE_RE_PHY_OLD",Tcontrol_t ,_param->_nb_inst_retire);
90	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD," in_RETIRE_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_retire);
91	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW," in_RETIRE_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_retire);
92	ALLOC1_SC_SIGNAL(out_PUSH_GPR_VAL ,"out_PUSH_GPR_VAL ",Tcontrol_t ,_param->_nb_reg_free);
93	ALLOC1_SC_SIGNAL( in_PUSH_GPR_ACK ," in_PUSH_GPR_ACK ",Tcontrol_t ,_param->_nb_reg_free);
94	ALLOC1_SC_SIGNAL(out_PUSH_GPR_NUM_REG ,"out_PUSH_GPR_NUM_REG ",Tgeneral_address_t,_param->_nb_reg_free);
95	ALLOC1_SC_SIGNAL(out_PUSH_SPR_VAL ,"out_PUSH_SPR_VAL ",Tcontrol_t ,_param->_nb_reg_free);
96	ALLOC1_SC_SIGNAL( in_PUSH_SPR_ACK ," in_PUSH_SPR_ACK ",Tcontrol_t ,_param->_nb_reg_free);
97	ALLOC1_SC_SIGNAL(out_PUSH_SPR_NUM_REG ,"out_PUSH_SPR_NUM_REG ",Tspecial_address_t,_param->_nb_reg_free);
98
99
100	/********************************************************
101	* Instanciation
102	********************************************************/
103
104	msg(_("<%s> : Instanciation of _Stat_List_unit.\n"),name.c_str());
105
106	((_Stat_List_unit->in_CLOCK)) ((in_CLOCK));
107	((_Stat_List_unit->in_NRESET)) ((in_NRESET));
108
109	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_VAL ,_param->_nb_inst_insert);
110	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_INSERT_ACK ,_param->_nb_inst_insert);
111	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RA ,_param->_nb_inst_insert);
112	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert);
113	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RB ,_param->_nb_inst_insert);
114	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert);
115	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RC ,_param->_nb_inst_insert);
116	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert);
117	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RD ,_param->_nb_inst_insert);
118	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert);
119	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RE ,_param->_nb_inst_insert);
120	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
121
122	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_VAL ,_param->_nb_inst_retire);
123	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_RETIRE_ACK ,_param->_nb_inst_retire);
124	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE ,_param->_nb_inst_retire);
125	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RA ,_param->_nb_inst_retire);
126	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RA_PHY ,_param->_nb_inst_retire);
127	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RB ,_param->_nb_inst_retire);
128	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RB_PHY ,_param->_nb_inst_retire);
129	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RC ,_param->_nb_inst_retire);
130	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RC_PHY ,_param->_nb_inst_retire);
131	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RD ,_param->_nb_inst_retire);
132	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire);
133	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire);
134	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire);
135	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RE ,_param->_nb_inst_retire);
136	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire);
137	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire);
138	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire);
139
140	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_GPR_VAL ,_param->_nb_reg_free);
141	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_PUSH_GPR_ACK ,_param->_nb_reg_free);
142	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_GPR_NUM_REG ,_param->_nb_reg_free);
143
144	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_SPR_VAL ,_param->_nb_reg_free);
145	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_PUSH_SPR_ACK ,_param->_nb_reg_free);
146	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_SPR_NUM_REG ,_param->_nb_reg_free);
147
148	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
149
150	Time * _time = new Time();
151
152	/********************************************************
153	* Simulation - Begin
154	********************************************************/
155
156	// Initialisation
157
158	const uint32_t seed = 0;
159	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
160
161	srand(seed);
162
163	int32_t percent_transaction_insert = 95;
164	int32_t percent_transaction_retire = 95;
165	int32_t percent_transaction_push = 95;
166
167	uint32_t nb_thread = 0;
168	for (uint32_t i=0; i<_param->_nb_front_end; i++)
169	nb_thread += _param->_nb_context [i];
170
171	SC_START(0);
172	LABEL("Initialisation");
173
174	LABEL("Reset");
175	in_NRESET->write(0);
176	SC_START(5);
177	in_NRESET->write(1);
178
179	LABEL("Loop of Test");
180
181	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
182	{
183	LABEL("Iteration %d",iteration);
184
185	entry_t gpr_status [_param->_nb_general_register];
186	entry_t spr_status [_param->_nb_special_register];
187
188	for (uint32_t i=0; i<_param->_nb_general_register; i++)
189	{
190	gpr_status[i]._is_free = false;
191	gpr_status[i]._is_link = (i<(nb_thread*31+1));
192	gpr_status[i]._is_valid = true;
193	gpr_status[i]._counter = 0;
194	}
195	for (uint32_t i=0; i<_param->_nb_special_register; i++)
196	{
197	spr_status[i]._is_free = false;
198	spr_status[i]._is_link = (i<(nb_thread*2));
199	spr_status[i]._is_valid = true;
200	spr_status[i]._counter = 0;
201	}
202
203	std::list<Tgeneral_address_t> free_list_gpr;
204	std::list<Tgeneral_address_t> free_list_spr;
205
206	// Test free register
207	while ((free_list_gpr.size() < (_param->_nb_general_register - (nb_thread*31+1))) and
208	(free_list_spr.size() < (_param->_nb_special_register - (nb_thread*2 ))))
209	{
210	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
211	in_INSERT_VAL [i]->write(0);
212	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
213	in_RETIRE_VAL [i]->write(0);
214
215	for (uint32_t i=0; i<_param->_nb_reg_free; i++)
216	{
217	in_PUSH_GPR_ACK [i]->write((rand()%100)<percent_transaction_push);
218	in_PUSH_SPR_ACK [i]->write((rand()%100)<percent_transaction_push);
219	}
220
221	SC_START(0);
222
223	for (uint32_t i=0; i<_param->_nb_reg_free; i++)
224	{
225	if (out_PUSH_GPR_VAL [i]->read() and in_PUSH_GPR_ACK [i]->read())
226	{
227	Tgeneral_address_t reg = out_PUSH_GPR_NUM_REG [i]->read();
228
229	LABEL("PUSH_GPR [%d] - Accepted",i);
230	LABEL(" * reg : %d",reg);
231	LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free );
232	LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link );
233	LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid);
234	LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter );
235
236	TEST(bool, true,((gpr_status[reg]._is_free == 0) and
237	(gpr_status[reg]._is_link == 0) and
238	(gpr_status[reg]._is_valid == 1)// and
239	// (gpr_status[reg]._counter == 0)
240	));
241
242	gpr_status[reg]._is_free = 1;
243	free_list_gpr.push_back(reg);
244	}
245
246	if (out_PUSH_SPR_VAL [i]->read() and in_PUSH_SPR_ACK [i]->read())
247	{
248	Tspecial_address_t reg = out_PUSH_SPR_NUM_REG [i]->read();
249
250	LABEL("PUSH_SPR [%d] - Accepted",i);
251	LABEL(" * reg : %d",reg);
252	LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free );
253	LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link );
254	LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid);
255	LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter );
256
257	TEST(bool, true,((spr_status[reg]._is_free == 0) and
258	(spr_status[reg]._is_link == 0) and
259	(spr_status[reg]._is_valid == 1)// and
260	// (spr_status[reg]._counter == 0)
261	));
262
263	spr_status[reg]._is_free = 1;
264	free_list_spr.push_back(reg);
265	}
266	}
267
268	SC_START(1);
269	}
270
271	LABEL("=======================");
272	LABEL("===== END OF INIT =====");
273	LABEL("=======================");
274
275	int32_t nb_cycle = 64;
276
277	while (nb_cycle > 0)
278	{
279	std::list<Tgeneral_address_t>::iterator it_gpr = free_list_gpr.begin();
280	std::list<Tspecial_address_t>::iterator it_spr = free_list_spr.begin();
281
282
283	entry_t gpr_status_insert [_param->_nb_general_register];
284	entry_t spr_status_insert [_param->_nb_special_register];
285	entry_t gpr_status_retire [_param->_nb_general_register];
286	entry_t spr_status_retire [_param->_nb_special_register];
287
288	for (uint32_t i=0; i<_param->_nb_general_register; i++)
289	{
290	gpr_status_insert [i] = gpr_status[i];
291	gpr_status_retire [i] = gpr_status[i];
292	}
293	for (uint32_t i=0; i<_param->_nb_special_register; i++)
294	{
295	spr_status_insert [i] = spr_status[i];
296	spr_status_retire [i] = spr_status[i];
297	}
298
299	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
300	{
301	Tgeneral_address_t ra = (rand()%(_param->_nb_general_register-1))+1;
302	Tgeneral_address_t rb = (rand()%(_param->_nb_general_register-1))+1;
303	Tspecial_address_t rc = (rand()%(_param->_nb_special_register )) ;
304	Tgeneral_address_t rd = (it_gpr != free_list_gpr.end())?*it_gpr:0;
305	Tspecial_address_t re = (it_spr != free_list_spr.end())?*it_spr:0;
306
307	Tcontrol_t read_ra = (gpr_status_insert[ra]._is_link); // and (gpr_status_insert[ra]._counter < _param->_max_reader);
308	Tcontrol_t read_rb = (gpr_status_insert[rb]._is_link); // and (gpr_status_insert[rb]._counter < _param->_max_reader);
309	Tcontrol_t read_rc = (spr_status_insert[rc]._is_link); // and (spr_status_insert[rc]._counter < _param->_max_reader);
310	Tcontrol_t write_rd = (it_gpr != free_list_gpr.end());
311	Tcontrol_t write_re = (it_spr != free_list_spr.end());
312
313	in_INSERT_VAL [i]->write((rand()%100) < percent_transaction_insert);
314	in_INSERT_READ_RA [i]->write(read_ra );
315	in_INSERT_NUM_REG_RA_PHY [i]->write(ra);
316	in_INSERT_READ_RB [i]->write(read_rb );
317	in_INSERT_NUM_REG_RB_PHY [i]->write(rb);
318	in_INSERT_READ_RC [i]->write(read_rc );
319	in_INSERT_NUM_REG_RC_PHY [i]->write(rc);
320	in_INSERT_WRITE_RD [i]->write(write_rd);
321	in_INSERT_NUM_REG_RD_PHY_NEW [i]->write(rd);
322	in_INSERT_WRITE_RE [i]->write(write_re);
323	in_INSERT_NUM_REG_RE_PHY_NEW [i]->write(re);
324
325	if (read_ra)
326	gpr_status_insert[ra]._counter++;
327	if (read_rb)
328	gpr_status_insert[rb]._counter++;
329	if (read_rc)
330	spr_status_insert[rc]._counter++;
331	if (write_rd)
332	it_gpr ++;
333	if (write_re)
334	it_spr ++;
335	}
336
337	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
338	{
339	Tgeneral_address_t ra = (rand()%(_param->_nb_general_register-1))+1;
340	Tgeneral_address_t rb = (rand()%(_param->_nb_general_register-1))+1;
341	Tspecial_address_t rc = (rand()%(_param->_nb_special_register )) ;
342	Tgeneral_address_t rd_old = (rand()%(_param->_nb_general_register-1))+1;
343	Tgeneral_address_t rd_new = (rand()%(_param->_nb_general_register-1))+1;
344	Tspecial_address_t re_old = (rand()%(_param->_nb_special_register )) ;
345	Tspecial_address_t re_new = (rand()%(_param->_nb_special_register )) ;
346
347	Tcontrol_t read_ra = (gpr_status_retire[ra]._is_link); // and (gpr_status_retire[ra]._counter > 0);
348	Tcontrol_t read_rb = (gpr_status_retire[rb]._is_link); // and (gpr_status_retire[rb]._counter > 0);
349	Tcontrol_t read_rc = (spr_status_retire[rc]._is_link); // and (spr_status_retire[rc]._counter > 0);
350	Tcontrol_t write_rd = ( (gpr_status_retire[rd_old]._is_link ) and
351	(gpr_status_retire[rd_old]._is_valid) and
352	(gpr_status_retire[rd_new]._is_link ) and
353	not (gpr_status_retire[rd_new]._is_valid));
354	Tcontrol_t write_re = ( (spr_status_retire[re_old]._is_link ) and
355	(spr_status_retire[re_old]._is_valid) and
356	(spr_status_retire[re_new]._is_link ) and
357	not (spr_status_retire[re_new]._is_valid));
358
359	in_RETIRE_VAL [i]->write((rand()%100) < percent_transaction_retire);
360	in_RETIRE_READ_RA [i]->write(read_ra );
361	in_RETIRE_RESTORE [i]->write(0);
362	in_RETIRE_NUM_REG_RA_PHY [i]->write(ra);
363	in_RETIRE_READ_RB [i]->write(read_rb );
364	in_RETIRE_NUM_REG_RB_PHY [i]->write(rb);
365	in_RETIRE_READ_RC [i]->write(read_rc );
366	in_RETIRE_NUM_REG_RC_PHY [i]->write(rc);
367	in_RETIRE_WRITE_RD [i]->write(write_rd);
368	in_RETIRE_RESTORE_RD_PHY_OLD [i]->write(0);
369	in_RETIRE_NUM_REG_RD_PHY_OLD [i]->write(rd_old);
370	in_RETIRE_NUM_REG_RD_PHY_NEW [i]->write(rd_new);
371	in_RETIRE_WRITE_RE [i]->write(write_re);
372	in_RETIRE_RESTORE_RE_PHY_OLD [i]->write(0);
373	in_RETIRE_NUM_REG_RE_PHY_OLD [i]->write(re_old);
374	in_RETIRE_NUM_REG_RE_PHY_NEW [i]->write(re_new);
375
376	if (read_ra)
377	{
378	gpr_status_retire[ra]._counter --;
379	}
380	if (read_rb)
381	{
382	gpr_status_retire[rb]._counter --;
383	}
384	if (read_rc)
385	{
386	spr_status_retire[rc]._counter --;
387	}
388	if (write_rd)
389	{
390	gpr_status_retire[rd_old]._is_link = 0;
391	gpr_status_retire[rd_new]._is_valid = 1;
392	}
393	if (write_re)
394	{
395	spr_status_retire[re_old]._is_link = 0;
396	spr_status_retire[re_new]._is_valid = 1;
397	}
398
399	}
400
401
402	for (uint32_t i=0; i<_param->_nb_reg_free; i++)
403	{
404	in_PUSH_GPR_ACK [i]->write((rand()%100)<percent_transaction_push);
405	in_PUSH_SPR_ACK [i]->write((rand()%100)<percent_transaction_push);
406	}
407
408	SC_START(0);
409
410	it_gpr = free_list_gpr.begin();
411	it_spr = free_list_spr.begin();
412
413	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
414	{
415	Tcontrol_t write_rd = in_INSERT_WRITE_RD [i]->read();
416	Tcontrol_t write_re = in_INSERT_WRITE_RE [i]->read();
417
418	if (in_INSERT_VAL [i]->read() and out_INSERT_ACK [i]->read())
419	{
420	Tcontrol_t read_ra = in_INSERT_READ_RA [i]->read();
421	Tgeneral_address_t ra = in_INSERT_NUM_REG_RA_PHY [i]->read();
422	Tcontrol_t read_rb = in_INSERT_READ_RB [i]->read();
423	Tgeneral_address_t rb = in_INSERT_NUM_REG_RB_PHY [i]->read();
424	Tcontrol_t read_rc = in_INSERT_READ_RC [i]->read();
425	Tspecial_address_t rc = in_INSERT_NUM_REG_RC_PHY [i]->read();
426	Tgeneral_address_t rd_new = in_INSERT_NUM_REG_RD_PHY_NEW [i]->read();
427	Tspecial_address_t re_new = in_INSERT_NUM_REG_RE_PHY_NEW [i]->read();
428
429	LABEL("INSERT [%d] - Accepted",i);
430	LABEL(" * read_ra : %d",read_ra );
431	LABEL(" * reg_ra : %d",ra );
432	LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free );
433	LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link );
434	LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
435	LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter );
436	LABEL(" * read_rb : %d",read_rb );
437	LABEL(" * reg_rb : %d",rb );
438	LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free );
439	LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link );
440	LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
441	LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter );
442	LABEL(" * read_rc : %d",read_rc );
443	LABEL(" * reg_rc : %d",rc );
444	LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free );
445	LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link );
446	LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
447	LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter );
448	LABEL(" * read_rd : %d",write_rd);
449	LABEL(" * reg_rd_new : %d",rd_new );
450	LABEL(" * status[%d]._is_free : %d",rd_new,spr_status[rd_new]._is_free );
451	LABEL(" * status[%d]._is_link : %d",rd_new,spr_status[rd_new]._is_link );
452	LABEL(" * status[%d]._is_valid : %d",rd_new,spr_status[rd_new]._is_valid);
453	LABEL(" * status[%d]._counter : %d",rd_new,spr_status[rd_new]._counter );
454	LABEL(" * read_re : %d",write_re);
455	LABEL(" * reg_re_new : %d",re_new );
456	LABEL(" * status[%d]._is_free : %d",re_new,spr_status[re_new]._is_free );
457	LABEL(" * status[%d]._is_link : %d",re_new,spr_status[re_new]._is_link );
458	LABEL(" * status[%d]._is_valid : %d",re_new,spr_status[re_new]._is_valid);
459	LABEL(" * status[%d]._counter : %d",re_new,spr_status[re_new]._counter );
460
461	if (read_ra)
462	{
463	gpr_status[ra]._counter ++;
464	}
465	if (read_rb)
466	{
467	gpr_status[rb]._counter ++;
468	}
469	if (read_rc)
470	{
471	spr_status[rc]._counter ++;
472	}
473	if (write_rd)
474	{
475	Tgeneral_address_t reg = *it_gpr;
476	TEST(Tgeneral_address_t,reg,rd_new);
477
478	it_gpr = free_list_gpr.erase(it_gpr);
479
480	gpr_status[reg]._is_free = 0;
481	gpr_status[reg]._is_link = 1;
482	gpr_status[reg]._is_valid = 0;
483	}
484
485	if (write_re)
486	{
487	Tspecial_address_t reg = *it_spr;
488	TEST(Tspecial_address_t,reg,re_new);
489
490	it_spr = free_list_spr.erase(it_spr);
491
492	spr_status[reg]._is_free = 0;
493	spr_status[reg]._is_link = 1;
494	spr_status[reg]._is_valid = 0;
495	}
496	}
497	else
498	{
499	if (write_rd)
500	it_gpr ++;
501	if (write_re)
502	it_spr ++;
503	}
504	}
505
506	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
507	if (in_RETIRE_VAL [i]->read() and out_RETIRE_ACK [i]->read())
508	{
509	Tcontrol_t restore = in_RETIRE_RESTORE [i]->read();
510	Tcontrol_t read_ra = in_RETIRE_READ_RA [i]->read();
511	Tgeneral_address_t ra = in_RETIRE_NUM_REG_RA_PHY [i]->read();
512	Tcontrol_t read_rb = in_RETIRE_READ_RB [i]->read();
513	Tgeneral_address_t rb = in_RETIRE_NUM_REG_RB_PHY [i]->read();
514	Tcontrol_t read_rc = in_RETIRE_READ_RC [i]->read();
515	Tspecial_address_t rc = in_RETIRE_NUM_REG_RC_PHY [i]->read();
516	Tcontrol_t write_rd = in_RETIRE_WRITE_RD [i]->read();
517	Tcontrol_t restore_rd_old = in_RETIRE_RESTORE_RD_PHY_OLD [i]->read();
518	Tgeneral_address_t rd_old = in_RETIRE_NUM_REG_RD_PHY_OLD [i]->read();
519	Tgeneral_address_t rd_new = in_RETIRE_NUM_REG_RD_PHY_NEW [i]->read();
520	Tcontrol_t write_re = in_RETIRE_WRITE_RE [i]->read();
521	Tcontrol_t restore_re_old = in_RETIRE_RESTORE_RE_PHY_OLD [i]->read();
522	Tgeneral_address_t re_old = in_RETIRE_NUM_REG_RE_PHY_OLD [i]->read();
523	Tgeneral_address_t re_new = in_RETIRE_NUM_REG_RE_PHY_NEW [i]->read();
524
525	LABEL("RETIRE [%d] - Accepted",i);
526	LABEL(" * restore : %d",restore);
527	LABEL(" * read_ra : %d",read_ra );
528	LABEL(" * reg_ra : %d",ra );
529	LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free );
530	LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link );
531	LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
532	LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter );
533	LABEL(" * read_rb : %d",read_rb );
534	LABEL(" * reg_rb : %d",rb );
535	LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free );
536	LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link );
537	LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
538	LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter );
539	LABEL(" * read_rc : %d",read_rc );
540	LABEL(" * reg_rc : %d",rc );
541	LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free );
542	LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link );
543	LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
544	LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter );
545	LABEL(" * read_rd : %d",write_rd);
546	LABEL(" * restore_rd_old : %d",restore_rd_old);
547	LABEL(" * reg_rd_old : %d",rd_old );
548	LABEL(" * status[%d]._is_free : %d",rd_old,spr_status[rd_old]._is_free );
549	LABEL(" * status[%d]._is_link : %d",rd_old,spr_status[rd_old]._is_link );
550	LABEL(" * status[%d]._is_valid : %d",rd_old,spr_status[rd_old]._is_valid);
551	LABEL(" * status[%d]._counter : %d",rd_old,spr_status[rd_old]._counter );
552	LABEL(" * reg_rd_new : %d",rd_new );
553	LABEL(" * status[%d]._is_free : %d",rd_new,spr_status[rd_new]._is_free );
554	LABEL(" * status[%d]._is_link : %d",rd_new,spr_status[rd_new]._is_link );
555	LABEL(" * status[%d]._is_valid : %d",rd_new,spr_status[rd_new]._is_valid);
556	LABEL(" * status[%d]._counter : %d",rd_new,spr_status[rd_new]._counter );
557	LABEL(" * read_re : %d",write_re);
558	LABEL(" * restore_re_old : %d",restore_re_old);
559	LABEL(" * reg_re_old : %d",re_old );
560	LABEL(" * status[%d]._is_free : %d",re_old,spr_status[re_old]._is_free );
561	LABEL(" * status[%d]._is_link : %d",re_old,spr_status[re_old]._is_link );
562	LABEL(" * status[%d]._is_valid : %d",re_old,spr_status[re_old]._is_valid);
563	LABEL(" * status[%d]._counter : %d",re_old,spr_status[re_old]._counter );
564	LABEL(" * reg_re_new : %d",re_new );
565	LABEL(" * status[%d]._is_free : %d",re_new,spr_status[re_new]._is_free );
566	LABEL(" * status[%d]._is_link : %d",re_new,spr_status[re_new]._is_link );
567	LABEL(" * status[%d]._is_valid : %d",re_new,spr_status[re_new]._is_valid);
568	LABEL(" * status[%d]._counter : %d",re_new,spr_status[re_new]._counter );
569
570	if (read_ra)
571	{
572	gpr_status[ra]._counter --;
573	}
574	if (read_rb)
575	{
576	gpr_status[rb]._counter --;
577	}
578	if (read_rc)
579	{
580	spr_status[rc]._counter --;
581	}
582	if (write_rd)
583	{
584	if (restore)
585	{
586	if (restore_rd_old)
587	{
588	gpr_status[rd_old]._is_link = 1;
589	gpr_status[rd_new]._is_link = 0;
590	gpr_status[rd_new]._is_valid = 1;
591	}
592	else
593	{
594	gpr_status[rd_old]._is_link = 0;
595	gpr_status[rd_new]._is_link = 0;
596	gpr_status[rd_new]._is_valid = 1;
597	}
598	}
599	else
600	{
601	gpr_status[rd_old]._is_link = 0;
602	gpr_status[rd_new]._is_valid = 1;
603	}
604
605	}
606	if (write_re)
607	{
608	if (restore_re_old)
609	{
610	spr_status[re_old]._is_link = 1;
611	spr_status[re_new]._is_link = 0;
612	spr_status[re_new]._is_valid = 1;
613	}
614	else
615	{
616	spr_status[re_old]._is_link = 0;
617	spr_status[re_new]._is_valid = 1;
618	}
619	}
620	}
621
622
623	for (uint32_t i=0; i<_param->_nb_reg_free; i++)
624	{
625	if (out_PUSH_GPR_VAL [i]->read() and in_PUSH_GPR_ACK [i]->read())
626	{
627	Tgeneral_address_t reg = out_PUSH_GPR_NUM_REG [i]->read();
628
629	LABEL("PUSH_GPR [%d] - Accepted",i);
630	LABEL(" * reg : %d",reg);
631	LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free );
632	LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link );
633	LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid);
634	LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter );
635
636	TEST(bool, true,((gpr_status[reg]._is_free == 0) and
637	(gpr_status[reg]._is_link == 0) and
638	(gpr_status[reg]._is_valid == 1)// and
639	// (gpr_status[reg]._counter == 0)
640	));
641
642	gpr_status[reg]._is_free = 1;
643	free_list_gpr.push_back(reg);
644	}
645
646	if (out_PUSH_SPR_VAL [i]->read() and in_PUSH_SPR_ACK [i]->read())
647	{
648	Tspecial_address_t reg = out_PUSH_SPR_NUM_REG [i]->read();
649
650	LABEL("PUSH_SPR [%d] - Accepted",i);
651	LABEL(" * reg : %d",reg);
652	LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free );
653	LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link );
654	LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid);
655	LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter );
656
657	TEST(bool, true,((spr_status[reg]._is_free == 0) and
658	(spr_status[reg]._is_link == 0) and
659	(spr_status[reg]._is_valid == 1)// and
660	// (spr_status[reg]._counter == 0)
661	));
662
663	spr_status[reg]._is_free = 1;
664	free_list_spr.push_back(reg);
665	}
666	}
667
668	SC_START(1);
669	nb_cycle --;
670	}
671	}
672
673	/********************************************************
674	* Simulation - End
675	********************************************************/
676
677	TEST_OK ("End of Simulation");
678	delete _time;
679
680	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
681
682	delete in_CLOCK;
683	delete in_NRESET;
684
685	delete [] in_INSERT_VAL ;
686	delete [] out_INSERT_ACK ;
687	delete [] in_INSERT_READ_RA ;
688	delete [] in_INSERT_NUM_REG_RA_PHY ;
689	delete [] in_INSERT_READ_RB ;
690	delete [] in_INSERT_NUM_REG_RB_PHY ;
691	delete [] in_INSERT_READ_RC ;
692	delete [] in_INSERT_NUM_REG_RC_PHY ;
693	delete [] in_INSERT_WRITE_RD ;
694	delete [] in_INSERT_NUM_REG_RD_PHY_NEW;
695	delete [] in_INSERT_WRITE_RE ;
696	delete [] in_INSERT_NUM_REG_RE_PHY_NEW;
697	delete [] in_RETIRE_VAL ;
698	delete [] out_RETIRE_ACK ;
699	delete [] in_RETIRE_RESTORE ;
700	delete [] in_RETIRE_READ_RA ;
701	delete [] in_RETIRE_NUM_REG_RA_PHY ;
702	delete [] in_RETIRE_READ_RB ;
703	delete [] in_RETIRE_NUM_REG_RB_PHY ;
704	delete [] in_RETIRE_READ_RC ;
705	delete [] in_RETIRE_NUM_REG_RC_PHY ;
706	delete [] in_RETIRE_WRITE_RD ;
707	delete [] in_RETIRE_RESTORE_RD_PHY_OLD;
708	delete [] in_RETIRE_NUM_REG_RD_PHY_OLD;
709	delete [] in_RETIRE_NUM_REG_RD_PHY_NEW;
710	delete [] in_RETIRE_WRITE_RE ;
711	delete [] in_RETIRE_RESTORE_RE_PHY_OLD;
712	delete [] in_RETIRE_NUM_REG_RE_PHY_OLD;
713	delete [] in_RETIRE_NUM_REG_RE_PHY_NEW;
714	delete [] out_PUSH_GPR_VAL ;
715	delete [] in_PUSH_GPR_ACK ;
716	delete [] out_PUSH_GPR_NUM_REG ;
717	delete [] out_PUSH_SPR_VAL ;
718	delete [] in_PUSH_SPR_ACK ;
719	delete [] out_PUSH_SPR_NUM_REG ;
720
721	#endif
722
723	delete _Stat_List_unit;
724	#ifdef STATISTICS
725	delete _parameters_statistics;
726	#endif
727	}

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