source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp @ 74

Last change on this file since 74 was 71, checked in by rosiere, 17 years ago

Modification of Statisctics
Add a new systemC component : Load_Store_Queue (tested with one benchmark and one configuration). Store don't supported the Data Buss Error (Load is supported)

File size: 2.2 KB
RevLine 
[2]1#ifdef SYSTEMC
2/*
3 * $Id$
4 *
5 * [ Description ]
6 *
7 */
8
[15]9#include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h"
[2]10
11namespace morpheo                    {
12namespace behavioural                {
13namespace generic                    {
14namespace registerfile               {
[15]15namespace registerfile_monolithic    {
16  void RegisterFile_Monolithic::transition (void)
[2]17  {
[53]18    log_printf(FUNC,RegisterFile,"transition","Begin");
[2]19
[55]20    for (uint32_t i=0; i<_param->_nb_port_write; i++)
[2]21      {
22        // Have a write?
[6]23        if ( PORT_READ(in_WRITE_VAL[i]) == true)
[2]24          {
25#ifdef STATISTICS
[71]26            (*_stat_nb_write) ++;
[2]27#endif   
28
[62]29            Taddress_t address;
30            if (_param->_have_port_address)
31              address = PORT_READ(in_WRITE_ADDRESS[i]);
32            else
33              address = 0;
34
[2]35            Tdata_t    data    = PORT_READ(in_WRITE_DATA   [i]);
36           
[53]37            log_printf(TRACE,RegisterFile,"transition","[%d] <- %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data));
[3]38
[2]39            // Write in registerFile
40            REGISTER_WRITE(reg_DATA[address],data);
41          }
42      }
[55]43    for (uint32_t i=0; i<_param->_nb_port_read_write; i++)
44      {
45        // Have a read_write?
[71]46        if (PORT_READ(in_READ_WRITE_VAL[i]) == true)
47          {
48            if (PORT_READ(in_READ_WRITE_RW [i]) == RW_WRITE)
49              {
[55]50#ifdef STATISTICS
[71]51                (*_stat_nb_write) ++;
[55]52#endif   
[71]53               
54                Taddress_t address;
55                if (_param->_have_port_address)
56                  address = PORT_READ(in_READ_WRITE_ADDRESS[i]);
57                else
58                  address = 0;
59                Tdata_t    data    = PORT_READ(in_READ_WRITE_WDATA  [i]);
60               
61                log_printf(TRACE,RegisterFile,"transition","[%d] <- %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data));
62               
63                // Write in registerFile
64                REGISTER_WRITE(reg_DATA[address],data);
65              }
66#ifdef STATISTICS
[62]67            else
[71]68              {
69                (*_stat_nb_read) ++;
70              }
71#endif   
72          }
[55]73      }
74
[2]75#ifdef STATISTICS
[71]76    for (uint32_t i=0; i<_param->_nb_port_read; i++)
77      if ( PORT_READ(in_READ_VAL [i]) == 1)
78        (*_stat_nb_read) ++;
[2]79#endif   
80
[71]81    end_cycle();
82
[53]83    log_printf(FUNC,RegisterFile,"transition","End");
[2]84  };
85
[15]86}; // end namespace registerfile_monolithic
[2]87}; // end namespace registerfile
88}; // end namespace generic
89}; // end namespace behavioural         
90}; // end namespace morpheo             
91#endif
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