source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_allocation.cpp @ 112

Last change on this file since 112 was 112, checked in by rosiere, 15 years ago

1) Stat_list : fix retire old and new register bug
2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step)
3) Model : add class Model (cf Morpheo.sim)
4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array.
5) Script : add distexe.sh
6) Add Comparator, Multiplier, Divider. But this component are not implemented
7) Software : add Dhrystone
  • Property svn:keywords set to Id
File size: 3.1 KB
RevLine 
[53]1/*
2 * $Id: RegisterFile_Multi_Banked_allocation.cpp 112 2009-03-18 22:36:26Z rosiere $
3 *
[88]4 * [ Description ]
[53]5 *
6 */
7
8#include "Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h"
[112]9#include "Behavioural/include/Allocation.h"
[53]10
11namespace morpheo                    {
12namespace behavioural {
13namespace generic {
14namespace registerfile {
15namespace registerfile_multi_banked {
16
17
18  void RegisterFile_Multi_Banked::allocation (void)
19  {
20    log_printf(FUNC,RegisterFile_Multi_Banked,"allocation","Begin");
21
[82]22    _component   = new Component (_usage);
[53]23
24    Entity * entity = _component->set_entity (_name       
25                                              ,"RegisterFile_Multi_Banked"
26#ifdef POSITION
[75]27                                              ,REGISTER
[53]28#endif
29                                              );
30
31    _interfaces = entity->set_interfaces();
32
[88]33    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
[53]34
35      Interface * interface = _interfaces->set_interface(""
36#ifdef POSITION
37                                                         ,IN
38                                                         ,SOUTH,
[112]39                                                         _("Generalist interface")
[53]40#endif
41                                                         );
42
43     in_CLOCK        = interface->set_signal_clk              ("clock" ,1, CLOCK_VHDL_YES);
44     in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
45
[112]46     // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
47     { 
48       ALLOC1_INTERFACE_BEGIN("read",IN,WEST,_("Interface Read"),_param->_nb_port_read);
[53]49
[112]50       ALLOC1_VALACK_IN ( in_READ_VAL    ,VAL);
51       ALLOC1_VALACK_OUT(out_READ_ACK    ,ACK);
52       ALLOC1_SIGNAL_IN ( in_READ_ADDRESS,"address",Taddress_t, _param->_size_address);
53       ALLOC1_SIGNAL_OUT(out_READ_DATA   ,"data"   ,Tdata_t   , _param->_size_word);
[53]54
[112]55       ALLOC1_INTERFACE_END(_param->_nb_port_read);
56     }
57     
58     // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
59     {
60       ALLOC1_INTERFACE_BEGIN("write",IN,EAST,_("Interface Write"),_param->_nb_port_write);
[53]61
[112]62       ALLOC1_VALACK_IN ( in_WRITE_VAL    ,VAL);
63       ALLOC1_VALACK_OUT(out_WRITE_ACK    ,ACK);
64       ALLOC1_SIGNAL_IN ( in_WRITE_ADDRESS,"address",Taddress_t,_param->_size_address);
65       ALLOC1_SIGNAL_IN ( in_WRITE_DATA   ,"data"   ,Tdata_t   ,_param->_size_word);
[53]66
[112]67       ALLOC1_INTERFACE_END(_param->_nb_port_write);
[53]68      }
69
[88]70    if (usage_is_set(_usage,USE_SYSTEMC))
71      {
[112]72        // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
73        ALLOC2(reg_DATA,Tdata_t,_param->_nb_bank,_param->_nb_word);
[53]74
[112]75        // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
76        ALLOC1(internal_WRITE_VAL    ,bool      ,_param->_nb_port_write);
77        ALLOC1(internal_WRITE_BANK   ,Taddress_t,_param->_nb_port_write);
78        ALLOC1(internal_WRITE_NUM_REG,Taddress_t,_param->_nb_port_write);
[53]79      }
80
[88]81    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
[53]82#ifdef POSITION
[88]83    if (usage_is_set(_usage,USE_POSITION))
84      _component->generate_file();
[53]85#endif
[112]86   
[53]87    log_printf(FUNC,RegisterFile_Multi_Banked,"allocation","End");
88  };
89
90}; // end namespace registerfile_multi_banked
91}; // end namespace registerfile
92}; // end namespace generic
93
94}; // end namespace behavioural
95}; // end namespace morpheo             
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