[53] | 1 | /* |
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| 2 | * $Id: RegisterFile_Multi_Banked_allocation.cpp 112 2009-03-18 22:36:26Z rosiere $ |
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| 3 | * |
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[88] | 4 | * [ Description ] |
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[53] | 5 | * |
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| 6 | */ |
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| 7 | |
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| 8 | #include "Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/RegisterFile_Multi_Banked.h" |
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[112] | 9 | #include "Behavioural/include/Allocation.h" |
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[53] | 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace generic { |
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| 14 | namespace registerfile { |
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| 15 | namespace registerfile_multi_banked { |
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| 16 | |
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| 17 | |
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| 18 | void RegisterFile_Multi_Banked::allocation (void) |
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| 19 | { |
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| 20 | log_printf(FUNC,RegisterFile_Multi_Banked,"allocation","Begin"); |
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| 21 | |
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[82] | 22 | _component = new Component (_usage); |
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[53] | 23 | |
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| 24 | Entity * entity = _component->set_entity (_name |
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| 25 | ,"RegisterFile_Multi_Banked" |
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| 26 | #ifdef POSITION |
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[75] | 27 | ,REGISTER |
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[53] | 28 | #endif |
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| 29 | ); |
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| 30 | |
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| 31 | _interfaces = entity->set_interfaces(); |
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| 32 | |
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[88] | 33 | // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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[53] | 34 | |
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| 35 | Interface * interface = _interfaces->set_interface("" |
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| 36 | #ifdef POSITION |
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| 37 | ,IN |
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| 38 | ,SOUTH, |
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[112] | 39 | _("Generalist interface") |
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[53] | 40 | #endif |
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| 41 | ); |
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| 42 | |
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| 43 | in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES); |
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| 44 | in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); |
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| 45 | |
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[112] | 46 | // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 47 | { |
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| 48 | ALLOC1_INTERFACE_BEGIN("read",IN,WEST,_("Interface Read"),_param->_nb_port_read); |
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[53] | 49 | |
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[112] | 50 | ALLOC1_VALACK_IN ( in_READ_VAL ,VAL); |
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| 51 | ALLOC1_VALACK_OUT(out_READ_ACK ,ACK); |
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| 52 | ALLOC1_SIGNAL_IN ( in_READ_ADDRESS,"address",Taddress_t, _param->_size_address); |
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| 53 | ALLOC1_SIGNAL_OUT(out_READ_DATA ,"data" ,Tdata_t , _param->_size_word); |
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[53] | 54 | |
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[112] | 55 | ALLOC1_INTERFACE_END(_param->_nb_port_read); |
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| 56 | } |
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| 57 | |
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| 58 | // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 59 | { |
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| 60 | ALLOC1_INTERFACE_BEGIN("write",IN,EAST,_("Interface Write"),_param->_nb_port_write); |
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[53] | 61 | |
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[112] | 62 | ALLOC1_VALACK_IN ( in_WRITE_VAL ,VAL); |
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| 63 | ALLOC1_VALACK_OUT(out_WRITE_ACK ,ACK); |
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| 64 | ALLOC1_SIGNAL_IN ( in_WRITE_ADDRESS,"address",Taddress_t,_param->_size_address); |
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| 65 | ALLOC1_SIGNAL_IN ( in_WRITE_DATA ,"data" ,Tdata_t ,_param->_size_word); |
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[53] | 66 | |
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[112] | 67 | ALLOC1_INTERFACE_END(_param->_nb_port_write); |
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[53] | 68 | } |
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| 69 | |
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[88] | 70 | if (usage_is_set(_usage,USE_SYSTEMC)) |
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| 71 | { |
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[112] | 72 | // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 73 | ALLOC2(reg_DATA,Tdata_t,_param->_nb_bank,_param->_nb_word); |
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[53] | 74 | |
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[112] | 75 | // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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| 76 | ALLOC1(internal_WRITE_VAL ,bool ,_param->_nb_port_write); |
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| 77 | ALLOC1(internal_WRITE_BANK ,Taddress_t,_param->_nb_port_write); |
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| 78 | ALLOC1(internal_WRITE_NUM_REG,Taddress_t,_param->_nb_port_write); |
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[53] | 79 | } |
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| 80 | |
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[88] | 81 | // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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[53] | 82 | #ifdef POSITION |
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[88] | 83 | if (usage_is_set(_usage,USE_POSITION)) |
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| 84 | _component->generate_file(); |
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[53] | 85 | #endif |
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[112] | 86 | |
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[53] | 87 | log_printf(FUNC,RegisterFile_Multi_Banked,"allocation","End"); |
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| 88 | }; |
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| 89 | |
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| 90 | }; // end namespace registerfile_multi_banked |
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| 91 | }; // end namespace registerfile |
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| 92 | }; // end namespace generic |
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| 93 | |
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| 94 | }; // end namespace behavioural |
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| 95 | }; // end namespace morpheo |
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