source: trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_vhdl_port.cpp @ 40

Last change on this file since 40 was 40, checked in by rosiere, 17 years ago

Interface et Signal, c'est deux classes enregistres la valeurs des signaux à chaque cycle ... étape préparatoire avan le changement de la classe Vhdl_Testbench

File size: 612 bytes
Line 
1#ifdef VHDL
2/*
3 * $Id$
4 *
5 * [ Description ]
6 *
7 */
8
9#include "Behavioural/@DIRECTORY/include/@COMPONENT.h"
10
11namespace morpheo                    {
12namespace behavioural {
13@NAMESPACE_BEGIN
14
15  void @COMPONENT::vhdl_port (Vhdl & vhdl)
16  {
17    log_printf(FUNC,@COMPONENT,"vhdl_port","Begin");
18
19    _interfaces->set_port(vhdl);
20
21#ifdef VHDL_TESTBENCH
22    _interfaces->set_port(_vhdl_testbench);                     
23   _vhdl_testbench->set_clock    ("in_CLOCK",true);
24#endif   
25
26    log_printf(FUNC,@COMPONENT,"vhdl_port","End");
27  };
28
29@NAMESPACE_END
30}; // end namespace behavioural
31}; // end namespace morpheo             
32#endif
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