[2] | 1 | #ifdef VHDL_TESTBENCH |
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| 2 | /* |
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| 3 | * $Id$ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace stage_1_ifetch { |
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| 14 | namespace predictor { |
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| 15 | namespace meta_predictor { |
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| 16 | namespace two_level_branch_predictor { |
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| 17 | namespace pattern_history_table { |
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| 18 | |
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| 19 | |
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| 20 | void Pattern_History_Table::vhdl_testbench_transition () |
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| 21 | { |
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| 22 | log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_transition","Begin"); |
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| 23 | |
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| 24 | #ifndef SYSTEMCASS_SPECIFIC |
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| 25 | sc_cycle(0); |
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| 26 | #endif |
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| 27 | |
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| 28 | // In order with file Pattern_History_Table_vhdl_testbench_port.cpp |
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| 29 | // Warning : if a output depend of a subcomponent, take directly the port of subcomponent |
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| 30 | // (because we have no control on the ordonnancer's policy) |
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| 31 | |
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| 32 | for (uint32_t i=0; i<_param._nb_prediction; i++) |
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| 33 | { |
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| 34 | _vhdl_testbench->add_input (PORT_READ( in_PREDICT_VAL [i])); |
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| 35 | _vhdl_testbench->add_output (PORT_READ(out_PREDICT_ACK [i])); |
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| 36 | _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS [i])); |
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| 37 | _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_DATA [i])); |
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| 38 | //_vhdl_testbench->add_output (PORT_READ(out_PREDICT_HISTORY [i])); |
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| 39 | } |
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| 40 | |
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| 41 | for (uint32_t i=0; i<_param._nb_branch_complete; i++) |
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| 42 | { |
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[3] | 43 | _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL [i])); |
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| 44 | _vhdl_testbench->add_output (PORT_READ(out_BRANCH_COMPLETE_ACK [i])); |
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| 45 | _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i])); |
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| 46 | _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_HISTORY [i])); |
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| 47 | _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_DIRECTION[i])); |
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[2] | 48 | } |
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[3] | 49 | |
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[2] | 50 | // add_test : |
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| 51 | // - True : the cycle must be compare with the output of systemC |
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| 52 | // - False : no test |
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| 53 | _vhdl_testbench->add_test(true); |
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| 54 | |
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| 55 | _vhdl_testbench->new_cycle (); // always at the end |
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| 56 | |
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| 57 | log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_transition","End"); |
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| 58 | }; |
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| 59 | |
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| 60 | }; // end namespace pattern_history_table |
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| 61 | }; // end namespace two_level_branch_predictor |
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| 62 | }; // end namespace meta_predictor |
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| 63 | }; // end namespace predictor |
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| 64 | }; // end namespace stage_1_ifetch |
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| 65 | |
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| 66 | }; // end namespace behavioural |
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| 67 | }; // end namespace morpheo |
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| 68 | #endif |
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