source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp @ 15

Last change on this file since 15 was 15, checked in by rosiere, 17 years ago

Interface normalisé
Début du banc de registres multi niveaux

File size: 2.9 KB
Line 
1#ifdef VHDL_TESTBENCH
2/*
3 * $Id$
4 *
5 * [ Description ]
6 *
7 */
8
9#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h"
10
11namespace morpheo                    {
12namespace behavioural {
13namespace stage_1_ifetch {
14namespace predictor {
15namespace meta_predictor {
16namespace two_level_branch_predictor {
17
18
19  void Two_Level_Branch_Predictor::vhdl_testbench_transition ()
20  {
21    log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_testbench_transition","Begin");
22
23#ifndef SYSTEMCASS_SPECIFIC
24    sc_cycle(0);
25#endif   
26
27    _vhdl_testbench->add_input (PORT_READ( in_NRESET));
28   
29    // In order with file Two_Level_Branch_Predictor_vhdl_testbench_port.cpp
30    // Warning : if a output depend of a subcomponent, take directly the port of subcomponent
31    // (because we have no control on the ordonnancer's policy)
32
33    for (uint32_t i=0; i<_param._nb_prediction; i++)
34      {
35        _vhdl_testbench->add_input (PORT_READ( in_PREDICT_VAL                          [i]));
36        _vhdl_testbench->add_output(PORT_READ(component_Two_Level_Branch_Predictor_Glue->
37                                              out_PREDICT_ACK                          [i]));
38        _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS                      [i]));
39        if (_param._have_bht)
40        _vhdl_testbench->add_output(PORT_READ(component_Branch_History_Table           ->
41                                              component_RegisterFile                   ->
42                                              out_READ_DATA                            [i]));
43        if (_param._have_pht)
44        _vhdl_testbench->add_output(PORT_READ(component_Pattern_History_Table          ->
45                                              component_RegisterFile                   ->
46                                              out_READ_DATA                            [i]));
47      }
48
49    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
50      {
51        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL                  [i]));
52        _vhdl_testbench->add_output(PORT_READ(component_Two_Level_Branch_Predictor_Glue->
53                                              out_BRANCH_COMPLETE_ACK                  [i]));
54        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS              [i]));
55        if (_param._have_bht)
56        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_BHT_HISTORY          [i]));
57        if (_param._have_pht)
58        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_PHT_HISTORY          [i]));
59        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_DIRECTION            [i]));
60      }
61   
62    // add_test :
63    //  - True  : the cycle must be compare with the output of systemC
64    //  - False : no test
65    _vhdl_testbench->add_test(true);
66
67    _vhdl_testbench->new_cycle (); // always at the end
68
69    log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_testbench_transition","End");
70  };
71
72}; // end namespace two_level_branch_predictor
73}; // end namespace meta_predictor
74}; // end namespace predictor
75}; // end namespace stage_1_ifetch
76
77}; // end namespace behavioural
78}; // end namespace morpheo             
79#endif
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