source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp @ 3

Last change on this file since 3 was 3, checked in by kane, 17 years ago

1) Ajout d'un "printer" XML pour la configuration de paramètres

2) Fin du composant "Two_Level_Branch_Predictor"

validation * systemc

  • vhdl
File size: 2.8 KB
Line 
1#ifdef VHDL_TESTBENCH
2/*
3 * $Id$
4 *
5 * [ Description ]
6 *
7 */
8
9#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h"
10
11namespace morpheo                    {
12namespace behavioural {
13namespace stage_1_ifetch {
14namespace predictor {
15namespace meta_predictor {
16namespace two_level_branch_predictor {
17
18
19  void Two_Level_Branch_Predictor::vhdl_testbench_transition ()
20  {
21    log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_testbench_transition","Begin");
22
23#ifndef SYSTEMCASS_SPECIFIC
24    sc_cycle(0);
25#endif   
26
27    // In order with file Two_Level_Branch_Predictor_vhdl_testbench_port.cpp
28    // Warning : if a output depend of a subcomponent, take directly the port of subcomponent
29    // (because we have no control on the ordonnancer's policy)
30
31    for (uint32_t i=0; i<_param._nb_prediction; i++)
32      {
33        _vhdl_testbench->add_input (PORT_READ( in_PREDICT_VAL                          [i]));
34        _vhdl_testbench->add_output(PORT_READ(component_Two_Level_Branch_Predictor_Glue->
35                                              out_PREDICT_ACK                          [i]));
36        _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS                      [i]));
37        if (_param._have_bht)
38        _vhdl_testbench->add_output(PORT_READ(component_Branch_History_Table           ->
39                                              component_RegisterFile                   ->
40                                              out_READ_DATA                            [i]));
41        if (_param._have_pht)
42        _vhdl_testbench->add_output(PORT_READ(component_Pattern_History_Table          ->
43                                              component_RegisterFile                   ->
44                                              out_READ_DATA                            [i]));
45      }
46
47    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
48      {
49        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL                  [i]));
50        _vhdl_testbench->add_output(PORT_READ(component_Two_Level_Branch_Predictor_Glue->
51                                              out_BRANCH_COMPLETE_ACK                  [i]));
52        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS              [i]));
53        if (_param._have_bht)
54        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_BHT_HISTORY          [i]));
55        if (_param._have_pht)
56        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_PHT_HISTORY          [i]));
57        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_DIRECTION            [i]));
58      }
59   
60    // add_test :
61    //  - True  : the cycle must be compare with the output of systemC
62    //  - False : no test
63    _vhdl_testbench->add_test(true);
64
65    _vhdl_testbench->new_cycle (); // always at the end
66
67    log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_testbench_transition","End");
68  };
69
70}; // end namespace two_level_branch_predictor
71}; // end namespace meta_predictor
72}; // end namespace predictor
73}; // end namespace stage_1_ifetch
74
75}; // end namespace behavioural
76}; // end namespace morpheo             
77#endif
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