[29] | 1 | #ifdef VHDL |
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| 2 | /* |
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| 3 | * $Id$ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/include/Interface.h" |
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| 10 | |
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| 11 | |
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| 12 | namespace morpheo { |
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| 13 | namespace behavioural { |
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| 14 | |
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| 15 | void Interface::set_port (Vhdl * & vhdl) |
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| 16 | { |
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[38] | 17 | log_printf(FUNC,Behavioural,"set_port (Vhdl)","Begin"); |
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[31] | 18 | if (not _list_signal->empty()) |
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[29] | 19 | { |
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[38] | 20 | list<Signal*>::iterator i = _list_signal->begin(); |
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[29] | 21 | |
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[31] | 22 | while (i != _list_signal->end()) |
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[29] | 23 | { |
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[38] | 24 | presence_port_t p = (*i)->_presence_port; |
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[29] | 25 | if ((p == PORT_VHDL_YES_TESTBENCH_YES) or |
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| 26 | (p == PORT_VHDL_YES_TESTBENCH_NO ) ) |
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[38] | 27 | vhdl->set_port ((*i)->_name,(*i)->_direction,(*i)->_size); |
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[29] | 28 | ++i; |
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| 29 | } |
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| 30 | } |
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[38] | 31 | log_printf(FUNC,Behavioural,"set_port (Vhdl)","End"); |
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[29] | 32 | }; |
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| 33 | |
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| 34 | void Interface::set_port (Vhdl_Testbench * & vhdl_testbench) |
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| 35 | { |
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[38] | 36 | log_printf(FUNC,Behavioural,"set_port (Testbench)","Begin"); |
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[31] | 37 | if (not _list_signal->empty()) |
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[29] | 38 | { |
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[38] | 39 | list<Signal*>::iterator i = _list_signal->begin(); |
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[29] | 40 | |
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[31] | 41 | while (i != _list_signal->end()) |
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[29] | 42 | { |
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[38] | 43 | presence_port_t p = (*i)->_presence_port; |
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[29] | 44 | if ((p == PORT_VHDL_YES_TESTBENCH_YES) or |
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| 45 | (p == PORT_VHDL_NO_TESTBENCH_YES ) ) |
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[38] | 46 | vhdl_testbench->set_port ((*i)->_name,(*i)->_direction,(*i)->_size); |
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[29] | 47 | ++i; |
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| 48 | } |
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| 49 | } |
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[38] | 50 | log_printf(FUNC,Behavioural,"set_port (Testbench)","End"); |
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[29] | 51 | }; |
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| 52 | |
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| 53 | }; // end namespace behavioural |
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| 54 | }; // end namespace morpheo |
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| 55 | #endif |
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