Changeset 38 for trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_set_port.cpp

Timestamp:

May 31, 2007, 11:22:29 PM (17 years ago)

Author:

rosiere

Message:

Interface et vhdl_testbench : l'appel aux fonction add_input et add_ouput est maintenant réalisé par la classe Interface (et autre).

2 remarques :

• tester avec des sous composants (en particulier les sorties d'un est directement relié au sortie d'un autre)
• Signal_testbench.cpp -> l'optimisé (par exemple pointeur de fonction afin d'éviter le test et le switch)

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_set_port.cpp (modified) (1 diff)

trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_set_port.cpp

@@ -15 +15 @@
   void Interface::set_port (Vhdl * & vhdl)
   {
+    log_printf(FUNC,Behavioural,"set_port (Vhdl)","Begin");
     if (not _list_signal->empty())
       {
-        list<Signal>::iterator i     = _list_signal->begin();
+        list<Signal*>::iterator i     = _list_signal->begin();
         
         while (i != _list_signal->end())
           {
-            presence_port_t p = (*i)._presence_port;
+            presence_port_t p = (*i)->_presence_port;
             if ((p == PORT_VHDL_YES_TESTBENCH_YES) or
                 (p == PORT_VHDL_YES_TESTBENCH_NO ) )
-              vhdl->set_port ((*i)._name,(*i)._direction,(*i)._size);
+              vhdl->set_port ((*i)->_name,(*i)->_direction,(*i)->_size);
             ++i;
           }
       }
+    log_printf(FUNC,Behavioural,"set_port (Vhdl)","End");
   };
 
   void Interface::set_port (Vhdl_Testbench * & vhdl_testbench)
   {
+    log_printf(FUNC,Behavioural,"set_port (Testbench)","Begin");
     if (not _list_signal->empty())
       {
-        list<Signal>::iterator i     = _list_signal->begin();
+        list<Signal*>::iterator i     = _list_signal->begin();
         
         while (i != _list_signal->end())
           {
-            presence_port_t p = (*i)._presence_port;
+            presence_port_t p = (*i)->_presence_port;
             if ((p == PORT_VHDL_YES_TESTBENCH_YES) or
                 (p == PORT_VHDL_NO_TESTBENCH_YES ) )
-              vhdl_testbench->set_port ((*i)._name,(*i)._direction,(*i)._size);
+              vhdl_testbench->set_port ((*i)->_name,(*i)->_direction,(*i)->_size);
             ++i;
           }
       }
+    log_printf(FUNC,Behavioural,"set_port (Testbench)","End");
   };