Changeset 108 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src
- Timestamp:
- Feb 12, 2009, 12:55:06 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src
- Files:
-
- 5 edited
-
Decod_queue_allocation.cpp (modified) (2 diffs)
-
Decod_queue_deallocation.cpp (modified) (2 diffs)
-
Decod_queue_genMealy_decod_out.cpp (modified) (1 diff)
-
Decod_queue_genMoore.cpp (modified) (1 diff)
-
Decod_queue_transition.cpp (modified) (7 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_allocation.cpp
r105 r108 67 67 ALLOC1_SIGNAL_IN ( in_DECOD_IN_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ); 68 68 ALLOC1_SIGNAL_IN ( in_DECOD_IN_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 ); 69 #ifdef DEBUG 70 ALLOC1_SIGNAL_IN ( in_DECOD_IN_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_instruction_address ); 71 #endif 69 72 ALLOC1_SIGNAL_IN ( in_DECOD_IN_ADDRESS_NEXT ,"address_next" ,Tgeneral_data_t ,_param->_size_instruction_address ); 70 73 ALLOC1_SIGNAL_IN ( in_DECOD_IN_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 ); … … 96 99 ALLOC1_SIGNAL_OUT(out_DECOD_OUT_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ); 97 100 ALLOC1_SIGNAL_OUT(out_DECOD_OUT_IS_DELAY_SLOT ,"is_delay_slot",Tcontrol_t ,1 ); 101 #ifdef DEBUG 102 ALLOC1_SIGNAL_OUT(out_DECOD_OUT_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_instruction_address ); 103 #endif 98 104 ALLOC1_SIGNAL_OUT(out_DECOD_OUT_ADDRESS_NEXT ,"address_next" ,Tgeneral_data_t ,_param->_size_instruction_address ); 99 105 ALLOC1_SIGNAL_OUT(out_DECOD_OUT_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_deallocation.cpp
r105 r108 37 37 DELETE1_SIGNAL( in_DECOD_IN_NO_EXECUTE ,_param->_nb_inst_decod,1 ); 38 38 DELETE1_SIGNAL( in_DECOD_IN_IS_DELAY_SLOT ,_param->_nb_inst_decod,1 ); 39 #ifdef DEBUG 40 DELETE1_SIGNAL( in_DECOD_IN_ADDRESS ,_param->_nb_inst_decod,_param->_size_instruction_address ); 41 #endif 39 42 DELETE1_SIGNAL( in_DECOD_IN_ADDRESS_NEXT ,_param->_nb_inst_decod,_param->_size_instruction_address ); 40 43 DELETE1_SIGNAL( in_DECOD_IN_HAS_IMMEDIAT ,_param->_nb_inst_decod,1 ); … … 61 64 DELETE1_SIGNAL(out_DECOD_OUT_NO_EXECUTE ,_param->_nb_inst_decod,1 ); 62 65 DELETE1_SIGNAL(out_DECOD_OUT_IS_DELAY_SLOT ,_param->_nb_inst_decod,1 ); 66 #ifdef DEBUG 67 DELETE1_SIGNAL(out_DECOD_OUT_ADDRESS ,_param->_nb_inst_decod,_param->_size_instruction_address ); 68 #endif 63 69 DELETE1_SIGNAL(out_DECOD_OUT_ADDRESS_NEXT ,_param->_nb_inst_decod,_param->_size_instruction_address ); 64 70 DELETE1_SIGNAL(out_DECOD_OUT_HAS_IMMEDIAT ,_param->_nb_inst_decod,1 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMealy_decod_out.cpp
r106 r108 35 35 if (not reg_QUEUE->empty()) 36 36 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 37 if (reg_QUEUE->front()->_val [i]) 38 { 39 log_printf(TRACE,Decod_queue,FUNCTION,_(" * Queue is not empty, slot [%d] is valid."),i); 37 { 38 uint32_t index = reg_LAST_SLOT + i; 40 39 41 Tcontext_t context = reg_QUEUE->front()->_context_id [i]; 42 Tdepth_t depth = reg_QUEUE->front()->_depth [i]; 43 Tdepth_t depth_min = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [context]):0; 44 Tdepth_t depth_max = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX [context]):0; 45 Tcontrol_t depth_full = PORT_READ(in_DEPTH_FULL[context]); 40 // Stop 41 if (index >= _param->_nb_inst_decod) 42 break; 46 43 47 // is a valid instruction ? 48 // If DEPTH_CURRENT : 49 // equal at DEPTH_MIN -> not speculative 50 // not include ]DEPTH_MIN:DEPTH_MAX] -> previous branch miss 51 // include ]DEPTH_MIN:DEPTH_MAX] -> speculative 44 if (reg_QUEUE->front()->_val [index]) 45 { 46 log_printf(TRACE,Decod_queue,FUNCTION,_(" * Queue is not empty, slot [%d] is valid."),i); 47 48 Tcontext_t context = reg_QUEUE->front()->_context_id [index]; 49 Tdepth_t depth = reg_QUEUE->front()->_depth [index]; 50 Tdepth_t depth_min = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [context]):0; 51 Tdepth_t depth_max = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MAX [context]):0; 52 Tcontrol_t depth_full = PORT_READ(in_DEPTH_FULL[context]); 52 53 53 // All case 54 // ....... min ...X... max ....... OK 55 // ....... min ....... max ...X... KO 56 // ...X... min ....... max ....... KO 57 // ....... max ....... min ...X... OK 58 // ...X... max ....... min ....... OK 59 // ....... max ...X... min ....... KO 54 // is a valid instruction ? 55 // If DEPTH_CURRENT : 56 // equal at DEPTH_MIN -> not speculative 57 // not include ]DEPTH_MIN:DEPTH_MAX] -> previous branch miss 58 // include ]DEPTH_MIN:DEPTH_MAX] -> speculative 59 60 // All case 61 // ....... min ...X... max ....... OK 62 // ....... min ....... max ...X... KO 63 // ...X... min ....... max ....... KO 64 // ....... max ....... min ...X... OK 65 // ...X... max ....... min ....... OK 66 // ....... max ...X... min ....... KO 67 68 Tcontrol_t is_valid = ((depth == depth_min) or 69 depth_full or 70 ((depth_min <= depth_max)? 71 ((depth >= depth_min) and (depth <=depth_max)): 72 ((depth >= depth_min) or (depth <=depth_max)))); 73 //Tcontrol_t is_valid = ((depth == depth_min) or 74 // ((depth_min < depth_max)? 75 // (depth<=depth_max): 76 // ((depth > depth_min) or (depth <= depth_max)))); 77 //Tcontrol_t is_valid = depth <= depth_max; 60 78 61 Tcontrol_t is_valid = ((depth == depth_min) or 62 depth_full or 63 ((depth_min <= depth_max)? 64 ((depth >= depth_min) and (depth <=depth_max)): 65 ((depth >= depth_min) or (depth <=depth_max)))); 66 // Tcontrol_t is_valid = ((depth == depth_min) or 67 // ((depth_min < depth_max)? 68 // (depth<=depth_max): 69 // ((depth > depth_min) or (depth <= depth_max)))); 70 // Tcontrol_t is_valid = depth <= depth_max; 71 72 log_printf(TRACE,Decod_queue,FUNCTION," * is_valid : %d",is_valid); 73 log_printf(TRACE,Decod_queue,FUNCTION," * context : %d",context); 74 log_printf(TRACE,Decod_queue,FUNCTION," * depth : %d",depth); 75 log_printf(TRACE,Decod_queue,FUNCTION," * depth_min : %d",depth_min); 76 log_printf(TRACE,Decod_queue,FUNCTION," * depth_max : %d",depth_max); 77 log_printf(TRACE,Decod_queue,FUNCTION," * depth_full : %d",depth_full); 78 log_printf(TRACE,Decod_queue,FUNCTION," * address_next : 0x%x (0x%x)",reg_QUEUE->front()->_address_next[i],reg_QUEUE->front()->_address_next[i]<<2); 79 internal_DECOD_OUT_VAL [i] = 1; // in all case, val is set (entry is not empty, and instruction is valid) 80 if (is_valid) 81 { 82 val [i] = 1; 83 internal_DECOD_OUT_ACK [i] = PORT_READ(in_DECOD_OUT_ACK [i]); 84 } 85 else 86 { 87 // Consume the instruction (to erase) 88 internal_DECOD_OUT_ACK [i] = 1; 89 } 90 } 79 log_printf(TRACE,Decod_queue,FUNCTION," * is_valid : %d",is_valid); 80 log_printf(TRACE,Decod_queue,FUNCTION," * context : %d",context); 81 log_printf(TRACE,Decod_queue,FUNCTION," * depth : %d",depth); 82 log_printf(TRACE,Decod_queue,FUNCTION," * depth_min : %d",depth_min); 83 log_printf(TRACE,Decod_queue,FUNCTION," * depth_max : %d",depth_max); 84 log_printf(TRACE,Decod_queue,FUNCTION," * depth_full : %d",depth_full); 85 #ifdef DEBUG 86 log_printf(TRACE,Decod_queue,FUNCTION," * address : 0x%x (0x%x)",reg_QUEUE->front()->_address [index],reg_QUEUE->front()->_address [index]<<2); 87 #endif 88 log_printf(TRACE,Decod_queue,FUNCTION," * address_next : 0x%x (0x%x)",reg_QUEUE->front()->_address_next[index],reg_QUEUE->front()->_address_next[index]<<2); 89 internal_DECOD_OUT_VAL [index] = 1; // in all case, val is set (entry is not empty, and instruction is valid) 90 if (is_valid) 91 { 92 val [i] = 1; 93 internal_DECOD_OUT_ACK [index] = PORT_READ(in_DECOD_OUT_ACK [i]); 94 } 95 else 96 { 97 // Consume the instruction (to erase) 98 internal_DECOD_OUT_ACK [index] = 1; 99 } 100 } 101 } 91 102 92 103 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 93 104 { 94 105 log_printf(TRACE,Decod_queue,FUNCTION," * DECOD_OUT_VAL : %d",val [i]); 95 96 106 107 PORT_WRITE(out_DECOD_OUT_VAL [i],val [i]); 97 108 } 98 109 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_genMoore.cpp
r105 r108 44 44 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 45 45 { 46 uint32_t index = reg_LAST_SLOT + i; 47 48 // Stop 49 if (index >= _param->_nb_inst_decod) 50 break; 51 46 52 if (_param->_have_port_context_id) 47 PORT_WRITE(out_DECOD_OUT_CONTEXT_ID [i],reg_QUEUE->front()->_context_id [i ]);53 PORT_WRITE(out_DECOD_OUT_CONTEXT_ID [i],reg_QUEUE->front()->_context_id [index]); 48 54 if (_param->_have_port_depth) 49 PORT_WRITE(out_DECOD_OUT_DEPTH [i],reg_QUEUE->front()->_depth [i]); 50 PORT_WRITE(out_DECOD_OUT_TYPE [i],reg_QUEUE->front()->_type [i]); 51 PORT_WRITE(out_DECOD_OUT_OPERATION [i],reg_QUEUE->front()->_operation [i]); 52 PORT_WRITE(out_DECOD_OUT_NO_EXECUTE [i],reg_QUEUE->front()->_no_execute [i]); 53 PORT_WRITE(out_DECOD_OUT_IS_DELAY_SLOT [i],reg_QUEUE->front()->_is_delay_slot [i]); 54 PORT_WRITE(out_DECOD_OUT_ADDRESS_NEXT [i],reg_QUEUE->front()->_address_next [i]); 55 PORT_WRITE(out_DECOD_OUT_HAS_IMMEDIAT [i],reg_QUEUE->front()->_has_immediat [i]); 56 PORT_WRITE(out_DECOD_OUT_IMMEDIAT [i],reg_QUEUE->front()->_immediat [i]); 57 PORT_WRITE(out_DECOD_OUT_READ_RA [i],reg_QUEUE->front()->_read_ra [i]); 58 PORT_WRITE(out_DECOD_OUT_NUM_REG_RA [i],reg_QUEUE->front()->_num_reg_ra [i]); 59 PORT_WRITE(out_DECOD_OUT_READ_RB [i],reg_QUEUE->front()->_read_rb [i]); 60 PORT_WRITE(out_DECOD_OUT_NUM_REG_RB [i],reg_QUEUE->front()->_num_reg_rb [i]); 61 PORT_WRITE(out_DECOD_OUT_READ_RC [i],reg_QUEUE->front()->_read_rc [i]); 62 PORT_WRITE(out_DECOD_OUT_NUM_REG_RC [i],reg_QUEUE->front()->_num_reg_rc [i]); 63 PORT_WRITE(out_DECOD_OUT_WRITE_RD [i],reg_QUEUE->front()->_write_rd [i]); 64 PORT_WRITE(out_DECOD_OUT_NUM_REG_RD [i],reg_QUEUE->front()->_num_reg_rd [i]); 65 PORT_WRITE(out_DECOD_OUT_WRITE_RE [i],reg_QUEUE->front()->_write_re [i]); 66 PORT_WRITE(out_DECOD_OUT_NUM_REG_RE [i],reg_QUEUE->front()->_num_reg_re [i]); 67 PORT_WRITE(out_DECOD_OUT_EXCEPTION_USE [i],reg_QUEUE->front()->_exception_use [i]); 68 PORT_WRITE(out_DECOD_OUT_EXCEPTION [i],reg_QUEUE->front()->_exception [i]); 55 PORT_WRITE(out_DECOD_OUT_DEPTH [i],reg_QUEUE->front()->_depth [index]); 56 PORT_WRITE(out_DECOD_OUT_TYPE [i],reg_QUEUE->front()->_type [index]); 57 PORT_WRITE(out_DECOD_OUT_OPERATION [i],reg_QUEUE->front()->_operation [index]); 58 PORT_WRITE(out_DECOD_OUT_NO_EXECUTE [i],reg_QUEUE->front()->_no_execute [index]); 59 PORT_WRITE(out_DECOD_OUT_IS_DELAY_SLOT [i],reg_QUEUE->front()->_is_delay_slot [index]); 60 #ifdef DEBUG 61 PORT_WRITE(out_DECOD_OUT_ADDRESS [i],reg_QUEUE->front()->_address [index]); 62 #endif 63 PORT_WRITE(out_DECOD_OUT_ADDRESS_NEXT [i],reg_QUEUE->front()->_address_next [index]); 64 PORT_WRITE(out_DECOD_OUT_HAS_IMMEDIAT [i],reg_QUEUE->front()->_has_immediat [index]); 65 PORT_WRITE(out_DECOD_OUT_IMMEDIAT [i],reg_QUEUE->front()->_immediat [index]); 66 PORT_WRITE(out_DECOD_OUT_READ_RA [i],reg_QUEUE->front()->_read_ra [index]); 67 PORT_WRITE(out_DECOD_OUT_NUM_REG_RA [i],reg_QUEUE->front()->_num_reg_ra [index]); 68 PORT_WRITE(out_DECOD_OUT_READ_RB [i],reg_QUEUE->front()->_read_rb [index]); 69 PORT_WRITE(out_DECOD_OUT_NUM_REG_RB [i],reg_QUEUE->front()->_num_reg_rb [index]); 70 PORT_WRITE(out_DECOD_OUT_READ_RC [i],reg_QUEUE->front()->_read_rc [index]); 71 PORT_WRITE(out_DECOD_OUT_NUM_REG_RC [i],reg_QUEUE->front()->_num_reg_rc [index]); 72 PORT_WRITE(out_DECOD_OUT_WRITE_RD [i],reg_QUEUE->front()->_write_rd [index]); 73 PORT_WRITE(out_DECOD_OUT_NUM_REG_RD [i],reg_QUEUE->front()->_num_reg_rd [index]); 74 PORT_WRITE(out_DECOD_OUT_WRITE_RE [i],reg_QUEUE->front()->_write_re [index]); 75 PORT_WRITE(out_DECOD_OUT_NUM_REG_RE [i],reg_QUEUE->front()->_num_reg_re [index]); 76 PORT_WRITE(out_DECOD_OUT_EXCEPTION_USE [i],reg_QUEUE->front()->_exception_use [index]); 77 PORT_WRITE(out_DECOD_OUT_EXCEPTION [i],reg_QUEUE->front()->_exception [index]); 69 78 } 70 79 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_transition.cpp
r105 r108 31 31 for (uint32_t i=0; i<_param->_nb_context; i++) 32 32 reg_NB_INST [i]=0; 33 34 reg_LAST_SLOT = 0; 33 35 } 34 36 else … … 62 64 entry->_no_execute [i] = PORT_READ(in_DECOD_IN_NO_EXECUTE [i]); 63 65 entry->_is_delay_slot [i] = PORT_READ(in_DECOD_IN_IS_DELAY_SLOT [i]); 66 #ifdef DEBUG 67 entry->_address [i] = PORT_READ(in_DECOD_IN_ADDRESS [i]); 68 #endif 64 69 entry->_address_next [i] = PORT_READ(in_DECOD_IN_ADDRESS_NEXT [i]); 65 70 entry->_has_immediat [i] = PORT_READ(in_DECOD_IN_HAS_IMMEDIAT [i]); … … 90 95 if (not reg_QUEUE->empty()) 91 96 { 92 bool find = false;97 bool find = false; 93 98 94 99 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 95 100 { 96 101 // Test transaction : if ok then invalid slot 102 // In order by rename logic 97 103 if (internal_DECOD_OUT_VAL [i] and internal_DECOD_OUT_ACK[i]) 98 104 { 99 105 log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_OUT [%d]"),i); 100 106 107 #ifdef DEBUG_TEST 108 if (reg_LAST_SLOT != i) 109 throw ERRORMORPHEO(FUNCTION,toString(_("reg_LAST_SLOT (%d) is different at decod_out port (%d)."),reg_LAST_SLOT,i)); 110 #endif 111 reg_LAST_SLOT ++; 112 101 113 reg_QUEUE->front()->_val [i] = 0; 102 114 … … 108 120 } 109 121 // Test if slot is (again) valid, if yes, then have less one instruction in the entry 110 find |= reg_QUEUE->front()->_val [i];122 find |= reg_QUEUE->front()->_val [i]; 111 123 } 112 124 113 // test if can free the entry 114 125 // test if can free the entry : test if have consume all entry 126 if (not find) // no valid instruction in current slot 115 127 { 116 128 log_printf(TRACE,Decod_queue,FUNCTION,_(" * POP queue")); … … 119 131 delete reg_QUEUE->front(); 120 132 reg_QUEUE->pop_front(); 133 134 reg_LAST_SLOT = 0; 121 135 } 122 136 } … … 125 139 #if defined(DEBUG) and defined(DEBUG_Decod_queue) and (DEBUG >= DEBUG_TRACE) 126 140 log_printf(TRACE,Decod_queue,FUNCTION," * Dump decod_queue"); 141 log_printf(TRACE,Decod_queue,FUNCTION," * reg_LAST_SLOT : %d",reg_LAST_SLOT); 127 142 uint32_t x=0; 128 143 for (std::list<decod_queue_entry_t*>::iterator it=reg_QUEUE->begin(); … … 144 159 ,(*it)->_no_execute [i] 145 160 ,(*it)->_is_delay_slot [i] 146 ,(*it)->_address _next[i]147 ,(*it)->_address _next[i]<<2161 ,(*it)->_address [i] 162 ,(*it)->_address [i]<<2 148 163 ,(*it)->_has_immediat [i] 149 164 ,(*it)->_immediat [i]
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