Ignore:
Timestamp:
Feb 12, 2009, 12:55:06 PM (15 years ago)
Author:
rosiere
Message:

1) decod_queue : add reg_LAST_SLOT.
2) Commit : insert on event -> to pop decod_queue. Head test : add information (speculative or not)
3) Context State / UPT : Branch miss and Load miss in same cycle.
4) Free List : Bank is on LSB not MSB.
5) Platforms : move data

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/src/Branch_Target_Buffer_allocation.cpp

    r88 r108  
    224224                                       dest,"out_PREDICT_"+toString(i)+"_"+toString(j)+"_ADDRESS_SRC");
    225225
    226               // out_OUTPUT_VAL     -> glue
    227               // out_OUTPUT_INDEX   -> glue
    228               // out_OUTPUT_ADDRESS -> no exist
    229226            }
    230         }
     227
     228          // 1 output
     229          // out_OUTPUT_VAL     -> glue
     230          // out_OUTPUT_INDEX   -> glue
     231          // out_OUTPUT_ADDRESS -> no exist
     232        }
    231233
    232234        //================================================================
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