Changeset 108 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Parameters.cpp

Timestamp:

Feb 12, 2009, 12:55:06 PM (15 years ago)

Author:

rosiere

Message:

1) decod_queue : add reg_LAST_SLOT.
2) Commit : insert on event -> to pop decod_queue. Head test : add information (speculative or not)
3) Context State / UPT : Branch miss and Load miss in same cycle.
4) Free List : Bank is on LSB not MSB.
5) Platforms : move data

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Parameters.cpp (modified) (3 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Parameters.cpp

@@ -109 +109 @@
       _array_size_nb_inst_decod [i] = log2(_size_decod_queue[i]+1);
 
+    uint32_t size_nb_inst_decod         = max<uint32_t>(_array_size_nb_inst_decod,_nb_decod_unit);
+
     _param_ifetch_unit = new behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters * [_nb_context];
     for (uint32_t i=0; i<_nb_context; ++i)
@@ -236 +238 @@
        size_instruction_address              ,
        _array_size_depth                     ,
-       _upt_size_queue                        //_nb_branch_speculated
+       _upt_size_queue                       ,//_nb_branch_speculated
+       size_nb_inst_decod
        );
 
@@ -244 +247 @@
         _size_instruction_address   = size_instruction_address;
         _size_general_data          = size_general_data;
-        _size_nb_inst_decod         = max<uint32_t>(_array_size_nb_inst_decod,_nb_decod_unit);
+        _size_nb_inst_decod         = size_nb_inst_decod;
         _size_nb_inst_commit        = size_nb_inst_commit;
         _size_depth                 = max<uint32_t>(_array_size_depth,_nb_context);