- Timestamp:
- Feb 16, 2009, 9:28:31 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine
- Files:
-
- 20 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h
r108 r109 222 222 223 223 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 224 private : double ** _nb_cycle_idle; 225 224 226 private : std::list<entry_t*> * _rob ;//[nb_bank] 225 227 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
r108 r109 279 279 280 280 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 281 ALLOC2(_nb_cycle_idle ,double ,_param->_nb_front_end,_param->_nb_context [it1]); 281 282 ALLOC1(_rob ,std::list<entry_t*>,_param->_nb_bank); 282 283 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
r108 r109 187 187 188 188 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 189 DELETE2(_nb_cycle_idle ,_param->_nb_front_end,_param->_nb_context [it1]); 189 190 DELETE1(_rob ,_param->_nb_bank); 190 191 DELETE1(reg_BANK_PTR ,_param->_nb_bank); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp
r100 r109 58 58 _stat->create_expr_average_by_cycle("average_inst_retire" , "+ "+sum_nb_inst_retire_ok+" "+sum_nb_inst_retire_ko, "", _("Average instruction retire by cycle")); 59 59 60 _stat->create_expr ("IPC", "average_inst_retire_ok", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle"); 61 _stat->create_expr ("CPI", "/ 1 IPC" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction"); 60 _stat->create_expr ("IPC_ok" , "average_inst_retire_ok", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok)"); 61 _stat->create_expr ("CPI_ok" , "/ 1 IPC_ok" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ok)"); 62 63 _stat->create_expr ("IPC_ko" , "average_inst_retire_ko", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ko)"); 64 _stat->create_expr ("CPI_ko" , "/ 1 IPC_ko" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ko)"); 65 66 _stat->create_expr ("IPC_all", "average_inst_retire" , TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok and Ko)"); 67 _stat->create_expr ("CPI_all", "/ 1 IPC_all" , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ok and Ko)"); 62 68 } 63 69 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
r108 r109 41 41 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 42 42 { 43 _nb_cycle_idle [i][j] = 0; 44 43 45 reg_NB_INST_COMMIT_ALL [i][j] = 0; 44 46 reg_NB_INST_COMMIT_MEM [i][j] = 0; … … 59 61 else 60 62 { 63 // Increase number idle cycle 64 for (uint32_t i=0; i<_param->_nb_front_end; i++) 65 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 66 _nb_cycle_idle [i][j] ++; 67 61 68 // Compute next priority 62 69 _priority_insert->transition(); … … 402 409 _rob [i].pop_front(); 403 410 delete entry; 411 412 // Transaction on retire interface : reset watch dog timer. 413 _nb_cycle_idle [front_end_id][context_id] = 0; 404 414 } 405 415 … … 759 769 #endif 760 770 771 // Stop Condition 772 for (uint32_t i=0; i<_param->_nb_front_end; i++) 773 for (uint32_t j=0; j<_param->_nb_context [i]; j++) 774 if (_nb_cycle_idle [i][j] >= debug_cycle_idle) 775 throw ERRORMORPHEO(FUNCTION,toString(_("Context [%d][%d] is idle since %.0f cycles.\n"),i,j,_nb_cycle_idle [i][j])); 776 761 777 log_end(Commit_unit,FUNCTION); 762 778 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp
r88 r109 45 45 if (internal_BANK_IN_ACK [i]) 46 46 { 47 entry_t * entry = NULL;47 entry_t * entry = NULL; 48 48 49 49 if (internal_BANK_IN_IS_REEXECUTE [i]) … … 53 53 if (PORT_READ(in_REEXECUTE_VAL [y])) 54 54 { 55 log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_IN [%d] - Transaction with REEXECUTE [%d]",i,y); 55 56 #ifdef STATISTICS 56 57 if (usage_is_set(_usage,USE_STATISTICS)) … … 62 63 (_param->_have_port_front_end_id )?PORT_READ(in_REEXECUTE_FRONT_END_ID [y]):0, 63 64 (_param->_have_port_rob_ptr )?PORT_READ(in_REEXECUTE_PACKET_ID [y]):0, 64 PORT_READ(in_REEXECUTE_OPERATION [y]),65 PORT_READ(in_REEXECUTE_TYPE [y]),66 PORT_READ(in_REEXECUTE_STORE_QUEUE_PTR_WRITE [y]),65 PORT_READ(in_REEXECUTE_OPERATION [y]), 66 PORT_READ(in_REEXECUTE_TYPE [y]), 67 PORT_READ(in_REEXECUTE_STORE_QUEUE_PTR_WRITE [y]), 67 68 (_param->_have_port_load_queue_ptr)?PORT_READ(in_REEXECUTE_LOAD_QUEUE_PTR_WRITE [y]):0, 68 PORT_READ(in_REEXECUTE_HAS_IMMEDIAT [y]),69 PORT_READ(in_REEXECUTE_IMMEDIAT [y]),70 PORT_READ(in_REEXECUTE_READ_RA [y]),71 PORT_READ(in_REEXECUTE_NUM_REG_RA [y]),72 PORT_READ(in_REEXECUTE_READ_RB [y]),73 PORT_READ(in_REEXECUTE_NUM_REG_RB [y]),74 PORT_READ(in_REEXECUTE_READ_RC [y]),75 PORT_READ(in_REEXECUTE_NUM_REG_RC [y]),76 PORT_READ(in_REEXECUTE_WRITE_RD [y]),77 PORT_READ(in_REEXECUTE_NUM_REG_RD [y]),78 PORT_READ(in_REEXECUTE_WRITE_RE [y]),79 PORT_READ(in_REEXECUTE_NUM_REG_RE [y])69 PORT_READ(in_REEXECUTE_HAS_IMMEDIAT [y]), 70 PORT_READ(in_REEXECUTE_IMMEDIAT [y]), 71 PORT_READ(in_REEXECUTE_READ_RA [y]), 72 PORT_READ(in_REEXECUTE_NUM_REG_RA [y]), 73 PORT_READ(in_REEXECUTE_READ_RB [y]), 74 PORT_READ(in_REEXECUTE_NUM_REG_RB [y]), 75 PORT_READ(in_REEXECUTE_READ_RC [y]), 76 PORT_READ(in_REEXECUTE_NUM_REG_RC [y]), 77 PORT_READ(in_REEXECUTE_WRITE_RD [y]), 78 PORT_READ(in_REEXECUTE_NUM_REG_RD [y]), 79 PORT_READ(in_REEXECUTE_WRITE_RE [y]), 80 PORT_READ(in_REEXECUTE_NUM_REG_RE [y]) 80 81 ); 81 82 } … … 88 89 if (PORT_READ(in_ISSUE_IN_VAL[x][y])) 89 90 { 91 log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_IN [%d] - Transaction with ISSUE_IN [%d][%d]",i,x,y); 92 90 93 #ifdef STATISTICS 91 94 if (usage_is_set(_usage,USE_STATISTICS)) … … 97 100 (_param->_have_port_front_end_id )?PORT_READ(in_ISSUE_IN_FRONT_END_ID [x][y]):0, 98 101 (_param->_have_port_rob_ptr )?PORT_READ(in_ISSUE_IN_PACKET_ID [x][y]):0, 99 PORT_READ(in_ISSUE_IN_OPERATION [x][y]),100 PORT_READ(in_ISSUE_IN_TYPE [x][y]),101 PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [x][y]),102 PORT_READ(in_ISSUE_IN_OPERATION [x][y]), 103 PORT_READ(in_ISSUE_IN_TYPE [x][y]), 104 PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [x][y]), 102 105 (_param->_have_port_load_queue_ptr)?PORT_READ(in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE [x][y]):0, 103 PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT [x][y]),104 PORT_READ(in_ISSUE_IN_IMMEDIAT [x][y]),105 PORT_READ(in_ISSUE_IN_READ_RA [x][y]),106 PORT_READ(in_ISSUE_IN_NUM_REG_RA [x][y]),107 PORT_READ(in_ISSUE_IN_READ_RB [x][y]),108 PORT_READ(in_ISSUE_IN_NUM_REG_RB [x][y]),109 PORT_READ(in_ISSUE_IN_READ_RC [x][y]),110 PORT_READ(in_ISSUE_IN_NUM_REG_RC [x][y]),111 PORT_READ(in_ISSUE_IN_WRITE_RD [x][y]),112 PORT_READ(in_ISSUE_IN_NUM_REG_RD [x][y]),113 PORT_READ(in_ISSUE_IN_WRITE_RE [x][y]),114 PORT_READ(in_ISSUE_IN_NUM_REG_RE [x][y])106 PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT [x][y]), 107 PORT_READ(in_ISSUE_IN_IMMEDIAT [x][y]), 108 PORT_READ(in_ISSUE_IN_READ_RA [x][y]), 109 PORT_READ(in_ISSUE_IN_NUM_REG_RA [x][y]), 110 PORT_READ(in_ISSUE_IN_READ_RB [x][y]), 111 PORT_READ(in_ISSUE_IN_NUM_REG_RB [x][y]), 112 PORT_READ(in_ISSUE_IN_READ_RC [x][y]), 113 PORT_READ(in_ISSUE_IN_NUM_REG_RC [x][y]), 114 PORT_READ(in_ISSUE_IN_WRITE_RD [x][y]), 115 PORT_READ(in_ISSUE_IN_NUM_REG_RD [x][y]), 116 PORT_READ(in_ISSUE_IN_WRITE_RE [x][y]), 117 PORT_READ(in_ISSUE_IN_NUM_REG_RE [x][y]) 115 118 ); 116 119 } … … 140 143 if (PORT_READ(in_ISSUE_OUT_ACK [x])) 141 144 { 145 log_printf(TRACE,Issue_queue,FUNCTION," * ISSUE_OUT [%d] - Transaction with ISSUE_OUT [%d]",i,x); 146 147 142 148 entry_t * entry = _issue_queue [i].front(); 143 149 _issue_queue [i].pop_front(); … … 148 154 } 149 155 150 log_printf(TRACE,Issue_queue,FUNCTION," * InfoIssue_queue");156 log_printf(TRACE,Issue_queue,FUNCTION," * Dump Issue_queue"); 151 157 for (uint32_t i=0; i<_param->_nb_bank; i++) 152 158 { … … 155 161 *(_stat_bank_nb_inst [i]) += _issue_queue[i].size(); 156 162 #endif 157 log_printf(TRACE,Issue_queue,FUNCTION," * [%d] size : %d",i,(int)_issue_queue[i].size()); 163 log_printf(TRACE,Issue_queue,FUNCTION," * Bank [%d] size : %d",i,(int)_issue_queue[i].size()); 164 165 uint32_t j = 0; 166 for (std::list<entry_t*>::iterator it=_issue_queue[i].begin();it!=_issue_queue[i].end(); ++it) 167 { 168 log_printf(TRACE,Issue_queue,FUNCTION," [%.4d] %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d, %.1d %.8x, %.1d %.4d, %.1d %.4d, %.1d %.4d, %.1d %.4d, %.1d %.4d", 169 j, 170 171 (*it)->_context_id , 172 (*it)->_front_end_id , 173 (*it)->_packet_id , 174 175 (*it)->_type , 176 (*it)->_operation , 177 178 (*it)->_store_queue_ptr_write, 179 (*it)->_load_queue_ptr_write , 180 181 (*it)->_has_immediat , 182 (*it)->_immediat , 183 184 (*it)->_read_ra , 185 (*it)->_num_reg_ra , 186 187 (*it)->_read_rb , 188 (*it)->_num_reg_rb , 189 190 (*it)->_read_rc , 191 (*it)->_num_reg_rc , 192 193 (*it)->_write_rd , 194 (*it)->_num_reg_rd , 195 196 (*it)->_write_re , 197 (*it)->_num_reg_re ); 198 199 ++j; 200 } 201 158 202 } 159 203 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp
r88 r109 57 57 _table_issue_type = table_issue_type ; 58 58 59 log_printf(TRACE,Issue_queue,FUNCTION," * table_routing [nb_rename_unit][nb_inst_issue]"); 60 for (uint32_t i=0; i<_nb_rename_unit; ++i) 61 for (uint32_t j=0; j<_nb_inst_issue; ++j) 62 if (_table_routing [i][j]) 63 log_printf(TRACE,Issue_queue,FUNCTION," [%d][%d] -> true",i,j); 64 65 log_printf(TRACE,Issue_queue,FUNCTION," * table_issue_type [nb_inst_issue][nb_type]"); 66 for (uint32_t i=0; i<_nb_inst_issue; ++i) 67 for (uint32_t j=0; j<_nb_type; ++j) 68 if (_table_issue_type [i][j]) 69 log_printf(TRACE,Issue_queue,FUNCTION," [%d][%d] -> true",i,j); 70 59 71 _max_nb_inst_rename = max<uint32_t>(_nb_inst_rename,_nb_rename_unit); 60 72 _nb_bank_select_out = _nb_bank/nb_inst_issue; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp
r108 r109 38 38 test.warning(_("For better performance, the bank's size (size_queue/nb_bank) must be > 1.\n")); 39 39 40 bool type_valid [_nb_type];41 42 for (uint32_t i=0; i<_nb_type; i++)43 type_valid [i] = false;44 45 type_valid [TYPE_ALU ] = true;46 type_valid [TYPE_SHIFT ] = true;47 type_valid [TYPE_MOVE ] = true;48 type_valid [TYPE_TEST ] = true;49 type_valid [TYPE_MUL ] = true;50 type_valid [TYPE_DIV ] = true;51 type_valid [TYPE_EXTEND ] = true;52 type_valid [TYPE_FIND ] = true;53 type_valid [TYPE_SPECIAL] = true;54 type_valid [TYPE_CUSTOM ] = true;55 type_valid [TYPE_BRANCH ] = true;56 type_valid [TYPE_MEMORY ] = true;57 58 40 for (uint32_t i=0; i<_nb_rename_unit; i++) 59 41 { … … 61 43 62 44 for (uint32_t j=0; j<_nb_type; j++) 63 type_present [j] = not type_valid [j];45 type_present [j] = not is_type_valid(j); 64 46 65 47 bool find = false; … … 77 59 else 78 60 for (uint32_t j=0; j<_nb_type; j++) 79 if (not type_present [j] )61 if (not type_present [j] and not is_type_optionnal(j)) 80 62 test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString(j).c_str())); 81 63 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp
r88 r109 27 27 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) 28 28 { 29 // Transaction must be in-order 30 // Tcontrol_t previous_transaction = true; 29 // Transaction must be in-order : make in Rename_unit 31 30 32 31 for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) … … 38 37 Tcontrol_t issue_queue_ack = PORT_READ(in_INSERT_ISSUE_QUEUE_ACK [i][j]); 39 38 40 41 42 39 // if not execute -> don't route to issue_queue 43 40 44 41 Tcontrol_t val = ( 45 // previous_transaction and46 42 rename_unit_val and 47 43 commit_unit_ack and … … 49 45 issue_queue_ack)); 50 46 Tcontrol_t rename_unit_ack = ( 51 // previous_transaction and52 47 ack and 53 48 commit_unit_ack and … … 55 50 issue_queue_ack)); 56 51 Tcontrol_t commit_unit_val = ( 57 // previous_transaction and58 52 ack and 59 53 rename_unit_val and … … 61 55 issue_queue_ack)); 62 56 Tcontrol_t issue_queue_val = ( 63 // previous_transaction and64 57 ack and 65 58 rename_unit_val and … … 73 66 74 67 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * rename_unit [%d].inst_insert[%d] -> %d",i,j,x); 75 // log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * previous_transaction : %d",previous_transaction ); 76 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_val (w) : %d",val ); 77 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_ack (r) : %d",ack ); 68 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_val (RegisterFile) (w) : %d",val ); 69 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_ack (RegisterFile) (r) : %d",ack ); 78 70 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_rename_unit_val (r) : %d",rename_unit_val ); 79 71 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_rename_unit_ack (w) : %d",rename_unit_ack ); … … 84 76 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_issue_queue_ack (r) : %d",issue_queue_ack ); 85 77 86 87 // previous_transaction = VAL and ACK;88 78 x ++; 89 79 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp
r88 r109 53 53 _size_rename_id = log2(_nb_rename_unit) ; 54 54 _sum_inst_insert = 0; 55 // 55 // _sum_inst_retire = 0; 56 56 57 57 for (uint32_t i=0; i<_nb_rename_unit; ++i) 58 58 { 59 59 _sum_inst_insert += _nb_inst_insert[i]; 60 // 60 // _sum_inst_retire += _nb_inst_retire[i]; 61 61 } 62 62 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/Makefile.deps
r81 r109 14 14 endif 15 15 16 ifndef Priority 17 include $(DIR_MORPHEO)/Behavioural/Generic/Priority/Makefile.deps 18 endif 19 16 20 #-----[ Directory ]---------------------------------------- 17 21 18 Free_List_unit_DIR 22 Free_List_unit_DIR = $(DIR_MORPHEO)/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit 19 23 20 24 #-----[ Library ]------------------------------------------ 21 25 22 Free_List_unit_LIBRARY = -lFree_List_unit \ 26 Free_List_unit_LIBRARY = -lFree_List_unit \ 27 $(Priority_LIBRARY) \ 23 28 $(Behavioural_LIBRARY) 24 29 25 Free_List_unit_DIR_LIBRARY = -L$(Free_List_unit_DIR)/lib \ 30 Free_List_unit_DIR_LIBRARY = -L$(Free_List_unit_DIR)/lib \ 31 $(Priority_DIR_LIBRARY) \ 26 32 $(Behavioural_DIR_LIBRARY) 27 33 … … 31 37 @\ 32 38 $(MAKE) Behavioural_library; \ 39 $(MAKE) Priority_library; \ 33 40 $(MAKE) --directory=$(Free_List_unit_DIR) --makefile=Makefile; 34 41 … … 36 43 @\ 37 44 $(MAKE) Behavioural_library_clean; \ 45 $(MAKE) Priority_library_clean; \ 38 46 $(MAKE) --directory=$(Free_List_unit_DIR) --makefile=Makefile clean; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/SelfTest/src/test.cpp
r88 r109 7 7 */ 8 8 9 #define NB_ITERATION 1 9 #define NB_ITERATION 16 10 10 #define CYCLE_MAX (128*NB_ITERATION) 11 11 … … 190 190 TEST(bool, gpr_free[reg],true); 191 191 192 Tgeneral_address_t bank = reg >> _param->_bank_gpr_size_slot;193 TEST(bool, (bank >= (i*_param->_nb_bank_by_pop)) and (bank < ((i+1)*_param->_nb_bank_by_pop)), true);192 // Tgeneral_address_t bank = reg >> _param->_bank_gpr_size_slot; 193 // TEST(bool, (bank >= (i*_param->_nb_bank_by_pop)) and (bank < ((i+1)*_param->_nb_bank_by_pop)), true); 194 194 195 195 gpr_free[reg] = false; … … 202 202 TEST(bool,spr_free[reg],true); 203 203 204 Tspecial_address_t bank = reg >> _param->_bank_spr_size_slot;205 TEST(bool, (bank >= (i*_param->_nb_bank_by_pop)) and (bank < ((i+1)*_param->_nb_bank_by_pop)), true);204 // Tspecial_address_t bank = reg >> _param->_bank_spr_size_slot; 205 // TEST(bool, (bank >= (i*_param->_nb_bank_by_pop)) and (bank < ((i+1)*_param->_nb_bank_by_pop)), true); 206 206 207 207 spr_free[reg] = false; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h
r108 r109 28 28 #endif 29 29 #include "Behavioural/include/Usage.h" 30 31 #include "Behavioural/Generic/Priority/include/Priority.h" 30 32 31 33 namespace morpheo { … … 83 85 84 86 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 87 private : generic::priority::Priority * _priority_gpr; 88 private : generic::priority::Priority * _priority_spr; 85 89 86 90 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 89 93 90 94 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 91 private : uint32_t reg_BANK_PRIORITY;92 93 95 private : Tcontrol_t * internal_POP_ACK ; //[nb_pop] 94 96 private : uint32_t * internal_POP_GPR_BANK ; //[nb_pop] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Parameters.h
r88 r109 37 37 //public : uint32_t _size_special_register; 38 38 39 public : uint32_t _nb_bank_by_pop ;39 // public : uint32_t _nb_bank_by_pop ; 40 40 public : uint32_t _bank_gpr_nb_slot ; 41 41 public : uint32_t _bank_gpr_size_slot ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_allocation.cpp
r88 r109 101 101 } 102 102 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 103 _priority_gpr = new generic::priority::Priority (_name+"_priority_gpr", 104 _param->_priority, 105 _param->_nb_bank, 106 _param->_nb_bank); 107 108 _priority_spr = new generic::priority::Priority (_name+"_priority_spr", 109 _param->_priority, 110 _param->_nb_bank, 111 _param->_nb_bank); 103 112 104 113 #ifdef POSITION -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_deallocation.cpp
r88 r109 58 58 59 59 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 60 61 delete _component; 62 60 delete _priority_gpr; 61 delete _priority_spr; 62 63 delete _component; 64 63 65 log_printf(FUNC,Free_List_unit,FUNCTION,"End"); 64 66 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_genMealy_pop.cpp
r108 r109 26 26 log_function(Free_List_unit,FUNCTION,_name.c_str()); 27 27 28 std::list<generic::priority::select_t> * select_gpr = _priority_gpr->select(); 29 std::list<generic::priority::select_t>::iterator it_gpr=select_gpr->begin(); 30 31 std::list<generic::priority::select_t> * select_spr = _priority_spr->select(); 32 std::list<generic::priority::select_t>::iterator it_spr=select_spr->begin(); 33 28 34 for (uint32_t i=0; i<_param->_nb_pop; i++) 29 35 { 30 36 log_printf(TRACE,Free_List_unit,FUNCTION," * POP [%d]",i); 31 32 uint32_t offset = i*_param->_nb_bank_by_pop; 33 37 34 38 // GPR 35 39 bool gpr_ack = not PORT_READ(in_POP_GPR_VAL[i]); 36 40 37 41 log_printf(TRACE,Free_List_unit,FUNCTION," * GPR_VAL : %d",PORT_READ(in_POP_GPR_VAL[i])); 38 42 39 43 if (not gpr_ack) 40 for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++) 41 { 42 uint32_t bank = offset+((j+reg_BANK_PRIORITY)%_param->_nb_bank_by_pop 43 ); 44 45 log_printf(TRACE,Free_List_unit,FUNCTION," * bank : %d",bank); 46 47 if (not _gpr_list[bank].empty()) 48 { 49 // find 50 log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_gpr_list[bank].front()); 51 52 gpr_ack = true; 53 internal_POP_GPR_BANK [i] = bank; 54 PORT_WRITE(out_POP_GPR_NUM_REG [i], 55 //(bank << _param->_shift) | // only in VHDL 56 _gpr_list[bank].front()); 57 58 break; 59 } 60 } 44 { 45 // scan all bank 46 for (; 47 it_gpr!=select_gpr->end(); 48 ++it_gpr) 49 { 50 uint32_t num_bank = it_gpr->grp; 51 52 log_printf(TRACE,Free_List_unit,FUNCTION," * num_bank: %d",num_bank); 53 54 if (not _gpr_list[num_bank].empty()) 55 { 56 // find 57 log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_gpr_list[num_bank].front()); 58 59 gpr_ack = true; 60 internal_POP_GPR_BANK [i] = num_bank; 61 PORT_WRITE(out_POP_GPR_NUM_REG [i], 62 //(num_bank << _param->_shift) | // only in VHDL 63 _gpr_list[num_bank].front()); 64 65 ++it_gpr; 66 break; 67 } 68 } 69 } 61 70 62 71 // SPR 63 72 bool spr_ack = not PORT_READ(in_POP_SPR_VAL[i]); 73 74 log_printf(TRACE,Free_List_unit,FUNCTION," * SPR_VAL : %d",PORT_READ(in_POP_SPR_VAL[i])); 75 76 if (not spr_ack) 77 { 78 // scan all bank 79 for (; 80 it_spr!=select_spr->end(); 81 ++it_spr) 82 { 83 uint32_t num_bank = it_spr->grp; 84 85 log_printf(TRACE,Free_List_unit,FUNCTION," * num_bank: %d",num_bank); 86 87 if (not _spr_list[num_bank].empty()) 88 { 89 // find 90 log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_spr_list[num_bank].front()); 91 92 spr_ack = true; 93 internal_POP_SPR_BANK [i] = num_bank; 94 PORT_WRITE(out_POP_SPR_NUM_REG [i], 95 //(num_bank << _param->_shift) | // only in VHDL 96 _spr_list[num_bank].front()); 97 98 ++it_spr; 99 break; 100 } 101 } 102 } 64 103 65 log_printf(TRACE,Free_List_unit,FUNCTION," * SPR_VAL : %d",PORT_READ(in_POP_SPR_VAL[i]));66 67 if (not spr_ack)68 for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++)69 {70 uint32_t bank = offset+((j+reg_BANK_PRIORITY)%_param->_nb_bank_by_pop71 );72 73 log_printf(TRACE,Free_List_unit,FUNCTION," * bank : %d",bank);74 75 if (not _spr_list[bank].empty())76 {77 // find78 log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_spr_list[bank].front());79 80 spr_ack = true;81 internal_POP_SPR_BANK [i] = bank;82 PORT_WRITE(out_POP_SPR_NUM_REG [i],83 //(bank << _param->_shift) | // only in VHDL84 _spr_list[bank].front());85 86 break;87 }88 }89 104 90 105 internal_POP_ACK [i] = gpr_ack and spr_ack; 91 92 106 PORT_WRITE(out_POP_ACK [i], internal_POP_ACK [i]); 93 107 } 108 109 // for (uint32_t i=0; i<_param->_nb_pop; i++) 110 // { 111 // log_printf(TRACE,Free_List_unit,FUNCTION," * POP [%d]",i); 112 113 // uint32_t offset = (i*_param->_nb_bank_by_pop) + reg_BANK_PRIORITY; 114 115 // // GPR 116 // bool gpr_ack = not PORT_READ(in_POP_GPR_VAL[i]); 117 118 // log_printf(TRACE,Free_List_unit,FUNCTION," * GPR_VAL : %d",PORT_READ(in_POP_GPR_VAL[i])); 119 120 // if (not gpr_ack) 121 // { 122 // for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++) 123 // { 124 // uint32_t bank = (offset+((j+reg_BANK_BY_POP_PRIORITY)%_param->_nb_bank_by_pop))%_param->_nb_bank; 125 126 // log_printf(TRACE,Free_List_unit,FUNCTION," * bank : %d",bank); 127 128 // if (not _gpr_list[bank].empty()) 129 // { 130 // // find 131 // log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_gpr_list[bank].front()); 132 133 // gpr_ack = true; 134 // internal_POP_GPR_BANK [i] = bank; 135 // PORT_WRITE(out_POP_GPR_NUM_REG [i], 136 // //(bank << _param->_shift) | // only in VHDL 137 // _gpr_list[bank].front()); 138 139 // break; 140 // } 141 // } 142 // } 143 144 // // SPR 145 // bool spr_ack = not PORT_READ(in_POP_SPR_VAL[i]); 146 147 // log_printf(TRACE,Free_List_unit,FUNCTION," * SPR_VAL : %d",PORT_READ(in_POP_SPR_VAL[i])); 148 149 // if (not spr_ack) 150 // { 151 // uint32_t offset = (i*_param->_nb_bank_by_pop) + reg_BANK_PRIORITY; 152 153 // for (uint32_t j=0; j<_param->_nb_bank_by_pop; j++) 154 // { 155 // uint32_t bank = (offset+((j+reg_BANK_BY_POP_PRIORITY)%_param->_nb_bank_by_pop))%_param->_nb_bank; 156 157 // log_printf(TRACE,Free_List_unit,FUNCTION," * bank : %d",bank); 158 159 // if (not _spr_list[bank].empty()) 160 // { 161 // // find 162 // log_printf(TRACE,Free_List_unit,FUNCTION," * find : %d",_spr_list[bank].front()); 163 164 // spr_ack = true; 165 // internal_POP_SPR_BANK [i] = bank; 166 // PORT_WRITE(out_POP_SPR_NUM_REG [i], 167 // //(bank << _param->_shift) | // only in VHDL 168 // _spr_list[bank].front()); 169 170 // break; 171 // } 172 // } 173 // } 174 175 // internal_POP_ACK [i] = gpr_ack and spr_ack; 176 177 // PORT_WRITE(out_POP_ACK [i], internal_POP_ACK [i]); 178 // } 94 179 95 180 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp
r108 r109 28 28 if (PORT_READ(in_NRESET) == 0) 29 29 { 30 reg_BANK_PRIORITY = 0; 30 _priority_gpr->reset(); 31 _priority_spr->reset(); 32 31 33 for (uint32_t i=0; i<_param->_nb_bank; i++) 32 34 { … … 37 39 else 38 40 { 41 _priority_gpr->transition(); 42 _priority_spr->transition(); 43 39 44 // ================================================== 40 45 // =====[ POP ]====================================== … … 76 81 _spr_list [internal_PUSH_SPR_BANK[i]].push_back(PORT_READ(in_PUSH_SPR_NUM_REG [i])); 77 82 } 78 79 if (_param->_priority == PRIORITY_ROUND_ROBIN)80 reg_BANK_PRIORITY = (reg_BANK_PRIORITY+1)%_param->_nb_bank_by_pop;81 83 82 84 #if (DEBUG >= DEBUG_TRACE) and (DEBUG_Free_List_unit == true) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Parameters.cpp
r108 r109 45 45 uint32_t size_special_register = log2(nb_special_register); 46 46 47 _nb_bank_by_pop = _nb_bank / _nb_pop;47 // _nb_bank_by_pop = _nb_bank / _nb_pop; 48 48 49 49 uint32_t gpr_nb_slot = nb_general_register - nb_thread*_nb_general_register_logic; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
r108 r109 1527 1527 dest,"insert_"+toString(i)); 1528 1528 #endif 1529 1530 1529 PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL" , 1531 1530 dest,"out_INSERT_"+toString(i)+"_VAL" );
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