Changeset 112 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp

Timestamp:

Mar 18, 2009, 11:36:26 PM (15 years ago)

Author:

rosiere

Message:

1) Stat_list : fix retire old and new register bug
2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step)
3) Model : add class Model (cf Morpheo.sim)
4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array.
5) Script : add distexe.sh
6) Add Comparator, Multiplier, Divider. But this component are not implemented
7) Software : add Dhrystone

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp (modified) (4 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp

@@ -58 +58 @@
     // ~~~~~[ Interface "execute_unit_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC2_INTERFACE("execute_unit_out", IN, EAST, "Output of execution_unit", _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]);
+       ALLOC2_INTERFACE_BEGIN("execute_unit_out", IN, EAST, "Output of execution_unit", _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]);
 
        _ALLOC2_VALACK_IN ( in_EXECUTE_UNIT_OUT_VAL,VAL, _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]);
@@ -77 +77 @@
        _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_NO_SEQUENCE  ,"no_sequence"  ,Tcontrol_t        ,1                             , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]);
        _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_ADDRESS      ,"address"      ,Taddress_t        ,_param->_size_instruction_address, _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]);
+
+       ALLOC2_INTERFACE_END(_param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]);
      }
 
     // ~~~~~[ Interface "write_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      {
-       ALLOC1_INTERFACE("write_unit_in", OUT, WEST, "Input of write_unit", _param->_nb_write_unit);
+       ALLOC1_INTERFACE_BEGIN("write_unit_in", OUT, WEST, "Input of write_unit", _param->_nb_write_unit);
 
        ALLOC1_VALACK_OUT(out_WRITE_UNIT_IN_VAL,VAL);
@@ -100 +102 @@
        ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_NO_SEQUENCE  ,"no_sequence"  ,Tcontrol_t        ,1                             );
        ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_ADDRESS      ,"address"      ,Taddress_t        ,_param->_size_instruction_address);
+
+       ALLOC1_INTERFACE_END(_param->_nb_write_unit);
      }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
@@ -105 +109 @@
     if (usage_is_set(_usage,USE_SYSTEMC))
       {
-     _destination = new std::list<uint32_t> ** [_param->_nb_execute_unit];
-     for (uint32_t i=0; i<_param->_nb_execute_unit; i++)
-       {
-         _destination [i] = new std::list<uint32_t> * [_param->_nb_execute_unit_port[i]];
-         for (uint32_t j=0; j<_param->_nb_execute_unit_port[i]; j++)
-           {
-             _destination [i][j] = new std::list<uint32_t> [_param->_nb_thread];
-           }
-       }
+        ALLOC3(_destination,std::list<uint32_t>,_param->_nb_execute_unit,_param->_nb_execute_unit_port[it1],_param->_nb_thread);
       }