Ignore:
Timestamp:
Mar 18, 2009, 11:36:26 PM (15 years ago)
Author:
rosiere
Message:

1) Stat_list : fix retire old and new register bug
2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step)
3) Model : add class Model (cf Morpheo.sim)
4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array.
5) Script : add distexe.sh
6) Add Comparator, Multiplier, Divider. But this component are not implemented
7) Software : add Dhrystone

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp

    r100 r112  
    3030#endif
    3131    bool       can_rename_select [_param->_nb_rename_unit];
    32    
    33     // Initialisation
     32    bool       event_stop;
     33   
     34//     Initialisation
     35    event_stop = false; // one signal for all context.
     36    for (uint32_t i=0; i<_param->_nb_front_end; ++i)
     37      for (uint32_t j=0; j<_param->_nb_context[i]; ++j)
     38        event_stop |= reg_EVENT_STOP [i][j];
    3439    for (uint32_t i=0; i<_param->_nb_bank; i++)
    3540      {
    … …  
    5257//     log_printf(TRACE,Commit_unit,FUNCTION,"  * reg_NUM_BANK_TAIL : %d",reg_NUM_BANK_TAIL);
    5358
    54     std::list<generic::priority::select_t> * select_insert = _priority_insert ->select(); // same select for all insert
    55     std::list<generic::priority::select_t>::iterator it=select_insert ->begin();
    56 
    57     // Scan all bank ...
    58     for (uint32_t i=0; i<_param->_nb_bank; i++)
     59    if (not event_stop)
    5960      {
    60         // compute the bank number (num_bank_tail is the older write slot)
    61         uint32_t num_bank = (reg_NUM_BANK_TAIL+i)%_param->_nb_bank;
    62 
    63 //      log_printf(TRACE,Commit_unit,FUNCTION,"  * BANK : %d", num_bank);
    64 //      log_printf(TRACE,Commit_unit,FUNCTION,"    * val  : %d", internal_BANK_INSERT_VAL [num_bank]);
    65 //      log_printf(TRACE,Commit_unit,FUNCTION,"    * full : %d", bank_full [num_bank]);
    66 
    67         // Scan all insert interface to find a valid transaction
    68         while (it!=select_insert ->end())
    69           {
    70             uint32_t num_rename_unit = it->grp;
    71             uint32_t num_inst_insert = it->elt;
    72 
    73             it++;
    74 
    75             log_printf(TRACE,Commit_unit,FUNCTION,"  * INSERT [%d][%d]", num_rename_unit,num_inst_insert);
    76 //          log_printf(TRACE,Commit_unit,FUNCTION,"    * INSERT_VAL        : %d", PORT_READ(in_INSERT_VAL [num_rename_unit][num_inst_insert]));
    77             log_printf(TRACE,Commit_unit,FUNCTION,"    * can_rename_select : %d", can_rename_select [num_rename_unit]);
    78 
    79             // Test if have instruction
    80             //   -> rename_unit_glue test the in-order insert !!!!!
    81             if (can_rename_select [num_rename_unit] // and
    82 //              PORT_READ(in_INSERT_VAL [num_rename_unit][num_inst_insert])
    83                 )
    84               {
    85                 log_printf(TRACE,Commit_unit,FUNCTION,"      * have instruction");
    86                 log_printf(TRACE,Commit_unit,FUNCTION,"      * bank_full : %d",bank_full [num_bank]);
    87 
    88                 // test if bank is not busy (full or previous access)
    89                 if (not bank_full [num_bank])
    90                   {
    91                     // find !!!
    92                     insert_ack       [num_rename_unit][num_inst_insert] = true;
    93 
    94                     Tpacket_t packet_id = ((num_bank << _param->_shift_num_bank) | reg_BANK_PTR [num_bank]);
    95 
     61        std::list<generic::priority::select_t> * select_insert = _priority_insert ->select(); // same select for all insert
     62        std::list<generic::priority::select_t>::iterator it=select_insert ->begin();
     63       
     64        // Scan all bank ...
     65        for (uint32_t i=0; i<_param->_nb_bank; i++)
     66          {
     67            // compute the bank number (num_bank_tail is the older write slot)
     68            uint32_t num_bank = (reg_NUM_BANK_TAIL+i)%_param->_nb_bank;
     69     
     70//          log_printf(TRACE,Commit_unit,FUNCTION,"  * BANK : %d", num_bank);
     71//          log_printf(TRACE,Commit_unit,FUNCTION,"    * val  : %d", internal_BANK_INSERT_VAL [num_bank]);
     72//          log_printf(TRACE,Commit_unit,FUNCTION,"    * full : %d", bank_full [num_bank]);
     73     
     74            // Scan all insert interface to find a valid transaction
     75            while (it!=select_insert ->end())
     76              {
     77                uint32_t num_rename_unit = it->grp;
     78                uint32_t num_inst_insert = it->elt;
     79     
     80                it++;
     81     
     82                log_printf(TRACE,Commit_unit,FUNCTION,"  * INSERT [%d][%d]", num_rename_unit,num_inst_insert);
     83//                  log_printf(TRACE,Commit_unit,FUNCTION,"    * INSERT_VAL        : %d", PORT_READ(in_INSERT_VAL [num_rename_unit][num_inst_insert]));
     84                log_printf(TRACE,Commit_unit,FUNCTION,"    * can_rename_select : %d", can_rename_select [num_rename_unit]);
     85     
     86                // Test if have instruction
     87                //   -> rename_unit_glue test the in-order insert !!!!!
     88                if (can_rename_select [num_rename_unit] // and
     89//              PORT_READ(in_INSERT_VAL [num_rename_unit][num_inst_insert])
     90                    )
     91                  {
     92                    log_printf(TRACE,Commit_unit,FUNCTION,"      * have instruction");
     93                    log_printf(TRACE,Commit_unit,FUNCTION,"      * bank_full : %d",bank_full [num_bank]);
     94                   
     95                    // test if bank is not busy (full or previous access)
     96                    if (not bank_full [num_bank])
     97                      {
     98                        // find !!!
     99                        insert_ack       [num_rename_unit][num_inst_insert] = true;
     100                       
     101                        Tpacket_t packet_id = ((num_bank << _param->_shift_num_bank) | reg_BANK_PTR [num_bank]);
     102                       
    96103#ifdef SYSTEMC_VHDL_COMPATIBILITY
    97                     insert_packet_id [num_rename_unit][num_inst_insert] = packet_id;
     104                        insert_packet_id [num_rename_unit][num_inst_insert] = packet_id;
    98105#else
    99                     if (_param->_have_port_rob_ptr  )
    100                     PORT_WRITE(out_INSERT_PACKET_ID [num_rename_unit][num_inst_insert],packet_id);
     106                        if (_param->_have_port_rob_ptr  )
     107                        PORT_WRITE(out_INSERT_PACKET_ID [num_rename_unit][num_inst_insert],packet_id);
    101108#endif
    102                     internal_BANK_INSERT_VAL             [num_bank] = true;
    103                     internal_BANK_INSERT_NUM_RENAME_UNIT [num_bank] = num_rename_unit;
    104                     internal_BANK_INSERT_NUM_INST        [num_bank] = num_inst_insert;
    105                    
    106                     break;
    107                   }
    108               }
     109                        internal_BANK_INSERT_VAL             [num_bank] = true;
     110                        internal_BANK_INSERT_NUM_RENAME_UNIT [num_bank] = num_rename_unit;
     111                        internal_BANK_INSERT_NUM_INST        [num_bank] = num_inst_insert;
     112                       
     113                        break;
     114                      }
     115                  }
    109116               
    110             // is a valid instruction, but it's not send at a bank
    111             //  ... invalid this rename_unit (because, insert in_order)
    112             can_rename_select [num_rename_unit] = false;
    113           }
     117                // is a valid instruction, but it's not send at a bank
     118                //  ... invalid this rename_unit (because, insert in_order)
     119                can_rename_select [num_rename_unit] = false;
     120              }
     121          }
    114122      }
    115123   
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