Ignore:
Timestamp:
Mar 18, 2009, 11:36:26 PM (15 years ago)
Author:
rosiere
Message:

1) Stat_list : fix retire old and new register bug
2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step)
3) Model : add class Model (cf Morpheo.sim)
4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array.
5) Script : add distexe.sh
6) Add Comparator, Multiplier, Divider. But this component are not implemented
7) Software : add Dhrystone

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Sort/src/Sort_allocation.cpp

    r88 r112  
    5353    // ~~~~~[ Interface : "input" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    5454    {
    55       ALLOC1_INTERFACE("input", IN, WEST, "List of data unsort",_param->_nb_input);
     55      ALLOC1_INTERFACE_BEGIN("input", IN, WEST, "List of data unsort",_param->_nb_input);
    5656
    5757      ALLOC1_SIGNAL_IN(in_INPUT_VAL ,"val" , Tcontrol_t, 1);
    5858      ALLOC1_SIGNAL_IN(in_INPUT_DATA,"data", Tdata_t   , _param->_size_data);
     59
     60      ALLOC1_INTERFACE_END(_param->_nb_input);
    5961    }
    6062
    6163    // ~~~~~[ Interface : "output" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    6264    {
    63       ALLOC1_INTERFACE("output",OUT, EAST, "List of data sort",_param->_nb_output);
     65      ALLOC1_INTERFACE_BEGIN("output",OUT, EAST, "List of data sort",_param->_nb_output);
    6466
    6567      ALLOC1_SIGNAL_OUT(out_OUTPUT_VAL  ,"val"  ,Tcontrol_t,1);
     
    6870      if (_param->_have_port_data_out)
    6971      ALLOC1_SIGNAL_OUT(out_OUTPUT_DATA ,"data" ,Tdata_t   ,_param->_size_data   );
     72
     73      ALLOC1_INTERFACE_END(_param->_nb_output);
    7074    }
    7175
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